CN108198778B - Method for determining parallel position of single chip - Google Patents

Method for determining parallel position of single chip Download PDF

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CN108198778B
CN108198778B CN201711442714.8A CN201711442714A CN108198778B CN 108198778 B CN108198778 B CN 108198778B CN 201711442714 A CN201711442714 A CN 201711442714A CN 108198778 B CN108198778 B CN 108198778B
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image
chip
alignment point
coordinate
parallel position
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CN108198778A (en
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孙彬
周文静
夏志伟
刘婷婷
侯佳丽
颜剡
孟庆嵩
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CETC Beijing Electronic Equipment Co
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
    • H01L21/682Mask-wafer alignment
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T7/00Image analysis
    • G06T7/70Determining position or orientation of objects or cameras
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T2207/00Indexing scheme for image analysis or image enhancement
    • G06T2207/30Subject of image; Context of image processing
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    • G06T2207/30148Semiconductor; IC; Wafer

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Abstract

The invention provides a method for determining a parallel position of a single chip, which comprises the following steps of 1, determining coordinates of an image template and an alignment point of the image template, 2, finding a chip image at a corresponding position through the image template, 3, obtaining an angle deviation value of the chip image and the image template and a deviation value of the alignment point of the chip image and the alignment point of the image template according to the coordinate comparison of the alignment point of the image template and the coordinate of the alignment point of the chip image to obtain a coordinate A (m, n) of the alignment point A of the chip image and an angle β of the alignment point A in a coordinate system, 4, obtaining a coordinate B (x, y) of the alignment point of the chip image when the alignment point of the chip image rotates to the parallel position according to the angle deviation value and the coordinate deviation value of the alignment point A of the chip image, and conveniently and quickly determining the parallel position of the chip according to the embodiment of the invention, thereby reducing the alignment time and improving the alignment precision.

Description

Method for determining parallel position of single chip
Technical Field
The invention relates to the field of dicing saws, in particular to a method for determining the parallel position of a single chip.
Background
In the technical field of semi-automatic dicing, chip position correction is usually performed by adopting semi-automatic dicing equipment in a visual mode, and the position and the angle of a first cutter of a chip are found out. However, because the chip is placed on the workbench by manual operation, the placing position and the placing angle have certain range deviation, and the alignment point needs to be searched in a large range during recognition, thereby increasing the alignment time and reducing the production efficiency. Meanwhile, the traditional chip position is determined by adopting a first-row straightening algorithm, the method needs a first chip and a last chip, when the angle for placing the chips is large, the point searching of the left side and the right side of the chips is easily caused to be not in the same row, the angle error is caused after the chips are straightened, and the alignment precision and the reliability are reduced.
Disclosure of Invention
In view of the above, the present invention provides a method for determining a parallel position of a single chip.
In order to solve the technical problems, the invention adopts the following technical scheme:
the method for determining the parallel position of the single chip according to the embodiment of the first aspect of the invention comprises the following steps:
step 1, determining coordinates of an image template and an alignment point of the image template;
step 2, finding the chip image at the corresponding position through the image template;
step 3, obtaining an angle deviation value between the chip image and the image template and a deviation value between the alignment point of the chip image and the alignment point coordinate of the image template according to the coordinate comparison between the alignment point of the image template and the alignment point of the chip image so as to obtain a coordinate A (m, n) of the alignment point A of the chip image and an angle β of the alignment point A in a coordinate system;
and 4, obtaining the coordinate B (x, y) of the alignment point B of the chip image when the alignment point A of the chip image rotates to a parallel position according to the angle deviation value and the coordinate of the alignment point A of the chip image.
Preferably, said image template alignment point coordinates in said step 1 are derived from the size of a single chip and the fixed position at which said single chip is placed on a stage.
Further, the alignment point of the image template is the geometric center of the image template, and the alignment point of the chip image is the geometric center of the chip image.
Further, the angle deviation value comprises a self angle difference of the chip image compared with the parallel position and a revolution angle deviation of the chip image compared with the parallel position in a coordinate;
wherein the self angle difference is α, and the revolution angle deviation is α.
Further, when the chip image is rotated from the alignment point a to the alignment point B corresponding to the parallel position, the coordinates of the rotation center point of the alignment point B are O (a, B), the radius of the circle is r, and the angle between the vector OB and the X coordinate axis is θ, then the X coordinate and the y coordinate of the alignment point B when the chip image is rotated to the parallel position are respectively:
x=rcosθ,y=rsinθ,
wherein the content of the first and second substances,
Figure GDA0002385460020000021
preferably, when the alignment point a of the chip image is in one or four quadrants, the coordinates of the alignment point B of the chip image satisfy:
x=rcosθ=rcos(α+β)=(n-b)cosα+(m-a)sinα,
y=rsinθ=rsin(α+β)=-(n-b)sinα+(m-a)cosα。
preferably, when the alignment point a of the chip image is in the second and third limits, the coordinates of the alignment point B of the chip image satisfy:
x=rcosθ=rcos(α+β)=(b-n)cosα+(a-m)sinα,
y=rsinθ=rsin(α+β)=-(b-n)sinα+(a-m)cosα。
the technical scheme of the invention has the following beneficial effects:
according to the method for determining the parallel position of the single chip, the straightening calculation can be carried out at any alignment point, the parallel position of the chip can be conveniently and quickly determined, the alignment time is shortened, and the alignment precision is improved.
Drawings
FIG. 1 is a flowchart illustrating a method for determining a parallel position of a single chip according to an embodiment of the invention;
fig. 2 is a schematic diagram illustrating an algorithm effect in the method for determining the parallel position of the single chip according to the embodiment of the invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the drawings of the embodiments of the present invention. It is to be understood that the embodiments described are only a few embodiments of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the described embodiments of the invention, are within the scope of the invention.
First, a method for determining the parallel position of a single chip according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings.
As shown in fig. 1 to 2, the method for determining the parallel position of a single chip according to the embodiment of the present invention includes the following steps:
step 1, determining the coordinates of an image template and an alignment point of the image template.
Specifically, the image template is derived from the size of the single chip and the fixed position at which the single chip is placed on the stage.
Preferably, the image template alignment point is the geometric center of the image template and the chip image alignment point is the geometric center of the chip image.
And 2, finding the chip image at the corresponding position through the image template.
That is, the image aligning function is manually or automatically started through the image template aligning point, so that the machine can automatically run to the relative position of the single chip, and the image template finds the image closest to the image template according to a certain point searching rule, namely the chip image.
And 3, comparing the coordinates of the alignment points of the image template and the coordinates of the alignment points of the chip image to obtain an angle deviation value of the chip image and the image template and a deviation value of the alignment points of the chip image and the coordinates of the alignment points of the image template so as to obtain the coordinates A (m, n) of the alignment points A of the chip image and the angle β of the alignment points A in a coordinate system.
Since the image template is known, comparing the chip image to the image template yields the coordinates (m, n) of the alignment point A of the chip image and the angle β of the alignment point A in the coordinate system.
The angle deviation value comprises a self angle difference of the chip image compared with the parallel position and a revolution angle deviation of the chip image compared with the parallel position alignment point in coordinates, wherein the self angle difference is α, the self angle difference is the angle difference of the central line of the chip image and the coordinate X axis, the angle deviation can be automatically identified through a machine, and the revolution angle deviation is that the chip image can reach the parallel position through rotating the self angle difference, so the self angle deviation and the revolution angle deviation are equal in angle.
And 4, obtaining the coordinate B (x, y) of the alignment point B of the chip image when the alignment point A of the chip image rotates to a parallel position according to the angle deviation value and the coordinate of the alignment point A of the chip image.
As shown in fig. 2, when the coordinates of the rotation center point after the chip image is rotated to the parallel position are O (a, B), the coordinates O are also known because the coordinate and the angular deviation of the chip image are determined, the circle radius is also known, and the angle between the vector OB and the X coordinate axis is θ, the method for calculating the X coordinate and the y coordinate of the chip image alignment point B is:
∠θ=∠β-∠α,
from the distance formula
Figure GDA0002385460020000041
x=rcosθ,y=rsinθ。
From the sine and cosine equation
cos(β-α)=cosαcosβ+sinαsinβ,sin(β-α)=-sinαcosβ+sinβcosα。
Wherein when the alignment point A A (m, n) of the chip image is in one or four quadrants, the following formula is used
Figure GDA0002385460020000042
Figure GDA0002385460020000043
And solving the coordinate value x coordinate and the coordinate value y coordinate of the alignment point B of the chip image as follows:
x=rcosθ=rcos(α+β)=(n-b)cosα+(m-a)sinα,
y=rsinθ=rsin(α+β)=-(n-b)sinα+(m-a)cosα。
when the alignment point a (m, n) of the chip image is in the second and third quadrants, the coordinate formula of the alignment point B of the chip image is obtained according to the following formula:
Figure GDA0002385460020000051
Figure GDA0002385460020000052
and obtaining the coordinate value of the alignment point B of the chip image as follows:
x=rcosθ=rcos(α+β)=(b-n)cosα+(a-m)sinα,
y=rsinθ=rsin(α+β)=-(b-n)sinα+(a-m)cosα。
according to the method for determining the parallel position of the single chip, the straightening calculation can be carried out at any alignment point, the parallel position of the chip can be conveniently and quickly determined, the alignment time is shortened, and the alignment precision is improved.
While the foregoing is directed to the preferred embodiment of the present invention, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention as defined in the appended claims.

Claims (6)

1. A method for determining the parallel position of a single chip is characterized by comprising the following steps:
step 1, determining coordinates of an image template and an alignment point of the image template;
step 2, finding the chip image at the corresponding position through the image template;
step 3, obtaining an angle deviation value between the chip image and the image template and a deviation value between the alignment point of the chip image and the alignment point coordinate of the image template according to the coordinate comparison between the alignment point of the image template and the alignment point of the chip image so as to obtain a coordinate A (m, n) of the alignment point A of the chip image and an angle β of the alignment point A in a coordinate system;
step 4, obtaining the coordinate B (x, y) of the alignment point B of the chip image when the alignment point A of the chip image rotates to a parallel position according to the angle deviation value and the coordinate of the alignment point A of the chip image;
the angle deviation value comprises a self angle difference of the chip image compared with the parallel position and a revolution angle deviation of the chip image compared with the parallel position in a coordinate;
wherein the self angle difference is α, and the revolution angle deviation is α.
2. The method for determining the parallel position of a single chip as claimed in claim 1, wherein the image template alignment point coordinates in step 1 are derived from the size of the single chip and the fixed position of the single chip placed on the worktable.
3. The method for determining the parallel position of a single chip according to claim 1 or 2, wherein the alignment point of the image template is the geometric center of the image template, and the alignment point of the chip image is the geometric center of the chip image.
4. The method for determining the parallel position of the single chip according to claim 1, wherein the coordinates of the center point of rotation of the chip image when the chip image rotates from the alignment point a to the alignment point B corresponding to the parallel position are O (a, B), the radius of the circle is r, the angle between the vector OB and the X coordinate axis is θ, and then the X coordinate and the y coordinate of the alignment point B when the chip image rotates to the parallel position are respectively:
x=rcosθ,y=rsinθ,
wherein the content of the first and second substances,
∠θ=∠β-∠α,
Figure FDA0002465995650000011
5. the method for determining the parallel position of the single chip as claimed in claim 4, wherein when the alignment point A of the chip image is within one or four quadrants, the coordinates of the alignment point B of the chip image satisfy:
x=rcosθ=rcos(α+β)=(n-b)cosα+(m-a)sinα,
y=rsinθ=rsin(α+β)=-(n-b)sinα+(m-a)cosα。
6. the method for determining the parallel position of the single chip as claimed in claim 4, wherein when the alignment point A of the chip image is in two or three quadrants, the coordinates of the alignment point B of the chip image satisfy:
x=rcosθ=rcos(α+β)=(b-n)cosα+(a-m)sinα,
y=rsinθ=rsin(α+β)=-(b-n)sinα+(a-m)cosα。
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CN106683138A (en) * 2016-12-28 2017-05-17 华中科技大学 Calibration method of solder paste printing machine camera

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CN101777610A (en) * 2010-01-21 2010-07-14 东莞华中科技大学制造工程研究院 Method for fast tuning angle of LED chip
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