Invention content
In order to solve the above technical problems, the present invention provides a kind of triggering driving circuit and its using the triggering driving circuit
Organic light-emitting display device, the triggering driving circuit output duty cycle and the adjustable multiple triggering drive signals of sequential, triggering
The bright dark time scale of Organic Light Emitting Diode in drive signal control organic light-emitting display device, reaches and is driven in same current
Under dynamic, the purpose of different grey menus is shown, it can be to avoid when showing low grayscale, since driving current is relatively low, electric current is unstable
Fixed caused picture unevenness problem.
Technical solution provided by the invention is as follows:
The invention discloses a kind of triggering driving circuit, which includes N (N >=2, and N is integer) grade and touches
Send out drive circuit unit;N-th (1≤n≤N, and n is integer) grade triggers drive circuit unit and includes pull-up control module, pull-up
Module, signal control module and pull-down module;
Pull-up control module, pull-up module and pull-down module are connected to pull-up control node, and signal control module is under
Drawing-die block is connected to output node;
Pull-down module inputs the first clock signal, signal control module input n-th grade of pulse width modulating signal and second
Clock signal, output node export n-th grade of triggering drive signal.
Preferably, pull-up control module includes first film transistor, the second thin film transistor (TFT) and the first capacitance;First
The grid of thin film transistor (TFT) and the equal input high level that drains, the source electrode of first film transistor connect the grid of the second thin film transistor (TFT)
Pole;The drain electrode input high level of second thin film transistor (TFT), the source electrode connection pull-up control node of the second thin film transistor (TFT);First electricity
Appearance includes the first pole plate and the second pole plate, the source electrode of the first pole plate connection first film transistor and the grid of the second thin film transistor (TFT)
Pole, the second pole plate connection pull-up control node.
Preferably, pull-up module includes third thin film transistor (TFT), the 4th thin film transistor (TFT) and the second capacitance;Third film
The grid of transistor and the equal input high level that drains, the source electrode of three thin film transistor (TFT)s connect the grid of the 4th thin film transistor (TFT);The
The drain electrode input high level of four thin film transistor (TFT)s, the source electrode connection output node of the 4th thin film transistor (TFT) simultaneously export n-th grade of triggering
Drive signal.
Preferably, signal control module includes the 5th thin film transistor (TFT) and the 7th thin film transistor (TFT);5th thin film transistor (TFT)
Grid connect the 7th thin film transistor (TFT) source electrode, the 5th thin film transistor (TFT) drain electrode connection pull-up control node, the 5th film
The source electrode input power negative pressure of transistor;The grid input second clock signal of 7th thin film transistor (TFT), the 7th thin film transistor (TFT)
Drain electrode input n-th grade of pulse width modulating signal.
Preferably, pull-down module includes the 6th thin film transistor (TFT) and the 8th thin film transistor (TFT);The grid of 6th thin film transistor (TFT)
Pole connects the source electrode of the 8th thin film transistor (TFT), the 6th thin film transistor (TFT) and drain electrode connection output node, source electrode input power negative pressure;
The grid of 8th thin film transistor (TFT) connects the first clock signal, the drain electrode connection pull-up control node of the 8th thin film transistor (TFT).
Preferably, n-th grade of triggering drive circuit unit further includes the second supporting film transistor;
The grid input clear signal of second supporting film transistor, the drain electrode connection output of the second supporting film transistor
Node, the source electrode input power negative pressure of the second supporting film transistor.
Preferably, n-th grade of triggering drive circuit unit further includes the first supporting film transistor;
First supporting film transistor grid input clear signal, the first supporting film transistor drain electrode connection described in
The source electrode of 7th thin film transistor (TFT) and the grid of the 5th thin film transistor (TFT), the source electrode input power of the first supporting film transistor are born
Pressure.
Preferably, n-th grade of triggering drive circuit unit further includes third supporting film transistor;
The grid input clear signal of third supporting film transistor, the drain electrode connection the 8th of third supporting film transistor
The grid of the source electrode of thin film transistor (TFT) and the 6th thin film transistor (TFT), the source electrode input high level of third supporting film transistor.
Preferably, n-th (1≤n≤N-1, and n is integer) grade triggers n-th grade of the triggering drive of drive circuit unit output
Dynamic signal inputs (n+1)th grade of triggering drive circuit unit as (n+1)th grade of pulse width modulating signal.
The invention also discloses a kind of organic light-emitting display device, which includes:Crisscross
Scan line and data line and the multiple pixel regions limited by scan line and data line intersection, per horizontal scanning line by scanning voltage
Its corresponding pixel region is inputted, data voltage is inputted its corresponding pixel region by each row of data line, and each pixel region is equal
Equipped with OLED driver circuit,
The organic light-emitting display device further includes the triggering driving circuit described in above-mentioned any one;Every grade of triggering is driven
Dynamic circuit unit corresponds to a horizontal scanning line, and every grade of triggering drive circuit unit inputs its corresponding scanning by drive signal is triggered
Multiple pixel regions that line is limited;
Each OLED driver circuit includes:11st thin film transistor (TFT), the 12nd thin film transistor (TFT), the tenth
Three thin film transistor (TFT)s and Organic Light Emitting Diode;
The grid connection scan line of 11st thin film transistor (TFT), the drain electrode connection data line of the 11st thin film transistor (TFT), the
The source electrode of 11 thin film transistor (TFT)s connects the grid of the 12nd thin film transistor (TFT);
The drain electrode input supply voltage of 12nd thin film transistor (TFT), the source electrode connection the 13rd of the 12nd thin film transistor (TFT) are thin
The drain electrode of film transistor;
The grid of 13rd thin film transistor (TFT) connects the triggering driving circuit corresponding to this pixel region, and the 13rd film is brilliant
The source electrode connection Organic Light Emitting Diode of body pipe;
Organic Light Emitting Diode includes anode and cathode, and anode connects the source electrode of the 13rd thin film transistor (TFT), cathode input
Power supply negative pressure.
Compared with prior art, the present invention can bring at least one of following advantageous effect:
1st, triggering driving circuit can be by adjusting externally input first clock signal, second clock signal and pulse width
The duty ratio and sequential of multiple triggering drive signals that modulated signal flexible modulation is exported;
2nd, triggering driving circuit can reach (n+1)th grade triggering drive signal sequential lag behind n-th grade triggering drive signal when
The effect of sequence lags behind the scanning electricity of line n scan line input corresponding to the sequential of the scanning voltage of the (n+1)th horizontal scanning line input
The sequential of pressure more effectively and can meticulously control the OLED driver circuit do not gone together in pixel region.
3rd, organic light-emitting display device can reach in the case where Organic Light Emitting Diode receives identical driving current, show
Show the function of different grey menus;
4th, organic light-emitting display device can be avoided when showing low grey menu, and since driving current is relatively low, electric current is unstable
Fixed caused picture unevenness problem;
Specific embodiment
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, control is illustrated below
The specific embodiment of the present invention.It should be evident that the accompanying drawings in the following description is only some embodiments of the present invention, for
For those of ordinary skill in the art, without creative efforts, other are can also be obtained according to these attached drawings
Attached drawing, and obtain other embodiments.
To make simplified form, part related to the present invention is only schematically shown in each figure, they are not represented
Its practical structures as product.In addition, so that simplified form is easy to understand, there is identical structure or function in some figures
Component only symbolically depicts one of those or has only marked one of those.Herein, "one" is not only represented
" only this " can also represent the situation of " more than one ".
The structure of the triggering driving circuit of the present invention is as shown in Fig. 2, triggering driving circuit includes N (N >=2, and N is integer)
Grade triggering drive circuit unit (Emission Circuit), n-th (1≤n≤N, and n is integer) grade triggering driving circuit list
The circuit diagram of member is as shown in Figure 3.N-th grade of triggering drive circuit unit includes pull-up control module 01, pull-up module 02, signal control
Molding block 03 and pull-down module 04.Pull up 02 equal input high level VGH of control module 01 and pull-up module, signal control module
03 and 04 equal input power negative pressure VSS of pull-down module;Pull-up control module 01, signal control module 03 and pull-down module 04 connect
In pull-up control node netAn, pull-up module 02 and pull-down module 04 are connected to output node netBn.Output node netBn is defeated
Go out to trigger drive signal Emission, n-th grade of triggering drive signal is denoted as En.
It pulls up control module 01 and receives high level VGH, charge to pull-up control node netAn.
Pull-up module 02 receives high level VGH, charges to output node netBn, and controlled by output node netBn
System, output triggering drive signal En.
Signal control module 03 receives n-th grade of pulse width modulating signal PWMn and second clock signal CK2, and pull-up is controlled
Node netAn processed carries out drop-down and empties.
Pull-down module 04 receives the first clock signal CK1, and by pull-up control node netAn controls to output node
NetBn carries out drop-down and empties.
Specifically, pull-up control module 01 includes first film transistor T1, the second thin film transistor (TFT) T2 and the first electricity
Hold C1.The grid of first film transistor T1 and drain electrode are all connected with high level VGH, the source electrode connection of first film transistor T1 the
The grid of two thin film transistor (TFT) T2;The drain electrode connection high level VGH of second thin film transistor (TFT) T2, the source of the second thin film transistor (TFT) T2
Pole connection pull-up control node netAn;First capacitance C1 includes the first pole plate and the second pole plate, the first pole plate connection the first film
The grid of the source electrode of transistor T1 and the second thin film transistor (TFT) T2, the second pole plate connection pull-up control node netAn.
Pull-up module 02 includes third thin film transistor (TFT) T3, the 4th thin film transistor (TFT) T4 and the second capacitance C2.Third is thin
The grid of film transistor T3 and drain electrode are all connected with high level VGH, and the source electrode of third thin film transistor (TFT) T3 connects the 4th film crystal
The grid of pipe T4;The source electrode connection output of drain electrode connection the high level VGH, the 4th thin film transistor (TFT) T4 of 4th thin film transistor (TFT) T4
Node netBn simultaneously exports triggering drive signal En.
Signal control module 03 includes the 5th thin film transistor (TFT) T5 and the 7th thin film transistor (TFT) T7.5th thin film transistor (TFT) T5
Grid connect the 7th thin film transistor (TFT) T7 source electrode, the 5th thin film transistor (TFT) T5 drain electrode connection pull-up control node netAn,
The source electrode input power negative pressure VSS of 5th thin film transistor (TFT) T5;The grid connection second clock signal of 7th thin film transistor (TFT) T7
The drain electrode of CK2, the 7th thin film transistor (TFT) T7 connect n-th grade of pulse width modulating signal PWMn.For convenience of description, by the 7th film
The tie point of transistor T7 source electrodes and the 5th thin film transistor (TFT) T5 grids is denoted as first node netCn.
Pull-down module 04 includes the 6th thin film transistor (TFT) T6 and the 8th thin film transistor (TFT) T8.The grid of 6th thin film transistor (TFT) T6
Pole connects the source electrode of the 8th thin film transistor (TFT) T8, the drain electrode connection output node netBn of the 6th thin film transistor (TFT) T6, the 6th film
The source electrode input power negative pressure VSS of transistor T6;The grid of 8th thin film transistor (TFT) T8 connects the first clock signal CK1, and the 8th
The drain electrode connection pull-up control node netAn of thin film transistor (TFT) T8.For convenience of description, by the 8th thin film transistor (TFT) T8 source electrodes and
The tie point of six thin film transistor (TFT) T6 grids is denoted as second node netDn.
For five input signals:Under normal display state, high level VGH keeps high potential, and power supply negative pressure VSS is kept
Low potential.N-th grade of pulse width modulating signal PWMn is the adjustable pulse signal of duty ratio, the first clock signal CK1 and second
Clock signal CK2 has the identical period to be denoted as period 1 τ 1, within 1 times of period 1 τ, including the first clock signal CK1
Low level first time period is in high level, second clock signal CK2, the first clock signal CK1 is further included and is in low
Level, second clock signal CK2 are in the second time period of high level, such as:First clock signal CK1 and second clock signal
CK2 can be the cyclic pulse signal that duty ratio as shown in Figure 4 is 50%, or duty ratio as shown in Figure 5 is not
For 50% cyclic pulse signal.The period of pulse width modulating signal PWMn is second round τ 2.
Each frame that display device shows image is divided into multiple subframes, the period of each signal is son in display device
The integral multiple of frame time.
The operation principle for triggering driving circuit is as follows:
Under normal display state, high level VGH is located at high potential, first film transistor T1 and third thin film transistor (TFT)
The constant openings of T3 drive high level VGH to be sent to the first capacitance C1 and the second capacitance C2, at this time the second thin film transistor (TFT) T2 and
The grid of four thin film transistor (TFT) T4 also receives the high potential and opening of VGH, therefore the high potential of VGH is via the second film crystal
Pipe T2 is transferred to pull-up control node netAn;High level VGH is transferred to the of the second capacitance C2 via the 4th thin film transistor (TFT) T4
The drain electrode of quadripolar plate and the 6th thin film transistor (TFT) T6.
When pulse width modulating signal PWMn is located at high potential:
When second clock signal CK2 is high potential, the 7th thin film transistor (TFT) T7 is opened, while high level is transferred to the
The grid of five thin film transistor (TFT) T5 opens T5, and the charge of pull-up control node netAn is discharged via the 5th thin film transistor (TFT) T5
To low potential VSS.
Next subframe, second clock signal CK2 become low potential, and correspondingly the first clock signal CK1 becomes high potential, the
Eight thin film transistor (TFT) T8 are opened, and the low potential for being drained and (pulling up control node netAn) is sent to its source electrode, drives the 6th
Thin film transistor (TFT) T6 is closed;4th thin film transistor (TFT) T4 is opened, and high level VGH is sent to its source electrode, therefore output node
NetBn exports the triggering drive signal En of high potential.
When pulse width modulating signal PWMn is located at low potential:
When second clock signal CK2 is high potential, the 5th thin film transistor (TFT) T5 is closed, via the second thin film transistor (TFT) T2
Being transferred to the charge of pull-up control node netAn can not be released effectively, therefore pulls up control node netAn and still keep high potential.
Next subframe, second clock signal CK2 become low potential, and correspondingly the first clock signal CK1 becomes high potential, the
Eight thin film transistor (TFT) T8 are opened, and the high potential for being drained and (pulling up control node netAn) is sent to its source electrode, drives the 6th
Thin film transistor (TFT) T6 is opened;6th thin film transistor (TFT) T6 is opened, and the power supply negative pressure VSS of low potential is sent to its drain electrode, therefore
Output node netBn exports the triggering drive signal En of low potential.
When the triggering driving circuit of the present invention is applied in a display device, it is contemplated that picture when display device is switched on is steady
Charge release problem during qualitative and shutdown, the one or more auxiliary of increase are thin in can triggering drive circuit unit at n-th grade
Film transistor, including:Drain electrode as shown in Figure 6 is connected to first node netCn, and source electrode is connected to the first of power supply negative pressure VSS
Supporting film transistor T21;Drain electrode as shown in Figure 7 is connected to output node netBn, and source electrode is connected to power supply negative pressure VSS's
Second supporting film transistor T22;Drain electrode as shown in Figure 8 is connected to second node netDn, and source electrode is connected to high level VGH
Third supporting film transistor T23.The grid of these three thin film transistor (TFT)s is all connected with clear signal CLR.It is opened in display device
When machine or shutdown, clear signal CLR can be in high potential within the time of a subframe or more subframes.Three listed auxiliary are thin
Film transistor can be added individually to triggering drive circuit unit, can also add two of which or three simultaneously.
When display device is switched on, the grid of the clear signal CLR input third supporting film transistors T23 of high potential,
Third supporting film transistor T23 is opened, and the high level VGH in high high potential is passed via third supporting film transistor T23
It send to second node netDn, the 6th thin film transistor (TFT) T6 is driven to open, the power supply negative pressure VSS in low potential is thin via the 6th
The source electrode of film transistor T6 is sent to its drain electrode, so n-th grade of triggering drive signal En output is low potential, display device at this time
Show black picture.Newly-increased third supporting film transistor T23 can prevent display device booting but data voltage not yet transmits
During to pixel region, there is exception in the picture of display.
When display device is shut down, high level VGH becomes low potential, if there is residual charge at first node netCn, the
One supporting film transistor T21 is opened, and residual charge is discharged;If output node netBn has residual charge, the second auxiliary is thin
Film transistor T22 is opened, and residual charge is discharged;If there is residual charge at second node netDn, third supporting film crystal
Pipe T23 is opened, and residual charge is discharged, and residual charge is discharged after shutdown can be effectively increased each film crystal in triggering driving circuit
The bulk life time of pipe.
The invention also discloses a kind of organic light-emitting display devices using above-mentioned triggering driving circuit, are touched including above-mentioned
Hair driving circuit, crisscross scan line and data line and the multiple pixel regions limited by scan line and data line intersection
Scanning voltage is inputted its corresponding pixel region by domain per horizontal scanning line, and it is corresponding that data voltage is inputted its by each row of data line
Pixel region, each pixel region are equipped with OLED driver circuit.Driving circuit is triggered by N grades of (N >=2, and N
For integer) triggering drive circuit unit form, every grade triggering drive circuit unit correspond to a horizontal scanning line, n-th grade (1≤n≤
N, and n is by integer) trigger multiple pictures that driving circuit triggers n-th grade drive signal En and input its corresponding scan line and limit
Plain region.
The structure of OLED driver circuit is as shown in figure 9, each OLED driver circuit includes
Positioned at scan line and the 11st thin film transistor (TFT) T11, the 12nd thin film transistor (TFT) T12, the 13rd film of data line infall
Transistor T13 and Organic Light Emitting Diode OLED.
Wherein, the 11st thin film transistor (TFT) T11 is opened or closed according to scanning voltage, transmits data voltage when opening
To the 12nd thin film transistor (TFT) T12, the 12nd thin film transistor (TFT) T12's of control opens or closes;12nd thin film transistor (TFT) T12
Driving current, which is generated, when opening is transferred to the 13rd thin film transistor (TFT) T13;13rd thin film transistor (TFT) T13 is according to external input
Triggering drive signal Emission open or close, control the 12nd thin film transistor (TFT) T12 caused by driving current whether
It is transferred to Organic Light Emitting Diode OLED;Organic Light Emitting Diode OLED receives the drive of the 13rd thin film transistor (TFT) T13 transmission
Light is generated after streaming current.
Therefore in the case that the driving current size that is received in Organic Light Emitting Diode OLED is identical, the 13rd film is brilliant
The time scale that body pipe T13 is opened and closed is different, and due to the visual persistence effect of human eye, pixel region can show different ashes
The picture of rank.It avoids when showing low grayscale, the picture unevenness caused by driving current is relatively low and electric current is unstable is asked
Topic.
The concrete structure of OLED driver circuit is as follows:
The grid connection scan line of 11st thin film transistor (TFT) T11, the drain electrode connection data of the 11st thin film transistor (TFT) T11
Line, the source electrode of the 11st thin film transistor (TFT) T11 connect the grid of the 12nd thin film transistor (TFT) T12;
The grid of 12nd thin film transistor (TFT) T12 connects the source electrode of the 11st thin film transistor (TFT) T11, the 12nd film crystal
The source electrode of drain electrode the input supply voltage VDD, the 12nd thin film transistor (TFT) T12 of pipe T12 connect the 13rd thin film transistor (TFT) T13's
Drain electrode;
Grid input triggering the drive signal Emission, the 13rd thin film transistor (TFT) T13 of 13rd thin film transistor (TFT) T13
Drain electrode connection the 12nd thin film transistor (TFT) T12 source electrode, the 13rd thin film transistor (TFT) T13 source electrode connection organic light-emitting diodes
The anode of pipe;
Organic Light Emitting Diode includes anode and cathode, and anode connects the source electrode of the 13rd thin film transistor (TFT) T13, and cathode is defeated
Enter power supply negative pressure VSS.
The source electrode of 11 thin film transistor (TFT) T11 and the grid of the 12nd thin film transistor (TFT) T12 are electrically connected to pixel electrode, pass
The drive voltage line of power transmission source voltage VDD has overlapping region, and pass through interlayer dielectric and separate with pixel electrode, drive voltage line
Storage capacitance Cst is formed by the use of interlayer dielectric as dielectric material with pixel electrode.One end connection the of storage capacitance Cst
The source electrode of 11 thin film transistor (TFT) T11 and the grid of the 12nd thin film transistor (TFT) T12, the other end connection electricity of storage capacitance Cst
The drain electrode of source voltage VDD and the 12nd thin film transistor (TFT) T12.
For convenience of description, by the friendship of the source electrode of the 11st thin film transistor (TFT) T11 and the grid of the 12nd thin film transistor (TFT) T12
Contact is denoted as node P.
Figure 10 is the main signal sequence diagram of the OLED driver circuit of the present invention.In normal display state
Under, supply voltage VDD keeps high potential, and power supply negative pressure VSS keeps low potential.When the scan line of the row passes to scanning voltage
During the 11st thin film transistor (TFT) T11, the 11st thin film transistor (TFT) T11 is opened, and the data voltage to be drained is sent to storage electricity
Hold Cst, and opening order is assigned to the 12nd thin film transistor (TFT) T12.Scanning voltage and data voltage are down to low level later,
Since the 11st thin film transistor (TFT) T11 is closed, node P keeps high potential.After 12nd thin film transistor (TFT) T12 is opened, drive is generated
Streaming current is delivered to the drain electrode of the 13rd thin film transistor (TFT) T13 from its drain electrode.Drive signal Emission controls the are triggered simultaneously
The opening of 13 thin film transistor (TFT) T13 and closing, triggering drive signal Emission are the adjustable pulse signal of duty ratio, therefore
Under the situation opened in the 12nd thin film transistor (TFT) T12, the sequential for triggering drive signal is the bright dark of Organic Light Emitting Diode
Control sequential.I.e. when triggering drive signal Emission is located at low level, the 13rd thin film transistor (TFT) T13 is closed, You Jifa
Optical diode anode does not have electric current input, and Organic Light Emitting Diode does not shine;When triggering drive signal Emission is located at high electricity
Usually, the 12nd thin film transistor (TFT) T12 and the 13rd thin film transistor (TFT) T13 is opened, via the electricity of the 13rd thin film transistor (TFT) T13
Stream input Organic Light Emitting Diode anode, organic light-emitting diode.Therefore, the bright dark sequential of Organic Light Emitting Diode is accounts for
The empty pulse sequence more consistent than with triggering drive signal Emission.
In the organic light-emitting display device of the present invention, n-th grade of triggering drive signal En controls its corresponding scan line institute
The 13rd thin film transistor (TFT) opens or closes in the pixel region of restriction, since (n+1)th (1≤n≤N-1, and n is integer) row is swept
Retouch the scanning voltage of line input sequential lag behind the input of line n scan line scanning voltage sequential, it is preferable that when the
It, can during the sequential lag one or more subframe of than n-th grade triggering drive signal En of the sequential of n+1 grades of triggering drive signal En+1
OLED driver circuit that is more effective and meticulously controlling pixel region of not going together.
Therefore in the present embodiment, n-th (1≤n≤N-1, and n is integer) grade triggers the n-th of drive circuit unit output
Grade triggering drive signal En inputs (n+1)th grade of triggering drive circuit unit as (n+1)th grade of pulse width modulating signal PWMn+1.
The 1st grade of pulse width modulating signal PWM1 that 1st grade of pulse width modulating signal is then an externally input.
Such as:Fig. 4 is the sequence diagram for triggering main signal in driving circuit.Externally input 1st grade of pulse width in figure
The second round τ 2 of modulated signal PWM1 is 11 subframes, the first clock signal CK1 and second clock signal CK2 common cycles the
One period tau 1 is 2 subframes.The sequence diagram of E1, E2, E3 are illustrated only in Fig. 4, triggering drive signal Emission later can
And so on.
In fact, pixel makes one the other grayscale of outlook by the bright dark time scale of Organic Light Emitting Diode, that is, input n-th grade
The duty ratio of n-th grade of triggering drive signal En of Organic Light Emitting Diode circuit determines.Therefore in other embodiments, arteries and veins is adjusted
Rush bandwidth modulation signals PWMn, the period of the first clock signal CK1 and second clock signal CK2 and sequential relationship can have it is cleverer
Selection living.Correspondingly, the connection relation triggered between the structure of drive circuit unit and each triggering drive circuit unit also may be used
To make modification and simplification.
Such as:The sequential of pulse width modulating signal PWMn can be divided into multiple stages, and the duty ratio in each stage is different, because
This input do not go together OLED driver circuit triggering drive signal duty ratio difference, have due to existing
Machine luminous display unit generally existing leads to panel top and the bottom luminance difference since panel top and the bottom driving circuit is of different sizes
The problem of different, therefore the triggering driving circuit of this embodiment can effectively make up this difference;Or n-th grade of triggering driving circuit list
Member receives externally input n-th grade of pulse width modulating signal PWMn, n-th grade of pulse width modulating signal PWMn duty ratio respectively
It is corresponding with the average grayscale that the row pixel need to be shown, the power consumption of display device can be reduced;Or by identical pulse width tune
Signal PWMn processed inputs triggering drive circuit units at different levels, while controls what each OLED driver circuit was received
Drive signal En is triggered, the structure of triggering driving circuit can be simplified.
Since the OLED driver circuit of the present invention overcomes, electric current under low grayscale is smaller and unstable to ask
Topic, therefore on this basis, low grayscale can be carried out further by regulating and controlling the duty ratio of pulse width modulating signal PWMn
Subdivision.Human eye is higher to the susceptibility of low grayscale, therefore the present invention can effectively optimize picture quality.
The invention also discloses the circuit distributed architectures of organic light-emitting display device.The display device not only includes above-mentioned touch
Hair driving circuit 13, crisscross scan line and data line and the multiple pixel regions limited by scan line and data line intersection
Domain, each pixel region are equipped with OLED driver circuit;Further include the turntable driving that signal is provided for scan line
Circuit 11, the data drive circuit that signal is provided for data line and other driving circuit (such as sequential control circuits, gamma voltage
Generator etc.), data drive circuit and other driving circuits are collectively referred to as data and other driving circuits 12.Display device periphery
Top circuit area, bottom circuit region, left side circuit region and right side circuit region may be equipped with, wherein, data and other driving electricity
Road 12 is usually located at bottom circuit region, and usually individual chip form;Top circuit area, left side circuit region and right side
Circuit region can be used as individual chip, and the devices such as thin film transistor (TFT) can also be used to be integrated in the display surface of display device
On plate.
Therefore scan drive circuit 11 and triggering driving circuit 13 can be there are many arrangement modes in display device, packet
It includes:
Arrangement mode 1:As shown in figure 11, scan drive circuit 11 is located at left side circuit region, triggering driving circuit 13 is located at
Right side circuit region.
This arrangement mode is by scan drive circuit 11 and triggering 13 circuit of the driving circuit circuit that be respectively placed in two different
Region facilitates design and production.
Arrangement mode 2:As shown in figure 12, partial scan driving circuit 11 and part triggering driving circuit 13 are located at left side electricity
Road area, partial scan driving circuit 11 and part triggering driving circuit 13 are located at right side circuit region.
This arrangement mode is equipped with scan drive circuit 11 and triggering driving circuit 13 in panel both sides so that scanning voltage
Each pixel region of display panel can be reached within the shorter time with triggering driving voltage, reduce signal delay.
Arrangement mode 3:As shown in figure 13, scan drive circuit 11 and triggering driving circuit 13 are respectively positioned on left side circuit region.
Arrangement mode 4:As shown in figure 14, scan drive circuit 11 and triggering driving circuit 13 are respectively positioned on right side circuit region.
This two kinds of arrangement modes reduce the circuit region of left or right side, are conducive to make the display device of narrow frame.
Arrangement mode 5:As shown in figure 15, scan drive circuit 11 is located at left side circuit region and right side circuit region, and triggering is driven
Dynamic circuit 13 is located at top circuit area.
Scan drive circuit 11 in this arrangement mode positioned at both sides provides stronger driving force, reduces signal and prolongs
Late;The circuit that left or right side circuit region need to be set is reduced, and is conducive to make the display device of narrow frame;And it is individually placed in
The triggering driving circuit 13 of one circuit region is smaller to the change of existing design, facilitates design and production.
Arrangement mode 6:As shown in figure 16, partial scan driving circuit 11 and part triggering driving circuit 13 are located at left side electricity
Road area, partial scan driving circuit 11 and part triggering driving circuit 13 are located at right side circuit region, partial scan driving circuit 11
Positioned at top circuit area.
This arrangement mode compares arrangement mode 2 and increases partial scan driving circuit 11 positioned at top circuit area, therefore
In addition to the advantages of arrangement mode 2, the driving force of scan drive circuit is enhanced.
Arrangement mode 7:As shown in figure 17, scan drive circuit 11 is located at left side circuit region and right side circuit region, and triggering is driven
Dynamic circuit 13 is located at bottom circuit region, and triggering driving circuit 13 can be integrated with data drive circuit module and other driving circuits
It is integrated in the aobvious of display device on a single die or separately as a chip or using devices such as thin film transistor (TFT), capacitances
Show panel bottom.
This arrangement mode, which compares arrangement mode 5, to be changed positioned at the triggering driving circuit 13 in top circuit area to bottom circuit
Area, since the bottom of the display devices such as mobile phone, TV is usually constructed with key area etc. as blocking, this arrangement mode is except row
Outside the advantages of row mode 5, top circuit region is reduced, increases display area.
The invention discloses a kind of triggering driving circuit, which includes N (N >=2, and N is integer) grade and touches
Send out drive circuit unit;N-th (1≤n≤N, and n be integer) grade trigger drive circuit unit include pull-up control module 01, on
Drawing-die block 02, signal control module 03 and pull-down module 04;Pull up control module 01, pull-up module 02 and pull-down module 04
Pull-up control node netAn is connected to, signal control module 03 and pull-down module 04 are connected to output node netBn, output section
Point netBn output triggering drive signals En;The invention also discloses a kind of organic light-emitting display device, which utilizes upper
The triggering driving circuit control bright dark time scales of Organic Light Emitting Diode OLED are stated, are reached under same current driving, display
The function of different grey menus, can be to avoid when showing low grey menu, and since driving current is relatively low, electric current is unstable to be made
Into picture unevenness problem.
It should be noted that above-described embodiment can be freely combined as needed.The above is only the preferred of the present invention
Embodiment, it is noted that for those skilled in the art, in the premise for not departing from the principle of the invention
Under, multiple improvements and modifications can also be made, these improvements and modifications also should be regarded as protection scope of the present invention.