CN108172170B - trigger driving circuit and organic light emitting display device - Google Patents
trigger driving circuit and organic light emitting display device Download PDFInfo
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- CN108172170B CN108172170B CN201711232014.6A CN201711232014A CN108172170B CN 108172170 B CN108172170 B CN 108172170B CN 201711232014 A CN201711232014 A CN 201711232014A CN 108172170 B CN108172170 B CN 108172170B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
Abstract
the invention discloses a trigger driving circuit, which comprises N (N is more than or equal to 2 and is an integer) stages of trigger driving circuit units; the nth (1 ≦ N, and N is an integer) stage trigger driving circuit unit includes a pull-up control module, a pull-up module, a signal control module, and a pull-down module; the pull-up control module, the pull-up module and the pull-down module are connected to a pull-up control node, the signal control module and the pull-down module are connected to an output node, and the output node outputs a trigger driving signal; the invention also discloses an organic light-emitting display device, which utilizes the trigger driving circuit to control the bright-dark time proportion of the organic light-emitting diode, achieves the function of displaying different gray-scale pictures under the same current drive, and can avoid the problem of uneven pictures caused by lower driving current and unstable current when displaying low gray-scale pictures.
Description
Technical Field
the present invention relates to the field of display technologies, and in particular, to a trigger driving circuit and an organic light emitting display device.
Background
The Organic Light Emitting display device utilizes the advantages of Organic Light Emitting Diodes (OLEDs) such as high contrast, high color gamut, wide viewing angle, low power consumption, and being lighter and thinner. The OLED emission principle is briefly: under the action of an external electric field, electrons and holes provided by the anode and the cathode are combined in the light-emitting layer to form an exciton, and the exciton returns to the ground state to emit photons, so that the OLED is a current light-emitting device, and the current intensity is controlled by a circuit in the semiconductor backboard, and further the light-emitting brightness is controlled.
One prior art OLED driving circuit is shown in fig. 1, and includes criss-cross scanning lines and data lines, and a pixel region defined by intersections of the scanning lines and the data lines, and an eleventh thin film transistor T11, a twelfth thin film transistor T12 and an organic light emitting diode OLED are disposed in the pixel region at the intersections of the scanning lines and the data lines. When the scan line transmits a turn-on command to the eleventh thin film transistor T11, the eleventh thin film transistor T11 turns on and issues a turn-on command to the twelfth thin film transistor T12, and since the drain of the twelfth thin film transistor T12 is connected to the high-potential power voltage VDD and the source is connected to the anode of the OLED, the twelfth thin film transistor T12 generates a current to drive the OLED to emit light.
however, the OLED pixel driving circuit is simple, and the OLED light-emitting mode is current-driven, so that the current instability phenomenon caused by the low driving current under the low gray scale condition cannot be effectively avoided, and the low gray scale image often appears uneven (Mura).
Disclosure of Invention
In order to solve the above technical problems, the present invention provides a trigger driving circuit and an organic light emitting display device using the same, wherein the trigger driving circuit outputs a plurality of trigger driving signals with adjustable duty ratios and timing sequences, and the trigger driving signals control the bright-dark time ratios of organic light emitting diodes in the organic light emitting display device, so as to achieve the purpose of displaying different gray-scale images under the same current driving, thereby avoiding the problem of uneven images caused by low driving current and unstable current when displaying low gray-scale images.
The technical scheme provided by the invention is as follows:
the invention discloses a trigger driving circuit, which comprises N (N is more than or equal to 2 and is an integer) stages of trigger driving circuit units; the nth (1 ≦ N, and N is an integer) stage trigger driving circuit unit includes a pull-up control module, a pull-up module, a signal control module, and a pull-down module;
The pull-up control module, the pull-up module and the pull-down module are connected to a pull-up control node, and the signal control module and the pull-down module are connected to an output node;
The pull-down module inputs a first clock signal, the signal control module inputs an nth-stage pulse width modulation signal and a second clock signal, and the output node outputs an nth-stage trigger driving signal.
preferably, the pull-up control module includes a first thin film transistor, a second thin film transistor, and a first capacitor; the grid electrode and the drain electrode of the first thin film transistor are both input with high level, and the source electrode of the first thin film transistor is connected with the grid electrode of the second thin film transistor; the drain electrode of the second thin film transistor is input with high level, and the source electrode of the second thin film transistor is connected with the upper pull control node; the first capacitor comprises a first polar plate and a second polar plate, the first polar plate is connected with a source electrode of the first thin film transistor and a grid electrode of the second thin film transistor, and the second polar plate is connected with the upper pull control node.
Preferably, the pull-up module comprises a third thin film transistor, a fourth thin film transistor and a second capacitor; the grid electrode and the drain electrode of the third thin film transistor are both input with high level, and the source electrode of the third thin film transistor is connected with the grid electrode of the fourth thin film transistor; the drain electrode of the fourth thin film transistor is input with high level, and the source electrode of the fourth thin film transistor is connected with the output node and outputs the nth stage trigger driving signal.
Preferably, the signal control module includes a fifth thin film transistor and a seventh thin film transistor; the grid electrode of the fifth thin film transistor is connected with the source electrode of the seventh thin film transistor, the drain electrode of the fifth thin film transistor is connected with the upper pull control node, and the source electrode of the fifth thin film transistor is input with power supply negative voltage; the gate of the seventh thin film transistor is inputted with the second clock signal, and the drain of the seventh thin film transistor is inputted with the nth-stage pulse width modulation signal.
Preferably, the pull-down module includes a sixth thin film transistor and an eighth thin film transistor; the grid electrode of the sixth thin film transistor is connected with the source electrode of the eighth thin film transistor, the sixth thin film transistor and the drain electrode are connected with an output node, and the source electrode inputs power supply negative voltage; the gate of the eighth thin film transistor is connected to the first clock signal, and the drain of the eighth thin film transistor is connected to the pull-up control node.
Preferably, the nth stage trigger driving circuit unit further includes a second auxiliary thin film transistor;
The grid electrode of the second auxiliary thin film transistor is used for inputting a clearing signal, the drain electrode of the second auxiliary thin film transistor is connected with the output node, and the source electrode of the second auxiliary thin film transistor is used for inputting power supply negative voltage.
preferably, the nth stage trigger driving circuit unit further includes a first auxiliary thin film transistor;
And a grid electrode of the first auxiliary thin film transistor is used for inputting a clearing signal, a drain electrode of the first auxiliary thin film transistor is connected with a source electrode of the seventh thin film transistor and a grid electrode of the fifth thin film transistor, and a source electrode of the first auxiliary thin film transistor is used for inputting power supply negative voltage.
Preferably, the nth stage trigger driving circuit unit further includes a third auxiliary thin film transistor;
the grid electrode of the third auxiliary thin film transistor is used for inputting an erasing signal, the drain electrode of the third auxiliary thin film transistor is connected with the source electrode of the eighth thin film transistor and the grid electrode of the sixth thin film transistor, and the source electrode of the third auxiliary thin film transistor is used for inputting a high level.
preferably, the trigger driving signal of the nth stage output by the trigger driving circuit unit of the nth stage (1 ≦ N — 1, and N is an integer) is input to the trigger driving circuit unit of the (N + 1) th stage as the pulse width modulation signal of the (N + 1) th stage.
The present invention also discloses an organic light emitting display device including: scanning lines and data lines which are criss-cross, and a plurality of pixel areas defined by the intersection of the scanning lines and the data lines, wherein each row of the scanning lines inputs scanning voltage into the corresponding pixel area, each row of the data lines inputs data voltage into the corresponding pixel area, each pixel area is provided with an organic light-emitting diode driving circuit,
The organic light emitting display device further comprises the trigger driving circuit described in any one of the above; each stage of the trigger driving circuit unit corresponds to one row of scanning lines, and each stage of the trigger driving circuit unit inputs trigger driving signals into a plurality of pixel areas defined by the corresponding scanning lines;
each organic light emitting diode driving circuit includes: an eleventh thin film transistor, a twelfth thin film transistor, a thirteenth thin film transistor, and an organic light emitting diode;
A grid electrode of the eleventh thin film transistor is connected with the scanning line, a drain electrode of the eleventh thin film transistor is connected with the data line, and a source electrode of the eleventh thin film transistor is connected with a grid electrode of the twelfth thin film transistor;
A source electrode of the twelfth thin film transistor is connected with a drain electrode of the thirteenth thin film transistor;
the grid electrode of the thirteenth thin film transistor is connected with the trigger driving circuit corresponding to the pixel region, and the source electrode of the thirteenth thin film transistor is connected with the organic light emitting diode;
The organic light emitting diode comprises an anode and a cathode, wherein the anode is connected with the source electrode of the thirteenth thin film transistor, and the cathode is input with power supply negative voltage.
Compared with the prior art, the invention can bring at least one of the following beneficial effects:
1. the trigger driving circuit can flexibly adjust the duty ratio and the time sequence of a plurality of output trigger driving signals by adjusting a first clock signal, a second clock signal and a pulse width modulation signal which are input externally;
2. the trigger driving circuit can achieve the effect that the timing sequence of the n +1 th stage trigger driving signal lags behind the timing sequence of the nth stage trigger driving signal, the timing sequence of the scanning voltage input by the scanning line corresponding to the n +1 th row lags behind the timing sequence of the scanning voltage input by the scanning line corresponding to the n th row, and the organic light emitting diode driving circuits in different rows of pixel areas can be controlled more effectively and finely.
3. the organic light emitting display device can achieve the function of displaying different gray scale pictures under the condition that the organic light emitting diodes receive the same driving current;
4. The organic light emitting display device can avoid the problem of uneven picture caused by unstable current due to lower driving current when displaying low gray scale picture;
Drawings
the present invention will be further described in the following detailed description of preferred embodiments, which is to be read in connection with the accompanying drawings.
FIG. 1 is a schematic diagram of a prior art OLED driving circuit;
FIG. 2 is a schematic diagram of a trigger driving circuit according to the present invention;
FIG. 3 is a schematic circuit diagram of a trigger driving circuit unit in the trigger driving circuit according to the present invention;
FIG. 4 is a timing diagram of the main signals of one embodiment of the trigger driving circuit shown in FIG. 2;
FIG. 5 is a timing diagram of the first clock signal and the second clock signal of another embodiment of the trigger driving circuit of the present invention;
FIG. 6 is a diagram of a first auxiliary TFT that may be added to the trigger driving circuit of FIG. 3;
FIG. 7 is a diagram of a second auxiliary TFT that may be added to the trigger driving circuit of FIG. 3;
FIG. 8 is a diagram of a third auxiliary TFT that may be added to the trigger driving circuit of FIG. 3;
FIG. 9 is a schematic diagram of an OLED driving circuit in an OLED display device according to the present invention;
FIG. 10 is a timing diagram of the main signals of the OLED driving circuit shown in FIG. 9;
FIG. 11 is a schematic structural diagram of an organic light emitting display device according to an embodiment of the present invention;
FIG. 12 is a schematic structural diagram of another embodiment of an organic light emitting display device according to the present invention;
FIG. 13 is a schematic structural diagram of another embodiment of an organic light emitting display device according to the present invention;
FIG. 14 is a schematic structural diagram of another embodiment of an organic light emitting display device according to the present invention;
FIG. 15 is a schematic structural diagram of another embodiment of an organic light emitting display device according to the present invention;
FIG. 16 is a schematic structural diagram of another embodiment of an organic light emitting display device according to the present invention;
fig. 17 is a schematic structural diagram of another embodiment of an organic light emitting display device according to the present invention.
Detailed Description
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following description will be made with reference to the accompanying drawings. It is obvious that the drawings in the following description are only some examples of the invention, and that for a person skilled in the art, other drawings and embodiments can be derived from them without inventive effort.
For the sake of simplicity, the drawings only schematically show the parts relevant to the present invention, and they do not represent the actual structure as a product. In addition, in order to make the drawings concise and understandable, components having the same structure or function in some of the drawings are only schematically illustrated or only labeled. In this document, "one" means not only "only one" but also a case of "more than one".
The structure of the trigger driving Circuit of the present invention is shown in fig. 2, the trigger driving Circuit includes N (N ≧ 2, and N is an integer) trigger driving Circuit units (Emission Circuit), and a Circuit diagram of the nth (1 ≦ N, and N is an integer) trigger driving Circuit unit is shown in fig. 3. The nth stage trigger driving circuit unit includes a pull-up control module 01, a pull-up module 02, a signal control module 03, and a pull-down module 04. The pull-up control module 01 and the pull-up module 02 both input a high level VGH, and the signal control module 03 and the pull-down module 04 both input a power supply negative voltage VSS; the pull-up control module 01, the signal control module 03 and the pull-down module 04 are connected to the pull-up control node netAn, and the pull-up module 02 and the pull-down module 04 are connected to the output node netBn. The output node netBn outputs a trigger driving signal Emission, and the nth stage trigger driving signal is denoted as En.
The pull-up control module 01 receives the high level VGH and charges the pull-up control node netAn.
The pull-up module 02 receives the high level VGH, charges the output node netBn, is controlled by the output node netBn, and outputs a trigger driving signal En.
The signal control module 03 receives the nth pwm signal PWMn and the second clock signal CK2, and performs pull-down clearing on the pull-up control node netAn.
the pull-down module 04 receives the first clock signal CK1, and is controlled by the pull-up control node netAn to pull down and clear the output node netBn.
specifically, the pull-up control module 01 includes a first thin film transistor T1, a second thin film transistor T2, and a first capacitor C1. The gate and the drain of the first thin film transistor T1 are both connected to a high level VGH, and the source of the first thin film transistor T1 is connected to the gate of the second thin film transistor T2; the drain of the second thin film transistor T2 is connected to the high level VGH, and the source of the second thin film transistor T2 is connected to the pull-up control node netAn; the first capacitor C1 includes a first plate connected to the source of the first thin film transistor T1 and the gate of the second thin film transistor T2, and a second plate connected to the pull-up control node netAn.
the pull-up module 02 includes a third thin film transistor T3, a fourth thin film transistor T4, and a second capacitor C2. The gate and the drain of the third tft T3 are both connected to the high level VGH, and the source of the third tft T3 is connected to the gate of the fourth tft T4; the drain of the fourth thin film transistor T4 is connected to the high level VGH, and the source of the fourth thin film transistor T4 is connected to the output node netBn and outputs the trigger driving signal En.
The signal control module 03 includes a fifth thin film transistor T5 and a seventh thin film transistor T7. A gate of the fifth thin film transistor T5 is connected to a source of the seventh thin film transistor T7, a drain of the fifth thin film transistor T5 is connected to the pull-up control node netAn, and a source of the fifth thin film transistor T5 is inputted with the power supply negative voltage VSS; the gate of the seventh thin film transistor T7 is connected to the second clock signal CK2, and the drain of the seventh thin film transistor T7 is connected to the nth-stage pulse width modulation signal PWMn. For convenience of explanation, a connection point of the source electrode of the seventh thin film transistor T7 and the gate electrode of the fifth thin film transistor T5 is referred to as a first node netCn.
the pull-down module 04 includes a sixth thin film transistor T6 and an eighth thin film transistor T8. A gate of the sixth thin film transistor T6 is connected to the source of the eighth thin film transistor T8, a drain of the sixth thin film transistor T6 is connected to the output node netBn, and a source of the sixth thin film transistor T6 receives the negative voltage VSS; the gate of the eighth tft T8 is connected to the first clock signal CK1, and the drain of the eighth tft T8 is connected to the pull-up control node netAn. For convenience of description, a connection point of the source electrode of the eighth tft T8 and the gate electrode of the sixth tft T6 is referred to as a second node netDn.
For five input signals: in the normal display state, the high level VGH is kept high, and the power supply negative voltage VSS is kept low. The nth-stage pwm signal PWMn is a pulse signal with an adjustable duty ratio, the first clock signal CK1 and the second clock signal CK2 have the same period, which is denoted as a first period τ 1, and during the first period τ 1, the first period includes a first period in which the first clock signal CK1 is at a high level and the second clock signal CK2 is at a low level, and a second period includes a second period in which the first clock signal CK1 is at a low level and the second clock signal CK2 is at a high level, for example: the first clock signal CK1 and the second clock signal CK2 may be periodic pulse signals with a duty ratio of 50% as shown in fig. 4, or may be periodic pulse signals with a duty ratio of other than 50% as shown in fig. 5. The period of the pulse width modulation signal PWMn is the second period τ 2.
each frame of the image displayed by the display device is divided into a plurality of subframes, and the period of each signal in the display device is integral multiple of the subframe time.
The working principle of the trigger driving circuit is as follows:
in a normal display state, the high level VGH is at a high potential, the first tft T1 and the third tft T3 are constantly turned on, and the high level VGH is transmitted to the first capacitor C1 and the second capacitor C2, at this time, the gates of the second tft T2 and the fourth tft T4 also receive the high potential of the VGH and are turned on, so that the high potential of the VGH is transmitted to the pull-up control node net an through the second tft T2; the high level VGH is transmitted to the fourth plate of the second capacitor C2 and the drain of the sixth thin film transistor T6 via the fourth thin film transistor T4.
When the pulse width modulation signal PWMn is at the high potential:
when the second clock signal CK2 is at a high level, the seventh thin film transistor T7 is turned on, and at the same time, a high level is transmitted to the gate of the fifth thin film transistor T5 to turn on the transistor T5, so that the charge of the pull-up control node netAn is discharged to the low level VSS through the fifth thin film transistor T5.
in the next sub-frame, the second clock signal CK2 changes to the low level, and accordingly the first clock signal CK1 changes to the high level, the eighth tft T8 is turned on, and the low level of the drain thereof (i.e., the pull-up control node netAn) is transmitted to the source thereof, so as to turn off the sixth tft T6; the fourth thin film transistor T4 is turned on to transmit the high level VGH to the source thereof, so that the output node netBn outputs the trigger driving signal En of the high potential.
when the pwm signal PWMn is at the low potential:
when the second clock signal CK2 is at a high level, the fifth tft T5 is turned off, and the charges transferred to the pull-up control node netAn through the second tft T2 are not effectively discharged, so that the pull-up control node netAn is still at a high level.
In the next sub-frame, the second clock signal CK2 changes to the low level, and accordingly the first clock signal CK1 changes to the high level, the eighth tft T8 is turned on, and the high level of the drain (i.e., the pull-up control node netAn) is transmitted to the source thereof, so as to turn on the sixth tft T6; the sixth tft T6 is turned on to transmit the low-level negative power voltage VSS to the drain thereof, so that the output node netBn outputs the low-level trigger driving signal En.
when the trigger driving circuit of the present invention is applied to a display device, in consideration of the picture stability when the display device is turned on and the problem of charge release when the display device is turned off, one or more auxiliary thin film transistors may be added to the nth stage trigger driving circuit unit, including: a first auxiliary thin film transistor T21 having a drain connected to the first node netCn and a source connected to the power source negative voltage VSS as shown in fig. 6; a second auxiliary thin film transistor T22 having a drain connected to the output node netBn and a source connected to the power source negative voltage VSS as shown in fig. 7; the drain is connected to the second node netDn and the source is connected to the third auxiliary tft T23 with a high VGH as shown in fig. 8. The gates of all three thin film transistors are connected to a clear signal CLR. When the display device is turned on or off, the clear signal CLR is at a high level for one or more sub-frames. The three auxiliary thin film transistors can be added to the trigger driving circuit unit independently, and two or three of the auxiliary thin film transistors can also be added simultaneously.
when the display device is turned on, the high-level clear signal CLR is input to the gate of the third auxiliary tft T23, the third auxiliary tft T23 is turned on, the high level VGH at the high level is transmitted to the second node netDn through the third auxiliary tft T23 to turn on the sixth auxiliary tft T6, and the low level power supply negative voltage VSS is transmitted to the drain of the sixth auxiliary tft T6 through the source thereof, so that the nth level trigger driving signal En is output at the low level, and the display device displays a black image. The newly added third auxiliary thin film transistor T23 can prevent the abnormal display image when the display device is turned on but the data voltage is not transmitted to the pixel region.
when the display device is turned off, the high level VGH becomes the low level, and if there is residual charge at the first node netCn, the first auxiliary thin film transistor T21 is turned on to release the residual charge; if the output node netBn has residual charges, the second auxiliary tft T22 is turned on to release the residual charges; if there is residual charge on the second node netDn, the third auxiliary tft T23 is turned on to release the residual charge, and the release of the residual charge after the shutdown can effectively increase the overall lifetime of each tft in the trigger driving circuit.
The invention also discloses an organic light-emitting display device applying the trigger driving circuit, which comprises the trigger driving circuit, criss-cross scanning lines, data lines and a plurality of pixel areas defined by the intersection of the scanning lines and the data lines, wherein each row of scanning lines inputs scanning voltage into the corresponding pixel area, each row of data lines inputs data voltage into the corresponding pixel area, and each pixel area is provided with an organic light-emitting diode driving circuit. The trigger driving circuit is composed of N stages (N is more than or equal to 2 and is an integer) of trigger driving circuit units, each stage of trigger driving circuit unit corresponds to one row of scanning lines, and the nth stage (N is more than or equal to 1 and less than or equal to N and is an integer) of trigger driving circuit inputs the nth stage of trigger driving signal En into a plurality of pixel areas limited by the corresponding scanning lines.
The organic light emitting diode driving circuits have a structure as shown in fig. 9, and each of the organic light emitting diode driving circuits includes an eleventh thin film transistor T11, a twelfth thin film transistor T12, a thirteenth thin film transistor T13 and an organic light emitting diode OLED at an intersection of a scan line and a data line.
wherein the eleventh thin film transistor T11 is turned on or off according to the scan voltage, transmits the data voltage to the twelfth thin film transistor T12 when turned on, and controls the twelfth thin film transistor T12 to be turned on or off; the twelfth thin film transistor T12 generates a driving current to be transmitted to the thirteenth thin film transistor T13 when turned on; the thirteenth thin film transistor T13 is turned on or off according to the externally input trigger driving signal Emission to control whether the driving current generated by the twelfth thin film transistor T12 is transmitted to the organic light emitting diode OLED; the organic light emitting diode OLED generates light after receiving the driving current transmitted by the thirteenth thin film transistor T13.
therefore, under the condition that the driving currents received by the organic light emitting diodes OLED are the same, the thirteenth thin film transistor T13 is turned on and off at different time ratios, and the pixel region can display images with different gray scales due to the persistence of vision effect of human eyes. The problem of uneven picture caused by low driving current and unstable current when displaying low gray scale is avoided.
The specific structure of the organic light emitting diode driving circuit is as follows:
A gate electrode of the eleventh thin film transistor T11 is connected to the scan line, a drain electrode of the eleventh thin film transistor T11 is connected to the data line, and a source electrode of the eleventh thin film transistor T11 is connected to a gate electrode of the twelfth thin film transistor T12;
A gate of the twelfth thin film transistor T12 is connected to a source of the eleventh thin film transistor T11, a drain of the twelfth thin film transistor T12 is inputted with the power supply voltage VDD, and a source of the twelfth thin film transistor T12 is connected to a drain of the thirteenth thin film transistor T13;
A gate of the thirteenth thin film transistor T13 inputs a trigger driving signal Emission, a drain of the thirteenth thin film transistor T13 is connected to a source of the twelfth thin film transistor T12, and a source of the thirteenth thin film transistor T13 is connected to an anode of the organic light emitting diode;
the organic light emitting diode includes an anode connected to the source of the thirteenth thin film transistor T13 and a cathode to which a power supply negative voltage VSS is input.
A source electrode of the eleventh thin film transistor T11 and a gate electrode of the twelfth thin film transistor T12 are electrically connected to the pixel electrode, a driving voltage line for transmitting the power supply voltage VDD has an overlapping region with the pixel electrode and is separated therefrom by an interlayer insulating film, and the driving voltage line and the pixel electrode constitute a storage capacitor Cst using the interlayer insulating film as a dielectric material. One end of the storage capacitor Cst is connected to the source electrode of the eleventh thin film transistor T11 and the gate electrode of the twelfth thin film transistor T12, and the other end of the storage capacitor Cst is connected to the power voltage VDD and the drain electrode of the twelfth thin film transistor T12.
For convenience of explanation, a junction of the source of the eleventh thin film transistor T11 and the gate of the twelfth thin film transistor T12 is referred to as a node P.
FIG. 10 is a timing diagram of the main signals of the OLED driving circuit according to the present invention. In the normal display state, the power supply voltage VDD is kept at a high potential, and the power supply negative voltage VSS is kept at a low potential. When the scan line of the row transmits the scan voltage to the eleventh thin film transistor T11, the eleventh thin film transistor T11 is turned on, transmits the data voltage of the drain thereof to the storage capacitor Cst, and gives an on command to the twelfth thin film transistor T12. After that, both the scan voltage and the data voltage drop to the low level, the node P maintains the high potential since the eleventh thin film transistor T11 is turned off. When the twelfth thin film transistor T12 is turned on, a driving current is generated to be supplied from the drain thereof to the drain of the thirteenth thin film transistor T13. Meanwhile, the trigger driving signal emision controls the thirteenth thin film transistor T13 to be turned on and off, and the trigger driving signal emision is a pulse signal with an adjustable duty ratio, so that the timing sequence of the trigger driving signal is the timing sequence for controlling the brightness of the organic light emitting diode when the twelfth thin film transistor T12 is turned on. That is, when the trigger driving signal emision is at a low level, the thirteenth thin film transistor T13 is turned off, no current is input to the anode of the organic light emitting diode, and the organic light emitting diode does not emit light; when the trigger driving signal emision is at a high level, the twelfth thin film transistor T12 and the thirteenth thin film transistor T13 are turned on, and a current is input to the anode of the organic light emitting diode via the thirteenth thin film transistor T13, and the organic light emitting diode emits light. Therefore, the light and dark timings of the organic light emitting diode are pulse timings having a duty ratio in accordance with the trigger driving signal Emission.
in the organic light emitting display device of the present invention, the nth stage trigger driving signal En controls the thirteenth thin film transistor to be turned on or off in the pixel region defined by the corresponding scan line, and since the timing of the scan voltage input by the N +1 th (1 ≦ N-1, and N is an integer) row scan line lags the timing of the scan voltage input by the nth row scan line, it is preferable that the timing of the N +1 th stage trigger driving signal En +1 lags the timing of the nth stage trigger driving signal En by one or more subframes, so that the organic light emitting diode driving circuits in different rows of pixel regions can be more effectively and finely controlled.
Therefore, in this embodiment, the nth stage trigger driving signal En output by the nth stage trigger driving circuit unit (where 1 ≦ N — 1, and N is an integer) is input to the nth +1 stage trigger driving circuit unit as the (N + 1) th stage pulse width modulation signal PWMn + 1. The 1 st-stage PWM signal is an externally input 1 st-stage PWM signal PWM 1.
For example: FIG. 4 is a timing diagram of the main signals in the trigger driving circuit. In the figure, the second period τ 2 of the externally input pulse width modulation signal PWM1 of the 1 st stage is 11 subframes, and the first period τ 1 of the common period of the first clock signal CK1 and the second clock signal CK2 is 2 subframes. Only the timing diagrams of E1, E2, E3 are shown in fig. 4, and the subsequent trigger driving signal emision can be analogized in turn.
in fact, the gray scale recognized by the pixel by human eyes is determined by the ratio of bright time to dark time of the organic light emitting diode, i.e., the duty ratio of the nth stage trigger driving signal En input to the nth stage organic light emitting diode circuit. Therefore, in other embodiments, adjusting the period and timing relationship of the pwm signal PWMn, the first clock signal CK1, and the second clock signal CK2 can allow for more flexible selection. Accordingly, the structure of the trigger driving circuit unit and the connection relationship between the trigger driving circuit units may also be modified and simplified.
For example: the time sequence of the pulse width modulation signal PWMn can be divided into a plurality of stages, the duty ratio of each stage is different, so that the duty ratios of trigger driving signals input into the organic light emitting diode driving circuits of different rows are different, and the problem that the brightness of the upper part and the lower part of a panel is different due to the fact that the sizes of the driving circuits of the upper part and the lower part of the panel are different in the conventional organic light emitting display device generally exists, so that the trigger driving circuit of the embodiment can effectively make up the difference; or the nth stage trigger driving circuit unit respectively receives the nth stage pulse width modulation signal PWMn input from the outside, the duty ratio of the nth stage pulse width modulation signal PWMn corresponds to the average gray scale to be displayed by the pixels of the row, and the power consumption of the display device can be reduced; or the same pulse width modulation signal PWMn is input to each stage of the trigger driving circuit unit, and the trigger driving signal En received by each organic light emitting diode driving circuit is controlled at the same time, so that the structure of the trigger driving circuit can be simplified.
the organic light emitting diode driving circuit solves the problems of small and unstable current under low gray scale, so that the low gray scale can be further subdivided by regulating and controlling the duty ratio of the pulse width modulation signal PWMn on the basis. Human eyes have higher sensitivity to low gray scale, so the invention can effectively optimize the picture quality.
The invention also discloses a circuit distribution structure of the organic light-emitting display device. The display device not only comprises the trigger driving circuit 13, criss-cross scanning lines and data lines, and a plurality of pixel areas defined by the intersection of the scanning lines and the data lines, wherein each pixel area is provided with an organic light-emitting diode driving circuit; the display device further includes a scan driving circuit 11 for supplying signals to the scan lines, a data driving circuit for supplying signals to the data lines, and other driving circuits (e.g., a timing control circuit, a gamma voltage generator, etc.), and the data driving circuit and the other driving circuits are collectively referred to as a data and other driving circuits 12. The display device periphery may have a top circuit area, a bottom circuit area, a left circuit area, and a right circuit area, wherein the data and other driving circuits 12 are usually located in the bottom circuit area and are usually in the form of separate chips; the top circuit region, the left circuit region, and the right circuit region may be separate chips, or may be integrated on a display panel of the display device using devices such as thin film transistors.
Therefore, the scan driving circuit 11 and the trigger driving circuit 13 may be arranged in various ways in the display device, including:
Arrangement mode 1: as shown in fig. 11, the scan driving circuit 11 is located in the left circuit region, and the trigger driving circuit 13 is located in the right circuit region.
the arrangement mode is to place the scanning drive circuit 11 and the trigger drive circuit 13 in two different circuit areas respectively, which is convenient for design and production.
arrangement mode 2: as shown in fig. 12, the partial scan driving circuit 11 and the partial trigger driving circuit 13 are located in the left circuit area, and the partial scan driving circuit 11 and the partial trigger driving circuit 13 are located in the right circuit area.
The arrangement is provided with the scan driving circuit 11 and the trigger driving circuit 13 on both sides of the panel, so that the scan voltage and the trigger driving voltage can reach each pixel region of the display panel in a shorter time, and the signal delay is reduced.
arrangement 3: as shown in fig. 13, the scan driving circuit 11 and the trigger driving circuit 13 are both located in the left circuit area.
Arrangement 4: as shown in fig. 14, the scan driving circuit 11 and the trigger driving circuit 13 are both located in the right circuit area.
The two arrangement modes reduce the circuit area on the left side or the right side, and are favorable for manufacturing a display device with a narrow frame.
Arrangement 5: as shown in fig. 15, the scan driving circuit 11 is located in the left and right circuit regions, and the trigger driving circuit 13 is located in the top circuit region.
The scan driving circuits 11 located at both sides in this arrangement provide stronger driving capability, reducing signal delay; circuits required to be arranged in the left side circuit area or the right side circuit area are reduced, and the display device with a narrow frame is favorably manufactured; and the trigger driving circuit 13 which is independently arranged in a circuit area has small change to the existing design, thereby being convenient for design and production.
arrangement 6: as shown in fig. 16, the partial scan driving circuit 11 and the partial trigger driving circuit 13 are located in the left circuit region, the partial scan driving circuit 11 and the partial trigger driving circuit 13 are located in the right circuit region, and the partial scan driving circuit 11 is located in the top circuit region.
This arrangement increases the portion of the scan driving circuit 11 in the top circuit region compared to the arrangement 2, thereby enhancing the driving capability of the scan driving circuit in addition to the advantages of the arrangement 2.
arrangement 7: as shown in fig. 17, the scan driving circuit 11 is located in the left circuit area and the right circuit area, the trigger driving circuit 13 is located in the bottom circuit area, and the trigger driving circuit 13 may be integrated with the data driving circuit module and other driving circuits on a single chip, or be used as a single chip alone, or be integrated on the bottom of the display panel of the display device using thin film transistors, capacitors, and the like.
compared with the arrangement mode 5, the arrangement mode changes the trigger driving circuit 13 positioned in the top circuit area into the bottom circuit area, and because the bottom of the display devices such as mobile phones, televisions and the like is generally provided with a key area and the like as a shield, the arrangement mode reduces the top circuit area and increases the display area besides the advantages of the arrangement mode 5.
The invention discloses a trigger driving circuit, which comprises N (N is more than or equal to 2 and is an integer) stages of trigger driving circuit units; the nth (1 ≦ N, where N is an integer) stage trigger driving circuit unit includes a pull-up control module 01, a pull-up module 02, a signal control module 03, and a pull-down module 04; the pull-up control module 01, the pull-up module 02 and the pull-down module 04 are connected to a pull-up control node netAn, the signal control module 03 and the pull-down module 04 are connected to an output node netBn, and the output node netBn outputs a trigger driving signal En; the invention also discloses an organic light-emitting display device, which utilizes the trigger driving circuit to control the brightness time proportion of the organic light-emitting diode OLED, achieves the function of displaying different gray-scale pictures under the same current drive, and can avoid the problem of uneven pictures caused by low driving current and unstable current when displaying low gray-scale pictures.
it should be noted that the above embodiments can be freely combined as necessary. The foregoing is only a preferred embodiment of the present invention, and it should be noted that various modifications and adaptations can be made by those skilled in the art without departing from the principle of the present invention, and should be considered as the scope of the present invention.
Claims (6)
1. A trigger drive circuit is characterized by comprising N (N is more than or equal to 2 and is an integer) stages of trigger drive circuit units; the nth (1 ≦ N, and N is an integer) stage trigger driving circuit unit includes a pull-up control module, a pull-up module, a signal control module, and a pull-down module;
The pull-up control module, the pull-up module and the pull-down module are connected to a pull-up control node, and the signal control module and the pull-down module are connected to an output node;
the pull-down module inputs a first clock signal, the signal control module inputs an nth-level pulse width modulation signal and a second clock signal, and the output node outputs an nth-level trigger driving signal; wherein the content of the first and second substances,
The pull-up control module comprises a first thin film transistor, a second thin film transistor and a first capacitor; the grid electrode and the drain electrode of the first thin film transistor are both input with high level, and the source electrode of the first thin film transistor is connected with the grid electrode of the second thin film transistor; the drain electrode of the second thin film transistor is input with high level, and the source electrode of the second thin film transistor is connected with the upper pull control node; the first capacitor comprises a first polar plate and a second polar plate, the first polar plate is connected with a source electrode of the first thin film transistor and a grid electrode of the second thin film transistor, and the second polar plate is connected with the upper pull control node;
The pull-up module comprises a third thin film transistor, a fourth thin film transistor and a second capacitor; the grid electrode and the drain electrode of the third thin film transistor are both input with high level, and the source electrode of the third thin film transistor is connected with the grid electrode of the fourth thin film transistor; the drain electrode of the fourth thin film transistor is input with high level, and the source electrode of the fourth thin film transistor is connected with the output node and outputs the nth-stage trigger driving signal;
the signal control module comprises a fifth thin film transistor and a seventh thin film transistor; the grid electrode of the fifth thin film transistor is connected with the source electrode of the seventh thin film transistor, the drain electrode of the fifth thin film transistor is connected with the upper pull control node, and the source electrode of the fifth thin film transistor is input with power supply negative voltage; a second clock signal is input to the grid electrode of the seventh thin film transistor, and an nth-level pulse width modulation signal is input to the drain electrode of the seventh thin film transistor;
The pull-down module comprises a sixth thin film transistor and an eighth thin film transistor; the grid electrode of the sixth thin film transistor is connected with the source electrode of the eighth thin film transistor, the sixth thin film transistor and the drain electrode are connected with an output node, and the source electrode inputs power supply negative voltage; the gate of the eighth thin film transistor is connected to the first clock signal, and the drain of the eighth thin film transistor is connected to the pull-up control node.
2. the trigger driving circuit according to claim 1, wherein: the nth-stage trigger driving circuit unit further comprises a second auxiliary thin film transistor;
The grid electrode of the second auxiliary thin film transistor is used for inputting a clearing signal, the drain electrode of the second auxiliary thin film transistor is connected with the output node, and the source electrode of the second auxiliary thin film transistor is used for inputting power supply negative voltage.
3. the trigger driving circuit according to claim 1, wherein: the nth-stage trigger driving circuit unit further comprises a first auxiliary thin film transistor;
And a grid electrode of the first auxiliary thin film transistor is used for inputting a clearing signal, a drain electrode of the first auxiliary thin film transistor is connected with a source electrode of the seventh thin film transistor and a grid electrode of the fifth thin film transistor, and a source electrode of the first auxiliary thin film transistor is used for inputting power supply negative voltage.
4. The trigger driving circuit according to claim 1, wherein: the nth-stage trigger driving circuit unit further comprises a third auxiliary thin film transistor;
The grid electrode of the third auxiliary thin film transistor is used for inputting an erasing signal, the drain electrode of the third auxiliary thin film transistor is connected with the source electrode of the eighth thin film transistor and the grid electrode of the sixth thin film transistor, and the source electrode of the third auxiliary thin film transistor is used for inputting a high level.
5. the trigger driving circuit according to claim 1, wherein:
The trigger driving signal of the nth stage output by the trigger driving circuit unit of the nth stage (1 ≦ N-1, and N is an integer) is input to the trigger driving circuit unit of the nth +1 stage as the pulse width modulation signal of the nth +1 stage.
6. An organic light emitting display device comprising: scanning lines and data lines which are criss-cross and a plurality of pixel areas which are defined by the intersection of the scanning lines and the data lines, wherein each row of the scanning lines inputs scanning voltage into the corresponding pixel area, each row of the data lines inputs data voltage into the corresponding pixel area, and each pixel area is provided with an organic light-emitting diode driving circuit, which is characterized in that:
Further comprising a trigger driving circuit according to any of claims 1-5; each stage of the trigger driving circuit unit corresponds to one row of scanning lines, and each stage of the trigger driving circuit unit inputs trigger driving signals into a plurality of pixel areas defined by the corresponding scanning lines;
each organic light emitting diode driving circuit includes: an eleventh thin film transistor, a twelfth thin film transistor, a thirteenth thin film transistor, and an organic light emitting diode;
A grid electrode of the eleventh thin film transistor is connected with the scanning line, a drain electrode of the eleventh thin film transistor is connected with the data line, and a source electrode of the eleventh thin film transistor is connected with a grid electrode of the twelfth thin film transistor;
A source electrode of the twelfth thin film transistor is connected with a drain electrode of the thirteenth thin film transistor;
The grid electrode of the thirteenth thin film transistor is connected with the trigger driving circuit corresponding to the pixel region, and the source electrode of the thirteenth thin film transistor is connected with the organic light emitting diode;
The organic light emitting diode comprises an anode and a cathode, wherein the anode is connected with the source electrode of the thirteenth thin film transistor, and the cathode is input with power supply negative voltage.
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| CN111312175A (en) * | 2020-04-22 | 2020-06-19 | 南京中电熊猫平板显示科技有限公司 | Trigger driving circuit and organic light emitting display device |
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