Disclosure of Invention
In order to solve the above technical problems, the present invention provides a trigger driving circuit and a display device, which utilize the scan signal of the existing GDM circuit to generate the trigger driving signal required by the OLED, thereby saving the number of transistors and achieving the narrow frame requirement.
The technical scheme provided by the invention is as follows:
the invention discloses a trigger driving circuit which is used for providing signals for a pixel driving circuit, and the trigger driving circuit is used for generating a compensation control signal, a voltage input control signal and a reset signal according to a received scanning signal or a pull-up node signal output by a scanning driving circuit; the compensation control signal is used in a compensation stage of the pixel driving circuit, the voltage input control signal is used in a voltage input stage of the pixel driving circuit, and the reset signal is used in a reset stage of the pixel driving circuit; and the trigger driving circuit is also used for generating a light-emitting control signal for a light-emitting stage of the pixel driving circuit according to the received clock signal.
Preferably, the trigger driving circuit comprises a pull-up control module, a pull-up module, a node pull-down module and an output pull-down module; the pull-up control module, the node pull-down module and the pull-up module are connected to a first node, and the output pull-down module is respectively connected with the pull-up module and the node pull-down module; the pull-up control module inputs the clock signal; the node pull-down module inputs the scanning signal or the pull-up node signal; the pull-up module outputs a trigger driving signal through a trigger driving signal line; the trigger driving signal includes the compensation control signal, the voltage input control signal, the reset signal, and the light emission control signal.
Preferably, the pull-up control module includes a sixth transistor; the control end of the sixth transistor inputs the clock signal, the first path end of the sixth transistor is connected with a high potential, and the second path end of the sixth transistor is connected with the first node.
Preferably, the node pull-down module comprises a fifth transistor; the control end of the fifth transistor inputs the scanning signal or the pull-up node signal output by the scanning driving circuit, the first path end of the fifth transistor is connected with the first node, and the second path end of the fifth transistor is connected with a low potential.
Preferably, the pull-up module includes a seventh transistor; the control end of the seventh transistor is connected with the first node, the first path end of the seventh transistor is connected with a high potential, and the second path end of the seventh transistor outputs the trigger driving signal through the trigger driving signal line.
Preferably, the output pull-down module includes a ninth transistor and a tenth transistor; the control end of the ninth transistor and the control end of the tenth transistor are connected with each other and are connected with the node pull-down module, the first path end of the tenth transistor is connected with the trigger driving signal line of the pull-up module, the second path end of the tenth transistor is connected with the first path end of the ninth transistor, and the second path end of the ninth transistor is connected with a low potential.
Preferably, the trigger driving circuit further includes an eighth transistor; the control end of the eighth transistor is connected to the trigger driving signal line of the pull-up module, the first path end of the eighth transistor is respectively connected to the second path end of the tenth transistor and the first path end of the ninth transistor, and the second path end of the eighth transistor is connected to a high potential.
Preferably, the trigger driving circuit further comprises a clearing module; the clearing module comprises an eleventh transistor and a twelfth transistor; a control end of the eleventh transistor inputs a clear signal, a first path end of the eleventh transistor is connected to a trigger driving signal line of the pull-up module, and a second path end of the eleventh transistor is connected to a low potential; the control end of the twelfth transistor inputs an emptying signal, the first path end of the twelfth transistor is connected to the first node, and the second path end of the twelfth transistor is connected with a low potential.
Preferably, the trigger driving circuit further comprises a first capacitor; the first capacitor is respectively connected with the first node and the trigger driving signal line.
The invention also discloses a display device, which comprises a scanning drive circuit, a pixel drive circuit, a data drive circuit and the trigger drive circuit; the trigger driving circuit is respectively electrically connected with the scanning driving circuit, the pixel driving circuit and the data driving circuit; the trigger driving circuit receives the scanning signal or the pull-up node signal output by the scanning driving circuit and generates a compensation control signal, a voltage input control signal and a reset signal to be input to the pixel driving circuit; the trigger driving circuit also receives the clock signal output by the data driving circuit and generates a light-emitting control signal to be input to the pixel driving circuit.
Compared with the prior art, the OLED display panel and the drive method thereof have the advantages that the trigger drive circuit is matched with the general internal compensation circuit, so that the threshold voltage with uneven general manufacture procedures can be effectively compensated, the threshold voltage deviation caused by the aging of the OLED drive transistor can be compensated, the uneven brightness of the panel caused by the display mura of the OLED panel and the aging of the drive transistor can be effectively solved, the layout area required by the trigger drive circuit is reduced, the frame of the panel can be effectively reduced, and the market requirement of narrow frames is met.
Detailed Description
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following description will be made with reference to the accompanying drawings. It is obvious that the drawings in the following description are only some examples of the invention, and that for a person skilled in the art, other drawings and embodiments can be derived from them without inventive effort.
For the sake of simplicity, the drawings only schematically show the parts relevant to the present invention, and they do not represent the actual structure as a product. In addition, in order to make the drawings concise and understandable, components having the same structure or function in some of the drawings are only schematically illustrated or only labeled. In this document, "one" means not only "only one" but also a case of "more than one".
Fig. 2 is a schematic diagram of a trigger driving circuit according to the present invention.
As shown in fig. 2, a trigger driving circuit for providing signals to a pixel driving circuit, the trigger driving circuit being configured to generate a compensation control signal, a voltage input control signal and a reset signal according to a received scan signal Gn or a pull-up node signal output by a scan driving circuit; the compensation control signal is used in a compensation stage of the pixel driving circuit, the voltage input control signal is used in a voltage input stage of the pixel driving circuit, and the reset signal is used in a reset stage of the pixel driving circuit; and the trigger driving circuit is further configured to generate a light emission control signal for a light emission phase of the pixel driving circuit based on the received clock signal CKm (+ n).
As shown in fig. 2, the trigger driving circuit includes a pull-up control module 01, a pull-up module 02, a node pull-down module 03, and an output pull-down module 04; the pull-up control module 01, the node pull-down module 03 and the pull-up module 02 are connected to a first node A, and the output pull-down module 04 is respectively connected with the pull-up module 01 and the node pull-down module 03; the pull-up control module 01 inputs the clock signal CK; the node pull-down module 03 inputs the scan signal Gn or the pull-up node signal netAn; the pull-up module 02 outputs a trigger driving signal En through a trigger driving signal line; the trigger driving signal En includes the compensation control signal, the voltage input control signal, the reset signal, and the light emission control signal.
As shown in fig. 2, the pull-up control module 01 includes a sixth transistor T6; the clock signal CKm (+ n) is input to a control terminal of the sixth transistor T6, and a first path terminal of the sixth transistor T6 is connected to a high potentialVGHAnd a second path terminal of the sixth transistor T6 is connected to the first node a.
The node pull-down module 03 includes a fifth transistor T5; the control terminal of the fifth transistor T5 inputs the scan signal Gn or the pull-up node signal outputted from the scan driving circuitNetAnA first path terminal of the fifth transistor T5 is connected to the first node a, and a second path terminal of the fifth transistor T5 is connected to a low potential VSS.
The pull-up module 02 includes a seventh transistor T7; a control terminal of the seventh transistor T7 is connected to the first node a, a first path terminal of the seventh transistor T7 is connected to the high voltage VGH, and a second path terminal of the seventh transistor T7 outputs the trigger driving signal En through the trigger driving signal line.
The output pull-down module 04 includes a ninth transistor T9 and a tenth transistor T10; the control terminal of the ninth transistor T9 and the control terminal of the tenth transistor T10 are connected to the node pull-down module 03 (i.e., the control terminal of the ninth transistor T9 and the control terminal of the tenth transistor T10 input the scan signal Gn output by the scan driving circuit or the pull-up node signal NetA), the first pass terminal of the tenth transistor T10 is connected to the trigger driving signal line of the pull-up module 02, the second pass terminal of the tenth transistor T10 is connected to the first pass terminal of the ninth transistor T9, and the second pass terminal of the ninth transistor T9 is connected to the low voltage VSS.
The trigger driving circuit further includes an eighth transistor T8; a control end of the eighth transistor T8 is connected to the trigger driving signal line of the pull-up module 02, a first path end of the eighth transistor T8 is respectively connected to a second path end of the tenth transistor T10 and a first path end of the ninth transistor T9, and a second path end of the eighth transistor T8 is connected to the high voltage VGH.
The trigger driving circuit further comprises a clearing module 05; the clear module 05 includes an eleventh transistor T11 and a twelfth transistor T12; a control terminal of the eleventh transistor T11 inputs a clear signal CLRE, a first path terminal of the eleventh transistor T11 is connected to the trigger driving signal line of the pull-up module 02, and a second path terminal of the eleventh transistor T11 is connected to a low potential VSS; a control terminal of the twelfth transistor T12 inputs a clear signal CLRE, a first path terminal of the twelfth transistor T12 is connected to the first node a, and a second path terminal of the twelfth transistor T12 is connected to a low potential VSS.
The trigger driving circuit further comprises a first capacitor C; the first capacitor C is connected to the first node a and the trigger driving signal line, respectively. The capacitor is mainly used for coupling the voltage of the first node a when the pull-up module 02 starts to transmit a high voltage to the output of the trigger driving signal line, so as to drive the gate voltage of the seventh transistor T7 to be pulled up, drive Vgs > Vth of the pull-up module 02, and enable the voltage of the trigger driving signal line for outputting the trigger driving signal to reach the high voltage.
Specifically, the trigger driving circuit of the present invention is developed to support the requirement of the OLED internal compensation circuit to compensate the VTH voltage of the DTFT, and provides the timing sequence of the trigger driving signal required for compensating four stages (as shown in fig. 3): reset time interval (Reset), pixel voltage Reset, compensation time interval (Compensate), compensation threshold voltage, voltage input time interval (Data in), picture control voltage, light-Emitting time interval (Emitting) and display stage.
Fig. 4 is a schematic diagram of an OLED internal compensation circuit in the prior art, as shown in fig. 4, when an OLED is in a light-emitting stage, an EOA that a compensation circuit STFT (TFT5) needs to receive is a high-voltage VGH signal, so that a control terminal of a sixth transistor T6 of a trigger driving circuit receives a clock signal CKm to drive a first node a to be charged with a high voltage, so that a seventh transistor T7 of a pull-up module 03 in the trigger driving circuit is turned on, a trigger driving signal En of a high voltage is output through a trigger driving signal line, and at this time, the trigger driving signal En outputs the high voltage and a first capacitor in a coupling circuit drives a voltage of the first node a to be raised, so that a final trigger driving signal line transmits the VGH voltage to the control terminal of the compensation circuit STFT (TFT 5).
When the compensation circuit is in the compensation stage and the voltage input stage, the compensation circuit STFT needs to receive the low potential VGL signal to prevent the OLED from emitting light, so that the high potential of the pull-up control node netA (the voltage of the GDM pull-up control module) in the original GDM circuit is transmitted to the fifth transistor T5, the ninth transistor T9, and the tenth transistor T10 of the trigger driving circuit to start to pull down the potential of the first node a and the potential of the trigger driving signal line to the low potential VGL, so as to drive the compensation circuit STFT to be not turned on, thereby preventing the currents in the compensation stage and the voltage input stage from being transmitted to the OLED to cause abnormal display of the picture.
When the compensation circuit compensates the Vth voltage and inputs the correct gray scale voltage, the netA voltage also recovers the low potential VGL, and the sixth transistor T6 of the trigger driving circuit starts to transmit the high potential to the first node a, so that the same principle drives the potential at the trigger driving signal line to recover the high potential VGH, and drives the OLED to be normally lighted.
In order to increase the voltage stability of the output of the trigger driving circuit, T8, T9, and T10 are preferably added, and both the voltage pull-down of the trigger driving signal En and the voltage maintenance of the trigger driving signal En point are performed at a high potential, wherein the main component of the anti-leakage structure is an eighth transistor T8, and when the voltage of the trigger driving signal En point outputs the high potential VGH, the eighth transistor T8 also transmits the high potential VGH to the second node B, so the switching voltage Vgs < VTH of the tenth transistor T10 prevents the voltage of the trigger driving signal En point from passing, and drives the increase of the stability of the output voltage of the trigger driving circuit, and the OLED can normally display the picture.
In order to optimize the reliability of the circuit characteristics and reliability, two additional transistors, namely an eleventh transistor T11 and a twelfth transistor T12, are preferably added, wherein the first path terminals of the eleventh transistor T11 and the twelfth transistor T12 are respectively connected to the first node a of the circuit and the trigger driving signal line, and the second path terminal thereof is connected to the low potential VSS, when the OLED display screen is turned off. The first path end and the second path end are conducted, residual charges of the original circuit are discharged to the low potential VSS, and the service life of the whole transistor of the circuit is prolonged.
The invention outputs the scanning signal Gn or netA point (GDM pull-up control module voltage) output by the current GDM circuit to the invention, can effectively utilize the output signal and periodic clock signal of the original GDM circuit, achieves the trigger driving signal required by internal compensation, and can effectively reduce the required TFT devices. It should be noted that any basic GDM circuit can generate the trigger driving signal required by the internal compensation circuit in combination with the trigger driving circuit of the present invention.
The invention also discloses a display device, which comprises a scanning drive circuit, a pixel drive circuit, a data drive circuit and the trigger drive circuit; the trigger driving circuit is respectively electrically connected with the scanning driving circuit, the pixel driving circuit and the data driving circuit; the trigger driving circuit receives the scanning signal or the pull-up node signal output by the scanning driving circuit and generates a compensation control signal, a voltage input control signal and a reset signal to be input to the pixel driving circuit; the trigger driving circuit also receives the clock signal output by the data driving circuit and generates a light-emitting control signal to be input to the pixel driving circuit.
Fig. 5 is a schematic structural diagram of a display device according to an embodiment of the present invention, and as shown in fig. 5, the display device includes two scan driving circuits, a pixel driving circuit, a data driving circuit, and two trigger driving circuits. The data driving circuit is positioned at one end of the display panel, the pixel driving circuit is positioned in a pixel area of the display panel and comprises a compensation circuit, a driving TFT and a switching TFT, and the driving TFT and the switching TFT are both connected with the compensation circuit; the scanning driving circuit is respectively positioned at two sides of the display panel, the triggering driving circuit is also respectively positioned at two sides of the display panel, and the scanning driving circuit and the triggering driving circuit are respectively independent circuit modules; the trigger driving circuit is respectively electrically connected with the scanning driving circuit, the pixel driving circuit and the data driving circuit; the trigger driving circuit receives the scanning signal or the pull-up node signal output by the scanning driving circuit and generates a compensation control signal, a voltage input control signal and a reset signal to be input to the pixel driving circuit; the trigger driving circuit also receives the clock signal output by the data driving circuit and generates a light-emitting control signal to be input to the pixel driving circuit.
Fig. 6 is a schematic structural diagram of another embodiment of the display device of the present invention, and as shown in fig. 6, the display device includes two scan driving circuits, a pixel driving circuit, a data driving circuit, and two trigger driving circuits, where the two scan driving circuits are respectively located at two sides of a display panel, the trigger driving circuits are also respectively located at two sides of the display panel, and the scan driving circuit and the trigger driving circuit at each side are integrated circuit modules; the trigger driving circuit is respectively electrically connected with the scanning driving circuit, the pixel driving circuit and the data driving circuit; the trigger driving circuit receives the scanning signal or the pull-up node signal output by the scanning driving circuit and generates a compensation control signal, a voltage input control signal and a reset signal to be input to the pixel driving circuit; the trigger driving circuit also receives the clock signal output by the data driving circuit and generates a light-emitting control signal to be input to the pixel driving circuit.
Fig. 7 is a schematic structural diagram of a display device according to still another embodiment of the present invention, and as shown in fig. 7, the display device includes a scan driving circuit, a pixel driving circuit, a data driving circuit, and a trigger driving circuit, where the scan driving circuit and the trigger driving circuit are integrated circuit modules and are located on the left side (or on the right side in the same way) of a display panel, and the trigger driving circuit is electrically connected to the scan driving circuit, the pixel driving circuit, and the data driving circuit, respectively; the trigger driving circuit receives the scanning signal or the pull-up node signal output by the scanning driving circuit and generates a compensation control signal, a voltage input control signal and a reset signal to be input to the pixel driving circuit; the trigger driving circuit also receives the clock signal output by the data driving circuit and generates a light-emitting control signal to be input to the pixel driving circuit.
Fig. 8 is a schematic structural diagram of a display device according to still another embodiment of the present invention, and as shown in fig. 8, the display device includes a scan driving circuit, a pixel driving circuit, a data driving circuit, and a trigger driving circuit, the scan driving circuit is located on the left side of the display panel, the trigger driving circuit is located on the right side of the display panel, and the scan driving circuit and the trigger driving circuit are independent circuit modules respectively; the trigger driving circuit is respectively electrically connected with the scanning driving circuit, the pixel driving circuit and the data driving circuit; the trigger driving circuit receives the scanning signal or the pull-up node signal output by the scanning driving circuit and generates a compensation control signal, a voltage input control signal and a reset signal to be input to the pixel driving circuit; the trigger driving circuit also receives the clock signal output by the data driving circuit and generates a light-emitting control signal to be input to the pixel driving circuit. It should be noted that, in this embodiment, the positions of the scan driving circuit and the trigger driving circuit may also be switched, that is, the scan driving circuit is located on the right side of the display panel, and the trigger driving circuit is located on the left side of the display panel, which is not limited in the present invention.
The trigger driving circuit of the invention utilizes the signal of the existing scanning driving circuit to generate the trigger driving signal to be provided to the pixel driving circuit, no additional line is needed, and the size of the panel frame is effectively reduced.
It should be noted that the above embodiments can be freely combined as necessary. The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.