CN108169664B - Circuit board fault detection method and device, computer equipment and storage medium - Google Patents
Circuit board fault detection method and device, computer equipment and storage medium Download PDFInfo
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- CN108169664B CN108169664B CN201711488840.7A CN201711488840A CN108169664B CN 108169664 B CN108169664 B CN 108169664B CN 201711488840 A CN201711488840 A CN 201711488840A CN 108169664 B CN108169664 B CN 108169664B
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- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2801—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
- G01R31/2806—Apparatus therefor, e.g. test stations, drivers, analysers, conveyors
Abstract
The invention relates to a circuit board fault detection method and device, computer equipment and a storage medium. The method comprises the following steps: and acquiring the test point capacitance of the circuit board to be tested by taking the reference network as a reference electrode, acquiring the network capacitance according to the test point capacitance, and performing fault detection according to the test point capacitance and the network capacitance to generate first fault detection information. The test point capacitance of the circuit board to be detected is obtained by taking the reference network as a reference electrode, the network capacitance is obtained according to the test point capacitance, the fault detection of the circuit board is realized according to the test point capacitance and the network capacitance, the detection of the fine fault of the circuit board can be realized by the way of detecting the capacitance, and the precision of the fault detection of the circuit board is further improved.
Description
Technical Field
The present invention relates to the field of circuit board detection technologies, and in particular, to a circuit board fault detection method and apparatus, a computer device, and a storage medium.
Background
A Printed Circuit Board (PCB) is a common electronic component, and is characterized in that the electronic component inserted in the PCB can be electrically connected to other electronic components through a designed Circuit (layout) on the PCB without an external solid wire, thereby reducing the arrangement of the solid Circuit to save space.
In PCB production process, for PCB's product quality, need detect PCB to get rid of PCB trouble, when breaking down in the PCB use, also need find out the fault reason fast, so that maintain, change, subsequent processing such as troubleshooting, and along with present PCB volume trend that is becoming miniaturized day by day, the required precision to PCB fault detection is more and more high, how to improve PCB fault detection precision becomes the current problem that awaits the solution of pressing for urgent need.
Disclosure of Invention
Based on this, it is necessary to provide a circuit board fault detection method and apparatus, a computer device, and a storage medium for the problem that the accuracy requirement for PCB fault detection is higher and higher.
A circuit board fault detection method comprises the following steps:
acquiring the capacitance of a test point of a circuit board to be tested by taking a reference network as a reference electrode;
obtaining a network capacitor according to the test point capacitor;
and carrying out fault detection according to the test point capacitor and the network capacitor to generate first fault detection information.
In one embodiment, the step of performing fault detection according to the test point capacitance and the network capacitance to generate first fault detection information includes:
comparing the test point capacitance with the test point capacitance sample to obtain an abnormal test point;
generating first open-circuit fault information according to the abnormal test point;
comparing the network capacitor with a network capacitor sample to obtain an abnormal network;
generating first short-circuit fault information according to the abnormal network;
and generating first fault detection information according to the first open-circuit fault information and the first short-circuit fault information.
In one embodiment, the step of comparing the test point capacitance with the test point capacitance sample to obtain an abnormal test point includes:
comparing the test point capacitor with the test point capacitor sample to obtain a first deviation value;
and when the first deviation value is detected to be larger than a first threshold value, acquiring an abnormal test point corresponding to the first deviation value.
In one embodiment, the step of comparing the network capacitance with the network capacitance sample to obtain an abnormal network includes:
comparing the network capacitor with the network capacitor sample to obtain a second deviation value;
and when the second deviation value is detected to be larger than a second threshold value, acquiring an abnormal network corresponding to the second deviation value.
In one embodiment, after the step of generating first fault detection information according to the first open-circuit fault information and the first short-circuit fault information, the method further includes:
acquiring a first network resistance of the network corresponding to the abnormal test point;
obtaining second open-circuit fault information according to the first network resistance;
acquiring a second network resistance of the abnormal network;
obtaining second short-circuit fault information according to the second network resistance;
and generating second fault detection information according to the second open-circuit fault information and the second short-circuit fault information.
In one embodiment, after the step of generating second fault detection information according to the second open-circuit fault information and the second short-circuit fault information, the method further includes:
obtaining non-abnormal test points and non-abnormal networks according to the second fault detection information;
and updating the test point capacitance sample according to the test point capacitance of the non-abnormal test point, and updating the network capacitance sample according to the network capacitance of the non-abnormal network.
In one embodiment, before the step of obtaining the capacitance of the test point of the circuit board to be tested by using the reference network as the reference electrode, the method further includes:
respectively taking each projection network as a reference electrode to obtain a network capacitance set of each network in the sample circuit board;
and acquiring a projection network corresponding to the maximum capacitance value in the network capacitance set of each network to obtain a reference network of each network.
A circuit board fault detection device comprising:
the test point capacitance module is used for acquiring the test point capacitance of the circuit board to be tested by taking the reference network as a reference electrode;
the network capacitance module is used for obtaining network capacitance according to the capacitance of the test point;
and the first fault module is used for carrying out fault detection according to the test point capacitor and the network capacitor to generate first fault detection information.
A computer device comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, the processor implementing the circuit board fault detection method of any one of the embodiments when executing the program.
A computer-readable storage medium on which a computer program is stored, wherein the program, when executed by a processor, implements the circuit board failure detection method according to any one of the embodiments.
According to the circuit board fault detection method and device, the computer equipment and the storage medium, the test point capacitance of the circuit board to be detected is obtained by taking the reference network as the reference electrode, the network capacitance is obtained according to the test point capacitance, fault detection of the circuit board is further realized according to the test point capacitance and the network capacitance, detection of fine faults of the circuit board can be realized by means of the capacitance detection, and further the precision of circuit board fault detection is improved.
Drawings
FIG. 1 is a schematic flow chart illustrating a method for detecting a fault in a circuit board according to an embodiment;
FIG. 2 is a schematic flow chart illustrating a circuit board fault detection method according to another embodiment;
FIG. 3 is a schematic flow chart illustrating a circuit board fault detection method according to another embodiment;
fig. 4 is a schematic structural diagram of a circuit board fault detection apparatus in an embodiment.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.
In one embodiment, a method for detecting a fault of a circuit board is provided, as shown in fig. 1, the method includes steps S110 to S130:
and S110, acquiring the capacitance of the test point of the circuit board to be tested by taking the reference network as a reference electrode.
When testing PCB (Printed Circuit Board), in order to avoid the probe that the test used directly contacts the part and its leg and damages electronic part, and then influence the test effect, additionally draw forth a pair of circular shape dot as the test point at the both ends of part, do not have the solderless above the test point, can let probe contact test point test, and need not directly contact the electronic part who is surveyed, avoided electronic part's test impaired, also indirectly promote the reliability of test.
In this embodiment, a reference network is set in advance for each network of the PCB to be tested, capacitance detection is performed at the test point, and capacitance detection is performed at the test point of the circuit board to be tested by using the reference network of the network to which the test point belongs as a reference electrode, so as to obtain capacitance at the test point.
Specifically, capacitance detection can be performed on the test point of the PCB to be tested through the flying probe testing machine, and the capacitance of the test point is obtained.
And S120, obtaining the network capacitance according to the capacitance of the test point.
And after the test point capacitance is obtained, obtaining the network capacitance according to all the test point capacitances of each network. Specifically, an average value of all test point capacitances in each network is respectively obtained, and the obtained average value is used as the network capacitance of the network.
And S130, carrying out fault detection according to the test point capacitor and the network capacitor to generate first fault detection information.
Capacitance is generated between different lines with different lengths and different coverage areas and the reference electrode, and when an open circuit or a short circuit occurs, the capacitance changes, for example, when an open circuit fault exists at a position close to a network end point, the capacitance change of the long side of the line is very small, and the capacitance change of the short side of the line is very large, so that even a small open circuit can be detected. In this embodiment, after obtaining the capacitance of each test point and the capacitance of each network, fault detection may be performed according to the capacitance of the test point and the capacitance of the network, so as to obtain an abnormal test point and network, and generate first fault detection information.
Specifically, the first fault detection information may include an abnormal test point identifier and a capacitance value thereof, an abnormal network and a capacitance value thereof, and a fault result. The failure result refers to a result obtained by diagnosing an abnormality, and includes, for example, an open-circuit failure, a short-circuit failure, and the like.
According to the circuit board fault detection method, the reference network is used as the reference electrode to obtain the test point capacitance of the circuit board to be detected, the network capacitance is obtained according to the test point capacitance, fault detection of the circuit board is achieved according to the test point capacitance and the network capacitance, fine faults of the circuit board can be detected in a capacitance detection mode, and therefore the precision of circuit board fault detection is improved.
In another embodiment, as shown in fig. 2, the step of performing fault detection according to the test point capacitance and the network capacitance to generate the first fault detection information includes steps S210 to S250:
s210, comparing the capacitance of the test point with the capacitance sample of the test point to obtain an abnormal test point.
In this embodiment, a test point capacitance sample is pre-established, where the test point capacitance sample refers to a capacitance value obtained by performing a capacitance test on a test point of a sample PCB and having no abnormality.
And when the test point capacitance of the PCB to be tested is obtained, comparing the test point capacitance with the test point capacitance sample corresponding to the test point capacitance to obtain an abnormal test point with an abnormal capacitance value.
S220, first open-circuit fault information is generated according to the abnormal test points.
When the abnormal test point is detected, judging that the network to which the test point belongs has an open-circuit fault, and generating first open-circuit fault information. Specifically, the first open fault information includes the abnormal test point, the capacitance value of the abnormal test point, and the network to which the abnormal test point belongs.
And S230, comparing the network capacitance with the network capacitance sample to obtain an abnormal network.
In this embodiment, a network capacitance sample is pre-established, wherein the network capacitance sample refers to a capacitance value obtained by performing a capacitance test on a network of a sample PCB and having no abnormality.
And when the network capacitance of the PCB to be detected is obtained, comparing the network capacitance with the corresponding network capacitance sample to obtain an abnormal network with abnormal capacitance.
And S240, generating first short-circuit fault information according to the abnormal network.
When the abnormal network is detected, the network is judged to have a short-circuit fault, and first short-circuit fault information is generated. Specifically, the first short-circuit fault information includes an abnormal network, and a capacitance value of the abnormal network.
S250, first fault detection information is generated according to the first open fault information and the first short fault information.
And generating first fault detection information according to the first open-circuit fault information and the first short-circuit fault information, wherein the first fault detection information comprises the first open-circuit fault information and the first short-circuit fault information. According to the first fault detection information, the fault details of the PCB to be detected can be quickly obtained, and the fault maintenance and improvement of the PCB can be conveniently carried out by workers.
Further, the step of comparing the test point capacitance with the test point capacitance sample to obtain an abnormal test point comprises: comparing the test point capacitor with the test point capacitor sample to obtain a first deviation value; and when the first deviation value is detected to be larger than the first threshold value, acquiring an abnormal test point corresponding to the first deviation value.
The first deviation value may be a capacitance difference value between a test point capacitance of the PCB to be tested and a test point capacitance sample, or a deviation rate of the test point capacitance of the PCB to be tested, and further, the deviation rate refers to a ratio of the capacitance difference value between the test point capacitance of the PCB to be tested and the test point capacitance sample to the test point capacitance sample. And when the first deviation value exceeds a first threshold value, the test point is considered as an abnormal test point. The first threshold is a preset numerical value for judging whether the test point is abnormal, and the specific numerical value can be determined according to the actual situation.
In a specific embodiment, the first deviation value is a deviation rate of a test point capacitance of the PCB to be tested and a test point capacitance sample, and the first threshold value is 10%, that is, when the deviation rate of the test point capacitance of the PCB to be tested exceeds 10%, the test point corresponding to the test point capacitance is considered to be abnormal.
Further, the step of comparing the network capacitance with the network capacitance sample to obtain an abnormal network includes: comparing the network capacitor with the network capacitor sample to obtain a second deviation value; and when the second deviation value is detected to be larger than the second threshold value, acquiring the abnormal network corresponding to the second deviation value.
The second deviation value may be a capacitance difference value between the network capacitance of the PCB to be tested and the network capacitance sample, or a deviation rate of the network capacitance of the PCB to be tested, and further, the deviation rate refers to a ratio of the capacitance difference value between the network capacitance of the PCB to be tested and the network capacitance sample to the network capacitance sample. And when the second deviation value exceeds a second threshold value, the network is considered to be an abnormal network. The second threshold is a preset value used for determining whether the network is abnormal, and the specific value can be determined according to the actual situation.
In an embodiment, the second deviation value is a deviation ratio of the network capacitance of the PCB to be tested and the network capacitance sample, and the second threshold value is 10%, that is, when the deviation ratio of the network capacitance of the PCB to be tested exceeds 10%, the network corresponding to the network capacitance is considered to be abnormal.
In another embodiment, as shown in fig. 3, after the step of generating the first fault detection information according to the first open fault information and the first short fault information, the method further includes steps S310 to S350:
s310, acquiring a first network resistance of the network corresponding to the abnormal test point.
The first network resistance refers to the resistance of the network obtained by performing resistance test on the network to which the abnormal test point belongs, namely the open-circuit network. Specifically, two probes of the flying probe tester are simultaneously contacted with the end points of the network for electrifying, and the network resistance is obtained.
And S320, obtaining second open-circuit fault information according to the first network resistance.
The second open fault information is further determined network information with open faults after the test by a resistance method. In this embodiment, the obtained first network resistance is compared with the set open circuit resistance, thereby further determining whether there is an open circuit fault in the open circuit network measured by the capacitance method.
In particular, the second open fault information comprises the further determined open network and its network resistance.
S330, acquiring a second network resistance of the abnormal network.
The second network resistance is the resistance of the network obtained by performing resistance test on an abnormal network, namely a short-circuit network. Specifically, two probes of the flying probe tester are simultaneously contacted with the end points of the network for electrifying, and the network resistance is obtained.
And S340, obtaining second short-circuit fault information according to the second network resistance.
The second short-circuit fault information is further determined network information with short-circuit faults after the test by a resistance method. In this embodiment, the obtained second network resistance is compared with the set short-circuit resistance, so as to further determine whether the short-circuit fault exists in the short-circuit network measured by the capacitance method.
In particular, the second short-circuit fault information comprises the further determined short-circuit network and its network resistance.
And S350, generating second fault detection information according to the second open-circuit fault information and the second short-circuit fault information.
The second fault detection information is finally determined fault detection information after capacitance detection and resistance retest, and compared with the first fault detection information, the accuracy is higher. Wherein the second fault detection information includes second open-circuit fault information and second short-circuit fault information.
Further, after the step of generating the second fault detection information according to the second open-circuit fault information and the second short-circuit fault information, the method further includes: obtaining non-abnormal test points and non-abnormal networks according to the second fault detection information; and updating the capacitance sample of the test point according to the capacitance of the test point of the non-abnormal test point, and updating the network capacitance sample according to the network capacitance of the non-abnormal network.
In this embodiment, the non-abnormal test point refers to a test point which is finally determined according to the second fault detection information and has no abnormality, and the non-abnormal network refers to a network which is finally determined according to the second fault detection information and has no abnormality. The test point capacitance of the non-abnormal test point is replaced by the test point capacitance sample corresponding to the test point capacitance sample, the network capacitance of the non-abnormal network is replaced by the network capacitance sample corresponding to the test point capacitance sample, and the test point capacitance sample and the network capacitance sample are updated, so that the accuracy of the sample value is improved, and the detection precision of the PCB to be detected in the follow-up detection process is improved.
In another embodiment, before the step of obtaining the capacitance of the test point of the circuit board to be tested by using the reference network as the reference electrode, the method further includes: respectively taking each projection network as a reference electrode to obtain a network capacitance set of each network in the sample circuit board; and acquiring the projection network corresponding to the maximum capacitance value in the network capacitance set of each network to obtain the reference network of each network.
In this embodiment, projection network information is extracted, projection networks corresponding to each network of a sample PCB are counted, a point is taken from each network, capacitance detection is performed by using all projection networks corresponding to each network as reference electrodes, each network obtains a network capacitance set respectively, the network capacitance set comprises capacitance values obtained when the corresponding network performs testing by using different projection networks as reference electrodes, and then a projection network corresponding to the maximum capacitance value in the network capacitance set is selected as a reference network of the corresponding network. Specifically, capacitance detection can be performed on each network of the PCB to be detected through the flying probe tester, and a network capacitance set is obtained.
In addition, all networks of the PCB can be grouped and classified, and the networks with the same reference network can be classified into one class.
Further, the circuit board fault detection method further comprises the following steps: obtaining the maximum capacitance value in the network capacitance set of each network to obtain a network capacitance sample; and obtaining the capacitance of the test point of the sample circuit board by taking the reference network as a reference electrode to obtain a capacitance sample of the test point.
In an embodiment, before the step of obtaining the maximum capacitance value in the network capacitance set of each network to obtain the network capacitance sample, the method further includes: and acquiring third network resistances of all networks of the sample circuit board, and acquiring third open-circuit fault information and third short-circuit fault information according to the third network resistances.
Further, the step of obtaining a maximum capacitance value in the network capacitance set of each network to obtain a network capacitance sample includes: and acquiring the maximum capacitance value in the network capacitance set of the non-abnormal network according to the third open-circuit fault information and the third short-circuit fault information to obtain a network capacitance sample.
Further, the step of obtaining the test point capacitance sample by taking the reference network as a reference electrode to obtain the test point capacitance sample comprises the following steps: and obtaining the capacitance of the test point of the sample circuit board by taking the reference network as a reference electrode, and obtaining a non-abnormal capacitance sample of the test point of the sample circuit board according to the third open-circuit fault information and the third short-circuit fault information.
The method comprises the steps of measuring a network with an open circuit fault and a short circuit fault in a sample PCB by a resistance method, and removing a test point capacitor and a network capacitor with the open circuit fault or the short circuit fault in the test point capacitor and the network capacitor of the sample circuit board, so that a test point capacitor sample and a network capacitor sample are obtained, the quality of the test point capacitor sample and the network capacitor sample is ensured, and the accuracy of PCB fault detection can be improved.
According to the circuit board fault detection method, the reference network is used as the reference electrode to obtain the test point capacitance of the circuit board to be detected, the network capacitance is obtained according to the test point capacitance, fault detection of the circuit board is achieved according to the test point capacitance and the network capacitance, fine faults of the circuit board can be detected through the capacitance detection method, and the circuit board fault detection precision is further improved through the detection method combining the capacitance method and the resistance method.
In another embodiment, there is also provided a circuit board fault detection apparatus, as shown in fig. 4, including: test point capacitance module 110, network capacitance module 120, and first fault module 130.
And the test point capacitance module 110 is configured to obtain the test point capacitance of the circuit board to be tested by using the reference network as a reference electrode.
In this embodiment, a reference network is set in advance for each network of the PCB to be tested, capacitance detection is performed at the test point, and capacitance detection is performed at the test point of the circuit board to be tested by using the reference network of the network to which the test point belongs as a reference electrode, so as to obtain capacitance at the test point.
Specifically, capacitance detection can be performed on the test point of the PCB to be tested through the flying probe testing machine, and the capacitance of the test point is obtained.
And a network capacitance module 120, configured to obtain a network capacitance according to the test point capacitance.
And after the test point capacitance is obtained, obtaining the network capacitance according to all the test point capacitances of each network. Specifically, an average value of all test point capacitances in each network is respectively obtained, and the obtained average value is used as the network capacitance of the network.
And a first fault module 130, configured to perform fault detection according to the test point capacitance and the network capacitance, and generate first fault detection information.
Capacitance is generated between different lines with different lengths and different coverage areas and the reference electrode, and when an open circuit or a short circuit occurs, the capacitance changes, for example, when an open circuit fault exists at a position close to a network end point, the capacitance change of the long side of the line is very small, and the capacitance change of the short side of the line is very large, so that even a small open circuit can be detected. In this embodiment, after obtaining the capacitance of each test point and the capacitance of each network, fault detection may be performed according to the capacitance of the test point and the capacitance of the network, so as to obtain an abnormal test point and network, and generate first fault detection information.
Specifically, the first fault detection information may include an abnormal test point identifier and a capacitance value thereof, an abnormal network and a capacitance value thereof, and a fault result. The failure result refers to a result obtained by diagnosing an abnormality, and includes, for example, an open-circuit failure, a short-circuit failure, and the like.
According to the circuit board fault detection device, the reference network is used as the reference electrode to obtain the test point capacitance of the circuit board to be detected, the network capacitance is obtained according to the test point capacitance, fault detection of the circuit board is achieved according to the test point capacitance and the network capacitance, detection of fine faults of the circuit board can be achieved through the capacitance detection mode, and therefore the precision of circuit board fault detection is improved.
In another embodiment, the circuit board fault detection apparatus further comprises: a first open fault module and a first short fault module.
The first open circuit fault module is used for comparing the test point capacitance with the test point capacitance sample to obtain an abnormal test point; and generating first open-circuit fault information according to the abnormal test point.
The first short-circuit fault module is used for comparing the network capacitor with the network capacitor sample to obtain an abnormal network; and generating first short-circuit fault information according to the abnormal network.
Further, the first failure module 130 is further configured to generate first failure detection information according to the first open-circuit failure information and the first short-circuit failure information.
Specifically, the first open-circuit fault module is further configured to compare the test point capacitance with the test point capacitance sample to obtain a first deviation value; and when the first deviation value is detected to be larger than the first threshold value, acquiring an abnormal test point corresponding to the first deviation value.
The first short-circuit fault module is also used for comparing the network capacitor with the network capacitor sample to obtain a second deviation value; and when the second deviation value is detected to be larger than the second threshold value, acquiring the abnormal network corresponding to the second deviation value.
In another embodiment, the circuit board fault detection apparatus further comprises: a second open fault module, a second short fault module, and a second fault module.
The second open-circuit fault module is used for acquiring a first network resistance of a network corresponding to the abnormal test point; and obtaining second open-circuit fault information according to the first network resistance.
The second short-circuit fault module is used for acquiring a second network resistance of the abnormal network; and obtaining second short-circuit fault information according to the second network resistance.
And the second fault module is used for generating second fault detection information according to the second open-circuit fault information and the second short-circuit fault information.
In another embodiment, the circuit board fault detection device further comprises a sample module for obtaining a non-abnormal test point and a non-abnormal network according to the second fault detection information; and updating the capacitance sample of the test point according to the capacitance of the test point of the non-abnormal test point, and updating the network capacitance sample according to the network capacitance of the non-abnormal network.
In another embodiment, the circuit board fault detection apparatus further includes a reference network module, configured to obtain a network capacitance set of each network in the sample circuit board by using each projection network as a reference electrode; acquiring a projection network corresponding to the maximum capacitance value in the network capacitance set of each network to obtain a reference network of each network
Further, the sample module is further configured to obtain a maximum capacitance value in the network capacitance set of each network, so as to obtain a network capacitance sample; and obtaining the capacitance of the test point of the sample circuit board by taking the reference network as a reference electrode to obtain a capacitance sample of the test point.
In another embodiment, the circuit board fault detection apparatus further includes a third fault module, configured to obtain a third network resistance of all networks of the sample circuit board, and obtain third open-circuit fault information and third short-circuit fault information according to the third network resistance.
Further, the sample module is further configured to obtain a maximum capacitance value in a network capacitance set of the non-abnormal network according to the third open-circuit fault information and the third short-circuit fault information, so as to obtain a network capacitance sample; and obtaining the capacitance of the test point of the sample circuit board by taking the reference network as a reference electrode, and obtaining a non-abnormal capacitance sample of the test point of the sample circuit board according to the third open-circuit fault information and the third short-circuit fault information.
According to the circuit board fault detection device, the reference network is used as the reference electrode to obtain the test point capacitance of the circuit board to be detected, the network capacitance is obtained according to the test point capacitance, fault detection of the circuit board is achieved according to the test point capacitance and the network capacitance, fine faults of the circuit board can be detected in a capacitance detection mode, and the circuit board fault detection precision is further improved in a detection mode combining a capacitance method and a resistance method.
In another embodiment, a computer device is also provided, which includes a memory, a processor, and a computer program stored on the memory and executable on the processor, and when the processor executes the program, the circuit board fault detection method of any one of the embodiments is implemented.
Specifically, the computer device may be a flying probe testing machine, the flying probe testing machine executes the circuit board fault detection method according to any embodiment, the flying probe testing machine can detect a fine fault of the circuit board by using a capacitive detection method, and the precision of the flying probe testing machine for detecting the circuit board fault is further improved by using a detection method combining a capacitive method and a resistive method.
In another embodiment, a computer-readable storage medium is further provided, on which a computer program is stored, wherein the program is implemented by a processor to implement the circuit board fault detection method of any one of the embodiments.
The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (10)
1. A circuit board fault detection method is characterized by comprising the following steps:
acquiring the capacitance of a test point of a circuit board to be tested by taking a reference network as a reference electrode;
obtaining a network capacitor according to the test point capacitor;
performing fault detection according to the test point capacitor and the network capacitor to generate first fault detection information;
the step of obtaining the capacitance of the test point of the circuit board to be tested by taking the reference network as the reference electrode comprises the following steps:
setting a reference network for each network of the circuit board to be tested in advance, and when testing point capacitance detection is carried out, carrying out capacitance detection on the testing point of the circuit board to be tested by taking the reference network of the network to which the testing point belongs as a reference electrode to obtain testing point capacitance;
the step of generating first fault detection information by performing fault detection according to the test point capacitance and the network capacitance includes:
comparing the test point capacitance with the test point capacitance sample to obtain an abnormal test point;
generating first open-circuit fault information according to the abnormal test point; the first open circuit fault information comprises an abnormal test point, a capacitance value of the abnormal test point and a network to which the abnormal test point belongs;
comparing the network capacitor with a network capacitor sample to obtain an abnormal network;
generating first short-circuit fault information according to the abnormal network; the first short-circuit fault information comprises an abnormal network and a capacitance value of the abnormal network;
and generating first fault detection information according to the first open-circuit fault information and the first short-circuit fault information.
2. The method of claim 1, wherein the step of comparing the test point capacitance with the test point capacitance sample to obtain an abnormal test point comprises:
comparing the test point capacitor with the test point capacitor sample to obtain a first deviation value;
and when the first deviation value is detected to be larger than a first threshold value, acquiring an abnormal test point corresponding to the first deviation value.
3. The method of claim 1, wherein the step of comparing the network capacitance to a network capacitance sample to obtain an abnormal network comprises:
comparing the network capacitor with the network capacitor sample to obtain a second deviation value;
and when the second deviation value is detected to be larger than a second threshold value, acquiring an abnormal network corresponding to the second deviation value.
4. The method of claim 1, wherein the step of generating first fault detection information based on the first open circuit fault information and the first short circuit fault information is followed by the step of:
acquiring a first network resistance of the network corresponding to the abnormal test point;
obtaining second open-circuit fault information according to the first network resistance;
acquiring a second network resistance of the abnormal network;
obtaining second short-circuit fault information according to the second network resistance;
and generating second fault detection information according to the second open-circuit fault information and the second short-circuit fault information.
5. The method of claim 4, wherein the step of generating second fault detection information based on the second open-circuit fault information and the second short-circuit fault information is further followed by:
obtaining non-abnormal test points and non-abnormal networks according to the second fault detection information;
and updating the test point capacitance sample according to the test point capacitance of the non-abnormal test point, and updating the network capacitance sample according to the network capacitance of the non-abnormal network.
6. The method for detecting circuit board faults according to claim 1, wherein before the step of obtaining the test point capacitance of the circuit board to be tested by taking the reference network as a reference electrode, the method further comprises the following steps:
respectively taking each projection network as a reference electrode to obtain a network capacitance set of each network in the sample circuit board;
and acquiring a projection network corresponding to the maximum capacitance value in the network capacitance set of each network to obtain a reference network of each network.
7. The circuit board fault detection method of claim 6, further comprising:
obtaining the maximum capacitance value in the network capacitance set of each network to obtain a network capacitance sample;
and obtaining the capacitance of the test point of the sample circuit board by taking the reference network as a reference electrode to obtain a capacitance sample of the test point.
8. A circuit board fault detection device, comprising:
the test point capacitance module is used for acquiring the test point capacitance of the circuit board to be tested by taking the reference network as a reference electrode;
the network capacitance module is used for obtaining network capacitance according to the capacitance of the test point;
the first fault module is used for carrying out fault detection according to the test point capacitor and the network capacitor to generate first fault detection information;
the test point capacitance module is further configured to: setting a reference network for each network of the circuit board to be tested in advance, and when testing point capacitance detection is carried out, carrying out capacitance detection on the testing point of the circuit board to be tested by taking the reference network of the network to which the testing point belongs as a reference electrode to obtain testing point capacitance;
the circuit board fault detection device further comprises:
the first open circuit fault module is used for comparing the test point capacitance with the test point capacitance sample to obtain an abnormal test point; generating first open-circuit fault information according to the abnormal test point; the first open circuit fault information comprises an abnormal test point, a capacitance value of the abnormal test point and a network to which the abnormal test point belongs;
the first short-circuit fault module is used for comparing the network capacitor with a network capacitor sample to obtain an abnormal network; generating first short-circuit fault information according to the abnormal network; the first short-circuit fault information comprises an abnormal network and a capacitance value of the abnormal network;
the first failure module is further to: and generating first fault detection information according to the first open-circuit fault information and the first short-circuit fault information.
9. A computer device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that the processor implements the circuit board failure detection method according to any one of claims 1 to 7 when executing the program.
10. A computer-readable storage medium, on which a computer program is stored, characterized in that the program, when being executed by a processor, implements the circuit board failure detection method according to any one of claims 1 to 7.
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