CN108122940A - Resistive RAM memory unit and preparation method thereof, electronic device - Google Patents
Resistive RAM memory unit and preparation method thereof, electronic device Download PDFInfo
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
- H10B63/30—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having three or more electrodes, e.g. transistors
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/841—Electrodes
Abstract
The present invention provides a kind of resistive RAM memory unit and preparation method thereof, electronic device, and the production method of the resistive RAM memory unit includes：Semiconductor substrate is provided, the first interlayer dielectric layer is formed on a semiconductor substrate, groove is formed in the first interlayer dielectric layer；First electrode material layer is formed on the side wall of the groove；Resistive material layer is formed on the side wall of first electrode material layer；Form the second electrode material layer for filling the groove；First electrode material layer, resistive material layer and second electrode material layer are cut along the first direction, to form resistive RAM memory unit.The resistive RAM memory unit has improved operation window and storage density, thus has higher storage density and lower cost and preferably performance.The production method of the resistive RAM memory unit can improve device storage density and operation window.The electronic device has the advantages that similar.
Description
Technical field
The present invention relates to technical field of semiconductors, in particular to a kind of resistive RAM memory unit and its system
Make method, electronic device.
Background technology
Resistive random access memory (RRAM) is a kind of to be deposited based on change in resistance come the non-volatile of records store data information
Reservoir (NVM) device.In recent years, the characteristics of NVM devices are due to its high density, high speed and low-power consumption, in the development of memory
In the middle in occupation of increasingly consequence.For silicon substrate flash memory as traditional NVM devices, being put into extensively can
Among the application of mobile memory.But working life, the deficiency of read or write speed, high voltage and size in write operation can not
Continue to zoom out the further development that bottlenecks is waited to limit flash memory from many aspects.Alternatively, a variety of emerging devices
As next-generation NVM devices industry has been obtained widely to pay close attention to, among these including Ferroelectric Random Access Memory (FeRAM), it is magnetic with
Machine memory (MRAM), phase-change random access memory (PCRAM), conductive bridge random access memory (CBRAM) etc..
The principle of conductive bridge random access memory (CBRAM) is that conductive filament is in solid electrolyte/metal oxide
(write-in) or by the bias voltage of application conductive filament is made to rupture (erasing).Such as copper, oxidable electrode provides as silver
The source of the metal ion of conductive filament in insulation electrolytic matter is formed, such as comes ion storage, germanium sulfide glass using silver anode
For glass as electrolyte, cathode is then inertia tungsten material.Such as the storage unit 100 of Figure 1A and Figure 1B conductive bridge random access memory
Lower electrode 10, dielectric switching layer 11 and top electrode 12 are generally comprised, conductive bridge random memory unit and memory are generally adopted
With criss-cross construction (cross bar), illustratively, lower electrode is longitudinally arranged along 10, and top electrode 12 is arranged along the horizontal, the two
The place of intersection forms dielectric switching layer 11 between.The research of conductive bridge random access memory is concentrated mainly at present
Make solid electrolyte/metal oxide or dielectric switching layer that a variety of resistance states be presented, such as three kinds of resistance states (height is presented
Resistance state, low resistance state and intermediate resistance state) so that conductive bridge random access memory realizes more level, and then improve storage density.So
And current conductive bridge random memory unit (cell) can not realize more level well so that conductive bridge is deposited at random
Reservoir storage density is difficult to improve.
It is, therefore, desirable to provide a kind of new resistive RAM memory unit and preparation method thereof, electronic device, with solution
The certainly above problem.
The content of the invention
A series of concept of reduced forms is introduced in Summary, this will in specific embodiment part into
One step is described in detail.The Summary of the present invention is not meant to attempt to limit technical solution claimed
Key feature and essential features do not mean that the protection domain for attempting to determine technical solution claimed more.
In view of the deficiencies of the prior art, the present invention proposes a kind of resistive RAM memory unit and preparation method thereof,
Operation window and storage density can be improved, thus there is higher storage density and lower cost and preferably performance.
One aspect of the present invention provides a kind of production method of resistive RAM memory unit, including：
Semiconductor substrate is provided, forms the first interlayer dielectric layer on the semiconductor substrate, is situated between in first interlayer
Groove is formed in electric layer；
First electrode material layer is formed on the side wall of the groove；
Resistive material layer is formed on the side wall of the first electrode material layer；
Form the second electrode material layer for filling the groove；
The first electrode material layer, resistive material layer and second electrode material layer are cut along the first direction, with
The resistive RAM memory unit at multiple intervals is formed,
Wherein, the storage unit includes second electrode, respectively the first left electrode positioned at the second electrode both sides, the
One right electrode, the first change resistance layer between the described first left electrode and second electrode and positioned at the described first right electrode
The second change resistance layer between second electrode, the second electrode are made of the remaining second electrode material layer after cutting,
The first left electrode, the first right electrode are made of the remaining first electrode material layer after cutting, first resistive
Layer, the second change resistance layer are made of the remaining resistive material layer after cutting.
Preferably, further include：It is formed and covers the of first interlayer dielectric layer and resistive RAM memory unit
Two interlayer dielectric layers；Formed in second interlayer dielectric layer respectively with the described first left electrode, the first right electrode and second
The interconnection line of the electric connection of electrode.
Preferably, the interconnection line for being connected with the described first left electrode extends in a second direction, so that described second
The first left electrode being located along the same line on direction is electrically connected to each other, for the interconnection line being connected with the described first right electrode
Extend in a second direction, so that the right electrode of first to be located along the same line in this second direction is electrically connected to each other,
In, the second direction is vertical with the first direction.
Preferably, the left electrode of adjacent first of adjacent resistive RAM memory unit in said first direction
It is electrically connected with the first right electrode.
Preferably, the described first left electrode, the first change resistance layer and second electrode form the first conductive bridge structure；Described
One right electrode, the second change resistance layer and second electrode form the second conductive bridge structure.
The production method of resistive RAM memory unit proposed by the present invention, by forming three electrodes and two resistances
Change layer, forms two resistance-change memory structures of a shared electrode, therefore by controlling level on three electrodes can be
Four kinds of states are realized in one storage unit, therefore more level can be achieved in each storage unit, so as to improve operation window
And storage density, and then realize higher storage density and lower cost and preferably performance.
Another aspect of the present invention provides a kind of resistive RAM memory unit, including：First left electrode, first right side
Electrode and the second electrode between the first left electrode and the first right electrode, the shape between the first left electrode and second electrode
Into there is the first change resistance layer, the second change resistance layer is formed between the described first right electrode and the 3rd electrode, wherein, first resistance
The resistance of change layer is based on institute based on the level change in the described first left electrode and second electrode, the resistance of second change resistance layer
State the level change in the first right electrode and second electrode.
Illustratively, the described first left electrode, the first change resistance layer and second electrode form the first conductive bridge structure；
The first right electrode, the second change resistance layer and the 3rd electrode form the second conductive bridge structure.
Illustratively, the described first left electrode and the first right electrode are titanium nitride, silver, aluminium or platinum etc.；The second electrode
For tungsten, copper, silver or titanium nitride.
Illustratively, first change resistance layer and the second change resistance layer are hafnium oxide, copper oxide, non-crystalline silicon etc..
Resistive RAM memory unit proposed by the present invention, due to including three electrodes and two change resistance layers, and shape
Into two resistance-change memory structures for sharing an electrode, therefore by controlling the level on three electrodes that can realize four kinds of electricity
Resistance state, therefore more level can be achieved in each storage unit, so as to improve operation window and storage density, and then realize
Higher storage density and lower cost and preferably performance.
Further aspect of the present invention provides a kind of electronic device, including resistive RAM memory unit as described above
And the electronic building brick with the resistive RAM memory unit.
Electronic device proposed by the present invention, due to above-mentioned resistive RAM memory unit, thus with similar
The advantages of.
Description of the drawings
The drawings below of the present invention is used to understand the present invention in this as the part of the present invention.Shown in the drawings of this hair
Bright embodiment and its description, principle used to explain the present invention.
In attached drawing：
Figure 1A shows a kind of current resistive RAM memory unit diagrammatic top view；
Figure 1B shows schematic cross sectional views of the resistive RAM memory unit along A-A directions shown in Figure 1A；
Fig. 2A shows resistive RAM memory unit diagrammatic top view according to an embodiment of the present invention；
Fig. 2 B show schematic cross sectional views of the resistive RAM memory unit along A-A directions shown in Fig. 2A；
Fig. 3 shows the signal of the production method of resistive RAM memory unit according to an embodiment of the present invention
Property flow chart of steps；
Fig. 4 A~Figure 10 A show the making side of resistive RAM memory unit according to an embodiment of the present invention
Method implements the schematic cross sectional view that each step obtains device successively；
Fig. 4 B~Figure 10 B show the making side of resistive RAM memory unit according to an embodiment of the present invention
Method implements the schematic plan that each step obtains semiconductor devices successively, and wherein Fig. 4 A~Figure 10 A are Fig. 4 B~figure successively
The sectional view of device shown in 10B；
Figure 11 shows the schematic diagram of electronic device according to an embodiment of the present invention.
Specific embodiment
In the following description, a large amount of concrete details are given in order to provide more thorough understanding of the invention.So
And it is obvious to the skilled person that the present invention may not need one or more of these details and be able to
Implement.In other examples, in order to avoid with the present invention obscure, for some technical characteristics well known in the art not into
Row description.
It should be appreciated that the present invention can be implemented in different forms, and it should not be construed as being limited to what is proposed here
Embodiment.On the contrary, providing these embodiments disclosure will be made thoroughly and complete, and will fully convey the scope of the invention to
Those skilled in the art.In the accompanying drawings, for clarity, the size and relative size in Ceng He areas may be exaggerated phase from beginning to end
The identical element with reference numeral expression.
It should be understood that when element or layer be referred to as " ... on ", " with ... it is adjacent ", " being connected to " or " being coupled to " other members
When part or layer, can directly on other elements or layer, it is adjacent thereto, be connected or coupled to other elements or layer or
There may be element or layer between two parties.On the contrary, when element be referred to as " on directly existing ... ", " with ... direct neighbor ", " be directly connected to
To " or " being directly coupled to " other elements or during layer, then there is no elements or layer between two parties.It should be understood that although art can be used
Language first, second, third, etc. describe various elements, component, area, floor and/or part, these elements, component, area, floor and/or portion
Dividing should not be limited by these terms.These terms are used merely to distinguish an element, component, area, floor or part and another
Element, component, area, floor or part.Therefore, do not depart from present invention teach that under, first element discussed below, component, area,
Floor or part are represented by second element, component, area, floor or part.
Spatial relationship term for example " ... under ", " ... below ", " below ", " ... under ", " ... on ",
" above " etc., herein can for convenience description and being used describe an element shown in figure or feature with it is other
The relation of element or feature.It should be understood that in addition to orientation shown in figure, spatial relationship term intention further include using and
The different orientation of device in operation.For example, if the device overturning in attached drawing, then, is described as " below other elements "
Or " under it " or " under it " element or feature will be oriented to other elements or feature " on ".Therefore, exemplary term
" ... below " and " ... under " it may include upper and lower two orientations.Device, which can be additionally orientated, (to be rotated by 90 ° or other takes
To) and spatial description language as used herein correspondingly explained.
The purpose of term as used herein is only that description specific embodiment and not as the limitation of the present invention.Make herein
Used time, " one " of singulative, "one" and " described/should " be also intended to include plural form, unless context is expressly noted that separately
Outer mode.It is also to be understood that term " composition " and/or " comprising ", when in this specification in use, determining the feature, whole
Number, step, operation, the presence of element and/or component, but be not excluded for one or more other features, integer, step, operation,
The presence or addition of element, component and/or group.Herein in use, term "and/or" includes any and institute of related Listed Items
There is combination.
In order to thoroughly understand the present invention, detailed structure and step will be proposed in following description, to illustrate this hair
The technical solution of bright proposition.Presently preferred embodiments of the present invention is described in detail as follows, however in addition to these detailed descriptions, the present invention
There can also be other embodiment.
Embodiment one
The present embodiment proposes a kind of resistive RAM memory unit, and as shown in Figure 2 A and 2 B, which deposits at random
Reservoir storage unit 200 includes the first left electrode 20, the first right electrode 21,22 and first change resistance layer 23 and second of second electrode
Change resistance layer 24, second electrode 22 are arranged on centre, and the first left 20 and first right electrode 21 of electrode is located at 22 liang of second electrode respectively
Side, the first change resistance layer 23 are formed between the first left electrode 20 and second electrode 22, and the second change resistance layer 24 is arranged on the first right electricity
Between pole 21 and second electrode 22, when applying different level in the first left electrode 20, the first right electrode 21, second electrode 22
When, the resistance of the first change resistance layer 23 and the second change resistance layer 24 can change.I.e., in the present embodiment, resistive random access memory
Storage unit 200 includes two resistive structures, and one is what the first left electrode 20, the first change resistance layer 23 and second electrode 22 formed
First resistive structure, one be the first right electrode 21, the second resistive structure that the second change resistance layer 24 and second electrode 22 form, because
This works as through the level in the first left electrode 20 of control, the first right motor 21, second electrode 22, can make resistive random access memory
Storage unit 200 realizes four kinds of resistance states, such as can be low resistance state for the first resistive structure and the second resistive structure
(LSR), i.e., resistive RAM memory unit 200 is LRS-LRS, exemplary, can be expressed as 00；First resistive structure
For low resistance state (LSR), the second resistive structure is high-impedance state (HRS), i.e., resistive RAM memory unit 200 is LSR-HSR
State, illustratively its can represent 01；First resistive structure is low resistance state (HSR), and the second resistive structure is high-impedance state
(LRS), i.e., resistive RAM memory unit 200 is HSR-LSR states, and illustratively it can represent 10；First resistive
Structure and the second resistive structure are low resistance state (HSR), i.e., resistive RAM memory unit 200 be HRS-HRS, example
Property, 11 can be expressed as.It can be seen that the resistive RAM memory unit 200 of the present embodiment can realize four kinds of electricity
Resistance state, thus can realize four kinds of level, and then improve the storage density and operation window of device.
Further, various suitable resistive random storage knots may be employed in the first resistive structure and the second resistive structure
Structure, such as phase change structure or conductive bridge structure.
Illustratively, such as resistive RAM memory unit 200 is using Transformation Principle, the first left electrode 20, first
Change resistance layer 23 and second electrode 22 form the first phase change storage structure, the first right electrode 21, the second change resistance layer 24 and second electrode
22 form the second phase change storage structure.At this point, second electrode 22 is used to be grounded as common lower electrode, it is, for example, titanium nitride
(TiN).Firstth left 20 and first right electrode 21 of electrode is used separately as the top electrode of the first resistive structure and the second resistive structure,
For applying different voltage, for example with tungsten (W).First change resistance layer 23 and the second change resistance layer 242 use phase-change material,
Such as it can be realized by chalcogenide materials.In the case where concentrating heating by the form of electric pulse, it can be from orderly
Crystalline state (low-resistivity) fast transition for unordered amorphous state (high resistivity), from crystalline state to amorphous transfer process repeatedly
It is to be triggered by melting and being quickly cooled down mechanism (or a kind of slightly slow process for being known as recrystallization).It is exemplary, in this implementation
Ge2Sb2Te5 materials (can breviary be expressed as GST) may be employed in the first change resistance layer 23 and the second change resistance layer 24 in example.
Illustratively, RAM memory unit 200 is become also using foregoing conductive bridge principle, the first left electricity
Pole 20, the first change resistance layer 23 and second electrode 22 form the first conductive bridge structure, the first right electrode 21,24 and of the second change resistance layer
Second electrode 22 forms the second conductive bridge structure.At this point, second electrode 22 is used to provide insulated electro as common lower electrode
The metal ion source of conductive filament in medium, for example, second electrode 22 can be copper (Cu), silver-colored (Ag), titanium nitride (TiN) or
Other suitable metal or alloy.First left 20 and first right electrode 21 of electrode is used separately as the first conductive bridge structure and second
The top electrode of conductive bridge structure, for applying different voltage, for example with platinum (Pt).First change resistance layer 23 and the second resistive
Layer 24 uses suitable insulation dielectric, the metal ion that second electrode 22 provides can new conductive filament wherein, so as to real
Existing low resistance state ruptures and is changed into high-impedance state.Illustratively, such as the first change resistance layer 23 and the second change resistance layer 24 use dioxy
Change hafnium (HfO2).
It is understood that the resistive RAM memory unit 200 that the present embodiment proposes may be employed it is various suitable
Resistance-change memory mechanism, and be not limited to the above-mentioned phase-change mechanism provided or conductive bridge mechanism, be only illustrative.
According to the resistive RAM memory unit of the present embodiment due to including three electrodes and two change resistance layers, and shape
Into two resistance-change memory structures for sharing an electrode, therefore by controlling the level on three electrodes that can realize four kinds of electricity
Resistance state, therefore more level can be achieved in each storage unit, so as to improve operation window and storage density, and then realize
Higher storage density and lower cost and preferably performance.
Embodiment two
It is random to the resistive of an embodiment of the present invention below with reference to Fig. 3 and Fig. 4 A~Figure 10 A, Fig. 4 B to Figure 10 B
The production method of Memory Storage Unit is described in detail.Wherein, Fig. 3 show resistive according to an embodiment of the present invention with
The illustrated steps flow chart of the production method of machine Memory Storage Unit；Fig. 4 A~Figure 10 A show a reality according to the present invention
The production method for applying the resistive RAM memory unit of mode implements the schematic cross section that each step obtains device successively
Figure；Fig. 4 B~Figure 10 B show the production method of resistive RAM memory unit according to an embodiment of the present invention according to
The secondary schematic plan implemented each step and obtain semiconductor devices.
As shown in figure 3, the production method of the resistive RAM memory unit of the present embodiment includes：
Step 301, Semiconductor substrate is provided, forms the first interlayer dielectric layer on the semiconductor substrate, described
Groove is formed in one interlayer dielectric layer；
Step 302, first electrode material layer is formed on the side wall of the groove；
Step 303, resistive material layer is formed on the side wall of the first electrode material layer；
Step 304, the second electrode material layer for filling the groove is formed；
Step 305, the first electrode material layer, resistive material layer and second electrode material layer are carried out along the first direction
Cutting, to form the resistive RAM memory unit at multiple intervals,
Wherein, the resistive RAM memory unit includes second electrode, respectively positioned at the second electrode both sides
The first left electrode, the first right electrode, the first change resistance layer between the described first left electrode and second electrode and be located at
The second change resistance layer between the first right electrode and second electrode, the second electrode is by remaining second electricity after cutting
Pole material layer is formed, and the first left electrode, the first right electrode are made of the remaining first electrode material layer after cutting,
First change resistance layer, the second change resistance layer are made of the remaining resistive material layer after cutting.
According to the production method of the resistive RAM memory unit of the present embodiment, by forming three electrodes and two
Change resistance layer, forms two resistance-change memory structures of a shared electrode, therefore by controlling level on three electrodes can be with
Four kinds of states are realized in a storage unit, therefore more level can be achieved in each storage unit, so as to improve working window
Mouth and storage density, and then realize higher storage density and lower cost and preferably performance.
With reference to Fig. 4 A~Figure 10 A and Fig. 4 B to Figure 10 B, and the resistive random storage to form conductive bridge structure
The production method of the resistive RAM memory unit of the present embodiment is described in further detail exemplified by unit.
First, as shown in Figure 4 A and 4 B shown in FIG., Semiconductor substrate 400 is provided, first is formed in the Semiconductor substrate 400
Interlayer dielectric layer 401 forms groove 402 in first interlayer dielectric layer 401.
Wherein, Semiconductor substrate 400 can be at least one of following material being previously mentioned：Si、Ge、SiGe、SiC、
SiGeC, InAs, GaAs, InP or other III/V compound semiconductors further include multilayered structure of these semiconductors composition etc.
Or silicon (SSOI) is stacked for silicon-on-insulator (SOI), on insulator, is stacked SiGe (S-SiGeOI), insulation on insulator
SiGe (SiGeOI) and germanium on insulator (GeOI) etc. on body.It could be formed with active device, example in Semiconductor substrate 400
Such as NMOS and/or PMOS, these devices for example may be used as the switching transistor of resistive random memory unit or gating crystal
Pipe.Equally, can also be formed with conductive member in Semiconductor substrate 400, conductive member can be the grid of transistor, source electrode or
Drain electrode or metal interconnection structure.In addition, isolation structure can also be formed in Semiconductor substrate 400, such as shallow trench isolation
(STI) structure or selective oxidation silicon (LOCOS) isolation structure.As an example, in the present embodiment, Semiconductor substrate 400
Constituent material selects monocrystalline silicon.
Common dielectric material may be employed in first interlayer dielectric layer 401, such as USG (undoped silicon glass), PSG (mix
Phosphorosilicate glass), BSG (doped boron-silicon glass), low-k materials or ultra low-K material etc..Groove 402 is formed in the first interlayer dielectric layer,
It can pass through the formation such as photoetching, etching.Pattern and size of the pattern of groove 402 based on resistive random memory unit are formed,
Such as groove 402 is suitable in the size of X-direction with resistive random memory unit in the size of X-direction.X-direction in the present invention and
Y-direction refers to the X and Y-direction shown in Fig. 4 B, and X-direction is also known as first direction, and Y-direction is also known as second party
To will no longer explain hereinafter.Illustratively, in the present embodiment, two grooves 402 are shown in the drawings, it should be understood that ditch
The size and number of slot 402 is only illustrative.
Then, as fig. 5 a and fig. 5b, first electrode material layer 403 is formed on the side wall of the groove 402.
Various suitable metal or alloy materials may be employed in first electrode material layer 403.Illustratively, in the present embodiment
In, first electrode material layer 403 uses Pt, can pass through sputtering, PVD (physical vapour deposition (PVD)), CVD (chemical vapor depositions
Product), the techniques such as ALD (atomic layer deposition) are formed.It is understood that first electrode material layer 403 is formed in groove 402
All side walls on, i.e. be respectively formed on first electrode material layer 403 in four side walls of groove 402.
First electrode material layer 403 can illustratively be formed by following step：
First, the deposition of first electrode material on the side wall and bottom of 401 surface of the first interlayer dielectric layer and groove 402
Material；Then the first electrode material being located at by etching technics removal on 402 bottom of 401 surface of the first interlayer dielectric layer and groove
Material retains the first electrode material being located on 402 side wall of groove, so as to form first electrode material layer 403.
Illustratively, in the present embodiment, first electrode material layer 403, which is used to be formed subsequently through cutting, is located at groove
Two electrodes in two side walls on 402X directions (are, for example, that the firstth left electrode and the first right electrode or two power on
Pole).
Then, as shown in Figure 6 A and 6 B, resistive material layer is formed on the side wall of the first electrode material layer 403
404。
Illustratively, in the present embodiment, resistive material layer 404 uses HfO2, can by such as PVD, CVD or
The methods of ALD, is formed.The forming process of resistive material layer 404 is similar with first electrode material layer 403, and details are not described herein.
Illustratively, in the present embodiment, resistive material layer 404 is used as insulation dielectric, wherein can be by metal ion
Form conductive filament.Resistive material layer 404 is used to form two change resistance layers in follow-up cutting.
Then, as shown in figures 7 a and 7b, the second electrode material layer 405 for filling the groove 402 is formed.
Various suitable metal or alloy materials, such as Cu, Ag or TiN etc. may be employed in second electrode material layer 405.Show
Example property, in the present embodiment, second electrode material layer 405 uses Cu, can pass through the techniques such as CVD or electroplating technology formation
It is formed.It is understood that the full groove 402 of the filling of second electrode material layer 405, and the first interlayer dielectric layer 401 can be higher than.Show
Example property, in the present embodiment, second electrode material layer 405 is formed by electroplating technology, such as including first in groove 402
Surface forms copper seed layer, then forms second electrode material layer 405 by electrochemical plating process filling groove 402.
Then, as shown in Figure 8 A and 8 B, planarized, so that the first electrode material layer 403, resistive material layer
404 and 405 height of second electrode material layer flush.
Exemplary, pass through CMP (chemical-mechanical planarization) or mechanical lapping) etc. techniques to the first electrode material
Layer 403, resistive material layer 404 and second electrode material layer 405 are planarized, so that the first electrode material layer 403, resistance
Change material layer 404 and 405 height of second electrode material layer flush.
Then, as illustrated in figures 9a and 9b, in X direction to the first electrode material layer 403, resistive material layer 404 and
Two electrode material layers 405 are cut, and to form the resistive RAM memory unit at multiple intervals, and are formed described in covering
Second interlayer dielectric layer 406 of multiple resistive RAM memory units and the first interlayer dielectric layer 401.
As previously mentioned, first electrode material layer 403 and resistive material layer 404 are formed on all side walls of groove 402, because
This is in order to obtain two electrodes independent of each other, it is necessary to first electrode material layer 403, resistive material layer 404 and second electrode
Material layer 405 is cut, as shown in Figure 8 B, as shown in dotted line in Fig. 8 B, i.e., in X direction or along the first direction to first electrode
Material layer 403, resistive material layer 404 and second electrode material layer 405 are cut, so as to be tied as illustrated in figures 9a and 9b
Structure.That is, in the present embodiment by first electrode material layer 403, the resistive material layer 404 and second in a groove 402
Electrode material layer 405 carries out cutting and forms two resistive RAM memory units.Therefore each resistive random access memory
Storage unit includes second electrode 405A, right positioned at the first left electrode 403A of the second electrode 405A both sides and first respectively
Electrode 403B and the first change resistance layer 404A between the first left electrode 403A and second electrode 405A and positioned at described
The second change resistance layer 404B, the second electrode 405A between first right electrode 403B and second electrode 405A is by remaining after cutting
The second electrode material layer form, the first left electrode 403A, the first right electrode 403B are by remaining institute after cutting
First electrode material layer composition is stated, the first change resistance layer 404A, the second change resistance layer 404B are by the remaining resistance after cutting
Change material layer is formed.
Further, the cutting can be carried out by the methods of photoetching, etching, cutting pattern and resistive random access memory
The Butut of storage unit corresponds to.It should be appreciated that how many a resistive RAM memory units are cut into based on the big of groove
Small and resistive RAM memory unit size determines, and two be not limited in the present embodiment, such as can be cut into
One, i.e., only remove first electrode material layer 403, resistive material layer 404 and the second electrode material layer 405 at both ends；Or it cuts
It is segmented into three or more.
Common dielectric material may be employed in second interlayer dielectric layer 406, such as USG (undoped silicon glass), PSG (mix
Phosphorosilicate glass), BSG (doped boron-silicon glass), low-k materials or ultra low-K material or other oxides, nitride etc..Second interlayer is situated between
Electric layer 406 can be formed by the techniques such as spin-coating method, HARP (high-aspect-ratio processing procedure), PVD, CVD, ALD.Second interlayer dielectric layer
406 thickness is arranged as required to, and is no longer limited herein.
Finally, as shown in figs. 10 a and 10b, 406 formation are left with described first respectively in second interlayer dielectric layer
The interconnection line that the 405A of electrode 403A, the first right electrode 403B and second electrode are electrically connected.
The forming process of interconnection line is, for example, first, to be formed by lithographic etch process in the second interlayer dielectric layer 406
Then groove fills conductive material into the groove, such as copper or aluminium form metal interconnecting wires.
In this embodiment, formed in the second interlayer dielectric layer 406 and the first left right electrodes of electrode 403A and first
The interconnection line 407 that 403B is electrically connected and the metal interconnecting wires 408 being electrically connected with second electrode 405A.Wherein, each second electricity
Pole 405A is respectively formed there are one metal interconnecting wires 408, and in the Y direction, that is, is fallen in in the second direction of first direction, be located at
The first left right electrode 403B of electrode 403A or first on same straight line then share one and are interconnected along the linearly extended metal in place
Line 407, and the left electrode of adjacent first of resistive RAM memory unit adjacent in X-direction (i.e. first direction)
The right electrode 403B of 403A and first are electrically connected, such as in Figure 10 A and Figure 10 B, electrode (the first of the left side positioned at intermediate region
The right electrode 403B and first left electrode 403A on the right) share the metal interconnecting wires 407 extended along the region.
So far, the processing step implemented according to the method for the embodiment of the present invention is completed, it is to be understood that the present embodiment
The production method of resistive RAM memory unit not only include above-mentioned steps, before above-mentioned steps, among or afterwards also
It may include other desired step.
Embodiment three
Yet another embodiment of the present invention provides a kind of electronic device, including resistive RAM memory unit and with
The electronic building brick that the resistive RAM memory unit is connected.Wherein, which includes：The
One left electrode, the first right electrode and the second electrode between the first left electrode and the first right electrode, in the first left electrode
The first change resistance layer is formed between second electrode, the second resistive is formed between the described first right electrode and second electrode
Layer, wherein, the resistance of first change resistance layer is based on the level change in the described first left electrode and second electrode, and described second
The resistance of change resistance layer is based on the level change in the described first right electrode and second electrode.
Wherein, Semiconductor substrate can be at least one of following material being previously mentioned：Si、Ge、SiGe、SiC、
SiGeC, InAs, GaAs, InP or other III/V compound semiconductors further include multilayered structure of these semiconductors composition etc.
Or silicon (SSOI) is stacked for silicon-on-insulator (SOI), on insulator, is stacked SiGe (S-SiGeOI), insulation on insulator
SiGe (SiGeOI) and germanium on insulator (GeOI) etc. on body.It could be formed with device, such as NMOS in Semiconductor substrate
And/or PMOS etc..Equally, can also be formed with conductive member in Semiconductor substrate, conductive member can be transistor grid,
Source electrode or drain electrode or the metal interconnection structure that is electrically connected with transistor, etc..In addition, may be used also in the semiconductor substrate
To be formed with isolation structure, the isolation structure isolates (STI) structure or selective oxidation silicon (LOCOS) isolation junction for shallow trench
Structure.As an example, in the present embodiment, the constituent material of Semiconductor substrate selects monocrystalline silicon.
Illustratively, the described first left electrode, the first change resistance layer and second electrode form conductive bridge structure；Described first
Right electrode, the second change resistance layer and second electrode form conductive bridge structure.
Illustratively, the described first left electrode and the first right electrode are titanium nitride, silver, aluminium or platinum etc.；The second electrode
For tungsten, copper, silver or titanium nitride.
Illustratively, first change resistance layer and the second change resistance layer are hafnium oxide, copper oxide, non-crystalline silicon etc..
Wherein, the electronic building brick can be any electronic building bricks such as discrete device, integrated circuit.
The electronic device of the present embodiment can be mobile phone, tablet computer, laptop, net book, game machine, TV
Any electronic product such as machine, VCD, DVD, navigator, camera, video camera, recording pen, MP3, MP4, PSP or equipment or
Any intermediate products including the semiconductor devices.
Wherein, Figure 11 shows the example of mobile phone.The outside of mobile phone 500 is provided with the display portion being included in shell 501
502nd, operation button 503, external connection port 504, loud speaker 505, microphone 506 etc..
The electronic device of the embodiment of the present invention, since the resistive RAM memory unit included has improved work
Make window and storage density, thus there is higher storage density and lower cost and preferably performance.Therefore the electronics
Device equally has the advantages that similar.
The present invention is illustrated by above-described embodiment, but it is to be understood that, above-described embodiment is only intended to
Citing and the purpose of explanation, and be not intended to limit the invention in the range of described embodiment.In addition people in the art
Member is it is understood that the invention is not limited in above-described embodiment, introduction according to the present invention can also be made more kinds of
Variants and modifications, these variants and modifications are all fallen within scope of the present invention.Protection scope of the present invention by
The appended claims and its equivalent scope are defined.
Claims (10)
1. a kind of production method of resistive RAM memory unit, which is characterized in that including：
Semiconductor substrate is provided, the first interlayer dielectric layer is formed on the semiconductor substrate, in first interlayer dielectric layer
Middle formation groove；
First electrode material layer is formed on the side wall of the groove；
Resistive material layer is formed on the side wall of the first electrode material layer；
Form the second electrode material layer for filling the groove；
The first electrode material layer, resistive material layer and second electrode material layer are cut along the first direction, to be formed
The resistive RAM memory unit at multiple intervals,
Wherein, the storage unit includes second electrode, respectively the first left electrode positioned at the second electrode both sides, first right side
Electrode, the first change resistance layer between the described first left electrode and second electrode and positioned at the described first right electrode and
The second change resistance layer between two electrodes, the second electrode is made of the remaining second electrode material layer after cutting, described
First left electrode, the first right electrode are made of the remaining first electrode material layer after cutting, first change resistance layer,
Two change resistance layers are made of the remaining resistive material layer after cutting.
2. the production method of resistive RAM memory unit according to claim 1, which is characterized in that further include：
Form the second interlayer dielectric layer for covering first interlayer dielectric layer and resistive RAM memory unit；
It is formed in second interlayer dielectric layer and electrically connected with the described first left electrode, the first right electrode and second electrode respectively
The interconnection line connect.
3. the production method of resistive RAM memory unit according to claim 2, which is characterized in that for institute
The interconnection line for stating the first left electrode connection extends in a second direction, so that be located along the same line in this second direction the
One left electrode is electrically connected to each other, and the interconnection line for being connected with the described first right electrode extends in a second direction, so that in institute
The right electrode of first to be located along the same line in second direction is stated to be electrically connected to each other,
Wherein, the second direction is vertical with the first direction.
4. the production method of resistive RAM memory unit according to claim 2, which is characterized in that described
The left electrode of adjacent first of adjacent resistive RAM memory unit and the first right electrode are electrically connected on one direction.
5. the production method of the resistive RAM memory unit described in any one in claim 1-4, special
Sign is that the first left electrode, the first change resistance layer and second electrode form the first conductive bridge structure；The first right electricity
Pole, the second change resistance layer and second electrode form the second conductive bridge structure.
6. a kind of resistive RAM memory unit, which is characterized in that including：First left electrode, the first right electrode and position
Second electrode between the first left electrode and the first right electrode is formed between the described first left electrode and second electrode
One change resistance layer is formed with the second change resistance layer between the described first right electrode and second electrode,
Wherein, the resistance of first change resistance layer is based on the level change in the described first left electrode and second electrode, and described
The resistance of two change resistance layers is based on the level change in the described first right electrode and second electrode.
7. resistive RAM memory unit according to claim 6, which is characterized in that the first left electrode,
One change resistance layer and second electrode form the first conductive bridge structure；
The first right electrode, the second change resistance layer and second electrode form the second conductive bridge structure.
8. the resistive RAM memory unit according to claim 6 or 7, which is characterized in that the firstth left electricity
Pole and the first right electrode are titanium nitride, silver, aluminium or platinum；The second electrode is tungsten, copper, silver or titanium nitride.
9. the resistive RAM memory unit according to claim 6 or 7, which is characterized in that first change resistance layer
It is hafnium oxide, copper oxide or non-crystalline silicon with the second change resistance layer.
10. a kind of electronic device, which is characterized in that deposited at random including the resistive as described in any one in claim 6-9
Reservoir storage unit and the electronic building brick being connected with the resistive RAM memory unit.
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