CN108091630A - A kind of semiconductor devices and its manufacturing method - Google Patents
A kind of semiconductor devices and its manufacturing method Download PDFInfo
- Publication number
- CN108091630A CN108091630A CN201611040773.8A CN201611040773A CN108091630A CN 108091630 A CN108091630 A CN 108091630A CN 201611040773 A CN201611040773 A CN 201611040773A CN 108091630 A CN108091630 A CN 108091630A
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- Prior art keywords
- tungsten plug
- plain conductor
- layer
- laying
- tungsten
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/49—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions wire-like arrangements or pins or rods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4885—Wire-like parts or pins
- H01L21/4889—Connection or disconnection of other leads to or from wire-like parts, e.g. wires
Abstract
The present invention provides a kind of semiconductor devices and its manufacturing method, including：Substrate is formed with tungsten plug in the substrate；Part is located at the plain conductor on the tungsten plug, and laying is formed between the plain conductor and the tungsten plug.Compared with the prior art, semiconductor devices proposed by the present invention can avoid tungsten plug therein that metal galvanic corrosion occurs, and effectively improve the yield and reliability of device.
Description
Technical field
The present invention relates to semiconductor fabrication process, in particular to a kind of semiconductor devices and its manufacturing method.
Background technology
The manufacture of integrated circuit can be divided into two main parts, first, active device be produced on the surface of chip
Passive device, this is known as front (FEOL)；It needs to connect each device and different layers with metal system on chip afterwards,
Line (BEOL) after this is known as.
The chip metallization in line is that the processing method of applied chemistry or physics deposits conductive metal film on chip afterwards
Process.The deposit of this process and medium is closely related, and metal wire transmission signal, dielectric layer in IC circuits then ensure signal
From the influence of adjacent metal lines.Through hole is through various dielectric layers from a certain metal layer to shape another metal layer adjoined
Into the opening of electric pathway, then metallic film is filled in through-holes, to form electrical connection between two metal layers.
Galvanic corrosion (metal galvanic corrosion) refer to two kinds of connected metals due to activity or current potential
Difference, be formed into a loop in electrolyte solution, electronics caused to flow to low potential by high potential, make anode metal occur to accelerate it is rotten
The phenomenon that erosion.The corrosion of tungsten (W) plug is one of most common metal galvanic corrosion in semiconductor aluminium back-end process.That is tungsten plug
With rear layer metal aluminum steel there are certain misalignment, aluminium cannot coat tungsten plug completely well；Meanwhile subsequent etch process
Certain positive potential can be generated over the metal lines, and wet method processing procedure makes the aluminium of positive potential and exposed tungsten plug coexist in alkaline electro
In electrolyte solution；The generation of metal galvanic corrosion is ultimately resulted in, tungsten, which is reduced, even to disappear.Since tungsten plug is as metal aluminum steel
Front layer, in most cases, the generation that tungsten plug caused by metal galvanic corrosion corrodes is difficult often to be detected, thus
There is larger dangerous and longer incubation periods, and manufacture of semiconductor is caused greatly to lose.Once there is tungsten plug corruption
The situation of erosion, the performance of semiconductor devices can be severely impacted, and the yield of product reduces.
Therefore, how to avoid tungsten plug that the problem that metal galvanic corrosion is those skilled in the art's urgent need to resolve occurs.
The content of the invention
In view of the deficiencies of the prior art, the present invention provides a kind of semiconductor devices, including：
Substrate is formed with tungsten plug in the substrate；
Part is located at the plain conductor on the tungsten plug, and pad is formed between the plain conductor and the tungsten plug
Layer.
Illustratively, the material of the laying is tungsten.
Illustratively, the thickness of the laying is 80-120 angstroms.
Illustratively, the material of the plain conductor is aluminium copper.
The present invention also provides a kind of manufacturing method of semiconductor devices, including：
Substrate is provided；
Tungsten plug is formed in the substrate；
Sequentially form laying and the plain conductor on the laying that part covers the tungsten plug.
Illustratively, the material of the laying is tungsten.
Illustratively, the thickness of the laying is 80-120 angstroms.
Illustratively, the material of the plain conductor is aluminium copper.
Compared with the prior art, semiconductor devices proposed by the present invention can avoid tungsten plug therein that the former electricity of metal occurs
Pond is corroded, and effectively improves the yield and reliability of device.
Description of the drawings
The drawings below of the present invention is used to understand the present invention in this as the part of the present invention.Shown in the drawings of this hair
Bright embodiment and its description, principle used to explain the present invention.
In attached drawing：
Fig. 1 a-1d are the sectional view and scanning electron microscope image of a kind of semiconductor devices in the prior art；
Fig. 2 a-2d are a kind of sectional view of semiconductor devices in one embodiment of the invention；
Fig. 3 is a kind of scanning electron microscope image of semiconductor devices in one embodiment of the invention；
Fig. 4 is a kind of flow chart of the manufacturing method of semiconductor devices in one embodiment of the invention.
Specific embodiment
In the following description, a large amount of concrete details are given in order to provide more thorough understanding of the invention.So
And it is obvious to the skilled person that the present invention may not need one or more of these details and be able to
Implement.In other examples, in order to avoid with the present invention obscure, for some technical characteristics well known in the art not into
Row description.
It should be appreciated that the present invention can be implemented in different forms, and it should not be construed as being limited to what is proposed here
Embodiment.On the contrary, providing these embodiments disclosure will be made thoroughly and complete, and will fully convey the scope of the invention to
Those skilled in the art.In the accompanying drawings, for clarity, the size and relative size in Ceng He areas may be exaggerated.From beginning to end
Same reference numerals represent identical element.
It should be understood that when element or layer be referred to as " ... on ", " with ... it is adjacent ", " being connected to " or " being coupled to " it is other
When element or layer, can directly on other elements or layer, it is adjacent thereto, be connected or coupled to other elements or layer or
Person may have element or layer between two parties.On the contrary, when element is referred to as " on directly existing ... ", " with ... direct neighbor ", " directly
It is connected to " or " being directly coupled to " other elements or during layer, then there is no elements or layer between two parties.It should be understood that although it can make
Various elements, component, area, floor and/or part are described with term first, second, third, etc., these elements, component, area, floor and/
Or part should not be limited by these terms.These terms be used merely to distinguish an element, component, area, floor or part with it is another
One element, component, area, floor or part.Therefore, do not depart from present invention teach that under, first element discussed below, portion
Part, area, floor or part are represented by second element, component, area, floor or part.
Spatial relationship term for example " ... under ", " ... below ", " below ", " ... under ", " ... it
On ", " above " etc., herein can for convenience description and being used describe an element shown in figure or feature with
The relation of other elements or feature.It should be understood that in addition to orientation shown in figure, spatial relationship term intention, which further includes, to be made
With the different orientation with the device in operation.For example, if the device overturning in attached drawing, then, is described as " under other elements
Face " or " under it " or " under it " element or feature will be oriented to other elements or feature " on ".Therefore, exemplary art
Language " ... below " and " ... under " it may include upper and lower two orientations.Device can additionally be orientated (be rotated by 90 ° or its
It is orientated) and spatial description language as used herein correspondingly explained.
The purpose of term as used herein is only that description specific embodiment and not as the limitation of the present invention.Make herein
Used time, " one " of singulative, "one" and " described/should " be also intended to include plural form, unless context is expressly noted that separately
Outer mode.It is also to be understood that term " composition " and/or " comprising ", when in this specification in use, determining the feature, whole
Number, step, operation, the presence of element and/or component, but be not excluded for one or more other features, integer, step, operation,
The presence or addition of element, component and/or group.Herein in use, term "and/or" includes any and institute of related Listed Items
There is combination.
As shown in Figure 1a, existing metal interconnection structure generally comprises：The lower floor's gold being sequentially formed on semiconductor devices
Belong to layer 101 and dielectric layer 102；The tungsten plug 103 being formed in the dielectric layer 102, the tungsten plug 103 and dielectric layer 102
Between be also formed with diffusion impervious layer 104；The dielectric layer 102 covers the tungsten with being formed with part on the tungsten plug 103
The plain conductor 105 of plug 103.The forming method of the plain conductor is generally：Deposited metal layer first, and to the metal
Layer performs etching to form plain conductor.And, it is necessary to first spin coating photoresist layer conduct on it before the metal layer is etched
Mask layer is performed etching and is afterwards removed the photoresist layer using dry etching.It but in this course, generally can profit
Use O2React (ingredient of photoresist is mainly carbon C) after ionization with photoresist, some O+It can be attached on plain conductor, in this way,
Plain conductor 105 can become positively charged lotus after removal photoresist layer, the tungsten in through hole be made to have higher energy of position, due to high potential energy
Presence, tungsten metal can occur in the solution of subsequent wet electrochemical reaction generation tungstate ion so that in through hole
Tungsten metal, which is corroded, to be there is pit or even is all emptied, as shown in Fig. 1 b- Fig. 1 d.Its electrochemical reaction side specifically occurred
Formula is：
In view of the deficiencies of the prior art, the present invention provides a kind of semiconductor devices, including：
Substrate is formed with tungsten plug in the substrate；
Part is located at the plain conductor on the tungsten plug, and pad is formed between the plain conductor and the tungsten plug
Layer.
The material of the laying is tungsten.The thickness of the laying is 80-120 angstroms.The material of the plain conductor is
Aluminium copper.
Compared with the prior art, semiconductor devices proposed by the present invention can avoid tungsten plug therein that the former electricity of metal occurs
Pond is corroded, and effectively improves the yield and reliability of device.
In order to thoroughly understand the present invention, detailed structure and/or step will be proposed in following description, to illustrate this
Invent the technical solution proposed.Presently preferred embodiments of the present invention is described in detail as follows, however in addition to these detailed descriptions, this hair
It is bright to have other embodiment.
[exemplary embodiment one]
The semiconductor devices of an embodiment of the present invention is described in detail below with reference to Fig. 2 a~Fig. 2 d and Fig. 3.
The semiconductor devices includes：Substrate；The tungsten plug 203 being formed in the substrate；It is inserted positioned at the tungsten part
Plain conductor 206 beyond the Great Wall, is formed with laying 205 between the plain conductor and the tungsten plug.
The substrate includes Semiconductor substrate (not shown).The semiconductor substrate materials are, for example, silicon, silicon-on-insulator
(SOI), silicon (SSOI) is stacked on insulator, SiGe (S-SiGeOI), germanium on insulator SiClx are stacked on insulator
(SiGeOI) and the semi-conducting materials such as germanium on insulator (GeOI) semiconductor devices, example, are formed in the Semiconductor substrate
Such as PMOS or NMOS.Be formed with lower metal layer 201 in the Semiconductor substrate, the lower metal layer 201 include aluminium,
Copper or aluminium copper etc..The technique for preparing the lower metal layer 201 can be vacuum evaporation, sputtering deposit or metallization
Learn vapor deposition etc. or other suitable techniques.Dielectric layer 202 is formed in the lower metal layer 201.Usually
Using high density plasma deposition mode, low-pressure chemical vapor deposition (LPCVD) or enhancing plasma activated chemical vapour deposition
(PECVD) etc. dielectric layer 202 is formed.The tungsten plug 203 contacted with lower metal layer 201 is formed in the dielectric layer 202,
For the electrical connection between metal interconnecting wires.The shape of the tungsten plug 203 can be rectangle or inverted trapezoidal, but be not limited to
This.
Optionally, diffusion impervious layer 204, the diffusion barrier are also formed between the tungsten plug and Semiconductor substrate
The material of layer 204 includes titanium nitride, titanizing tungsten or other materials for preventing tungsten ion from spreading.
The plain conductor 206 that part is positioned above, the plain conductor 206 and institute are formed on the tungsten plug 203
It states and is formed with laying 205 between tungsten plug.The laying 205 and plain conductor 206 are located on tungsten plug 203 but not
Tungsten plug 203 is completely covered.The plain conductor 206 is, for example, aluminium copper etc..Between the laying and the tungsten plug
With minimum contact resistance, and its activity is weaker than plain conductor 206, is, for example, tungsten layer.Illustratively, the laying
Thickness is 80-120 angstroms, preferably 100 angstroms.Specifically, backing layer material layer and plain conductor material layer can be sequentially depositing,
And patterned photoresist layer is formed in plain conductor material layer, due in photoetching process there is certain misalignment, because
The plain conductor material layer that this photoetching agent pattern exposes is corresponding with the position of the part in tungsten plug；With described patterned
Photoresist layer is mask, is sequentially etched plain conductor material layer and backing layer material layer, and the tungsten plug is covered to form part
Laying 205 and the plain conductor 206 on the laying 205.
, it is necessary to remove photoresist after dry etch step is performed.During photoresist is removed, plain conductor
206 and laying 205 can become positively charged lotus.As shown in Figure 2 a, and due to having minimum contact between 205 tungsten plug of laying
Resistance, therefore the positive charge accumulated on plain conductor 206 and laying 205 more can be conducted in tungsten plug 203, such as
Shown in Fig. 2 b, so as to reduce the electrical potential difference between plain conductor and tungsten plug, reduce tungsten plug and metal galvanic corrosion occurs
Reactivity；In addition, as shown in Figure 2 c, electrochemical reaction occurs in the solution that tungsten metal can be cleaned in subsequent wet, specific electricity
Chemical equation is：
And since, there is also certain metal galvanic corrosion, and Al is as anode between laying 205 and plain conductor 206
It is consumed, specific electro-chemical reaction equations are：
Since OH will be all lost in two kinds of metal galvanic corrosions-, there are competitive relation, therefore two kinds of metal galvanic corrosions
It is obtained for inhibition.
It is demonstrated experimentally that compared with prior art, semiconductor devices provided by the invention can effectively avoid tungsten plug
Metal galvanic corrosion, the scanning electron microscope image of experimental result are as shown in Figure 3.
Compared with the prior art, semiconductor devices proposed by the present invention can avoid tungsten plug therein that the former electricity of metal occurs
Pond is corroded, and effectively improves the yield and reliability of device.
[exemplary embodiment two]
The manufacturing method of the semiconductor devices of an embodiment of the present invention is done below with reference to Fig. 2 a and Fig. 4 and is retouched in detail
It states.
First, step 401 is performed, substrate is provided.
The substrate includes Semiconductor substrate (not shown).The semiconductor substrate materials are, for example, silicon, silicon-on-insulator
(SOI), silicon (SSOI) is stacked on insulator, SiGe (S-SiGeOI), germanium on insulator SiClx are stacked on insulator
(SiGeOI) and the semi-conducting materials such as germanium on insulator (GeOI) semiconductor devices, example, are formed in the Semiconductor substrate
Such as PMOS or NMOS.Be formed with lower metal layer 201 in the Semiconductor substrate, the lower metal layer 201 include aluminium,
Copper or aluminium copper etc..The technique for preparing the lower metal layer 201 can be vacuum evaporation, sputtering deposit or metallization
Learn vapor deposition etc. or other suitable techniques.Dielectric layer 202 is formed in the lower metal layer 201.Usually
Using high density plasma deposition mode, low-pressure chemical vapor deposition (LPCVD) or enhancing plasma activated chemical vapour deposition
(PECVD) etc. dielectric layer 202 is formed.
Then, step 402 is performed, tungsten plug 203 is formed in the substrate.
Specifically, etching technics is used to etch the dielectric layer 202 to form the through hole being connected with lower metal layer 201,
Full tungsten metal is filled in the through hole to form tungsten plug 203.Dry method quarter may be employed in the method for etching the dielectric layer 202
The common process such as erosion or wet etching, do not limit herein.The shape of the through hole can be rectangle or inverted trapezoidal, but
It is without being limited thereto.In addition, before filling tungsten metal in through-holes, diffusion impervious layer 204, the diffusion can be formed on through-hole wall
The material on barrier layer 204 includes titanium nitride, titanizing tungsten or other materials for preventing tungsten ion from spreading.
Then, step 403 is performed, part is sequentially formed and covers the laying 205 of the tungsten plug 203 and positioned at the lining
Plain conductor 206 on bed course 205.The laying 205 and the plain conductor 206 on the laying 205 are located at
Tungsten plug 203 is completely covered on tungsten plug 203 but not.The plain conductor 206 is, for example, aluminium copper etc..The laying
There is minimum contact resistance between the tungsten plug, and its activity is weaker than plain conductor 206, is, for example, tungsten layer.Example
Property, the thickness of the laying is 80-120 angstroms, preferably 100 angstroms.Specifically, backing layer material layer can be sequentially depositing
And plain conductor material layer, the deposition method can be vacuum evaporation, sputtering deposit or metallochemistry vapor deposition etc..
Then, patterned photoresist layer is formed in plain conductor material layer, using the patterned photoresist layer as mask, etching
Backing layer material layer and plain conductor material layer are to form laying 205 and plain conductor 206；The etching technics is, for example,
Plasma dry etch, the etching gas of use include boron trifluoride (BCl3) and chlorine (Cl2) etc..Due to photoetching process
In there is certain misalignment, plain conductor material layer and the position pair of a part for tungsten plug that photoetching agent pattern exposes
Should, therefore, the lamination of the laying 205 and plain conductor 206 is located on tungsten plug 203 but tungsten plug is not completely covered
203。
So far, the processing step that according to an exemplary embodiment of the present one method is implemented is completed.It is understood that
The present embodiment manufacturing method of semiconductor device not only include above-mentioned steps, before above-mentioned steps, among or may also include afterwards
Other desired step is included in the range of this implementation production method.
Compared with the prior art, the manufacturing method of semiconductor devices proposed by the present invention can avoid tungsten plug therein from sending out
Raw metal galvanic corrosion effectively improves the yield and reliability of device.
The present invention is illustrated by above-described embodiment, but it is to be understood that, above-described embodiment is only intended to
Citing and the purpose of explanation, and be not intended to limit the invention in the range of described embodiment.In addition people in the art
Member is it is understood that the invention is not limited in above-described embodiment, introduction according to the present invention can also be made more kinds of
Variants and modifications, these variants and modifications are all fallen within scope of the present invention.Protection scope of the present invention by
The appended claims and its equivalent scope are defined.
Claims (8)
1. a kind of semiconductor devices, which is characterized in that including：
Substrate is formed with tungsten plug in the substrate；
Part is located at the plain conductor on the tungsten plug, and laying is formed between the plain conductor and the tungsten plug.
2. semiconductor devices according to claim 1, which is characterized in that the material of the laying is tungsten.
3. semiconductor devices according to claim 1, which is characterized in that the thickness of the laying is 80-120 angstroms.
4. semiconductor devices according to claim 1, which is characterized in that the material of the plain conductor is aluminium copper.
5. a kind of manufacturing method of semiconductor devices, which is characterized in that including：
Substrate is provided；
Tungsten plug is formed in the substrate；
Sequentially form laying and the plain conductor on the laying that part covers the tungsten plug.
6. manufacturing method according to claim 5, which is characterized in that the material of the laying is tungsten.
7. manufacturing method according to claim 5, which is characterized in that the thickness of the laying is 80-120 angstroms.
8. manufacturing method according to claim 5, which is characterized in that the material of the plain conductor is aluminium copper.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN201611040773.8A CN108091630B (en) | 2016-11-23 | 2016-11-23 | Semiconductor device and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611040773.8A CN108091630B (en) | 2016-11-23 | 2016-11-23 | Semiconductor device and manufacturing method thereof |
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| Publication Number | Publication Date |
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| CN108091630A true CN108091630A (en) | 2018-05-29 |
| CN108091630B CN108091630B (en) | 2020-01-03 |
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| TW484205B (en) * | 1998-10-12 | 2002-04-21 | Promos Technologies Inc | Manufacturing method of interconnect to prevent the plug erosion |
| US6087726A (en) * | 1999-03-01 | 2000-07-11 | Lsi Logic Corporation | Metal interconnect stack for integrated circuit structure |
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