TW430936B - Method for making high-reliable vias in semiconductor integrated circuit device - Google Patents

Method for making high-reliable vias in semiconductor integrated circuit device

Info

Publication number
TW430936B
TW430936B TW88104404A TW88104404A TW430936B TW 430936 B TW430936 B TW 430936B TW 88104404 A TW88104404 A TW 88104404A TW 88104404 A TW88104404 A TW 88104404A TW 430936 B TW430936 B TW 430936B
Authority
TW
Taiwan
Prior art keywords
integrated circuit
semiconductor integrated
circuit device
metal interconnection
making high
Prior art date
Application number
TW88104404A
Other languages
Chinese (zh)
Inventor
Jang-Eun Lee
Heung-Soo Park
Ju-Hyuck Chung
Tae-Wook Seo
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Priority to TW88104404A priority Critical patent/TW430936B/en
Application granted granted Critical
Publication of TW430936B publication Critical patent/TW430936B/en

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

A method of making a semiconductor integrated circuit device wherein a via plug electrochemical corrosion can be prevented, resulting from charge accumulated in the via plug by plasma after upper metal interconnection is patterned in a multilevel metallization structure. A method for making a semiconductor integrated circuit device in which a upper metal interconnection and a lower metal interconnection are connected through a via, having steps of: performing a plasmaless ozone ashing treatment after patterning the upper metal interconnection, in order to prevent a charge from being accumulated in a surface of a metal plug filling up the via.
TW88104404A 1999-03-20 1999-03-20 Method for making high-reliable vias in semiconductor integrated circuit device TW430936B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW88104404A TW430936B (en) 1999-03-20 1999-03-20 Method for making high-reliable vias in semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW88104404A TW430936B (en) 1999-03-20 1999-03-20 Method for making high-reliable vias in semiconductor integrated circuit device

Publications (1)

Publication Number Publication Date
TW430936B true TW430936B (en) 2001-04-21

Family

ID=21640033

Family Applications (1)

Application Number Title Priority Date Filing Date
TW88104404A TW430936B (en) 1999-03-20 1999-03-20 Method for making high-reliable vias in semiconductor integrated circuit device

Country Status (1)

Country Link
TW (1) TW430936B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108091630A (en) * 2016-11-23 2018-05-29 中芯国际集成电路制造(上海)有限公司 A kind of semiconductor devices and its manufacturing method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108091630A (en) * 2016-11-23 2018-05-29 中芯国际集成电路制造(上海)有限公司 A kind of semiconductor devices and its manufacturing method

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Legal Events

Date Code Title Description
GD4A Issue of patent certificate for granted invention patent
MM4A Annulment or lapse of patent due to non-payment of fees