CN108074986A - A kind of charge compensation Schottky semiconductor device - Google Patents
A kind of charge compensation Schottky semiconductor device Download PDFInfo
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- CN108074986A CN108074986A CN201610996599.8A CN201610996599A CN108074986A CN 108074986 A CN108074986 A CN 108074986A CN 201610996599 A CN201610996599 A CN 201610996599A CN 108074986 A CN108074986 A CN 108074986A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 122
- 230000004888 barrier function Effects 0.000 claims abstract description 22
- 239000000463 material Substances 0.000 claims description 65
- 239000000758 substrate Substances 0.000 claims description 35
- 229910052751 metal Inorganic materials 0.000 claims description 26
- 239000002184 metal Substances 0.000 claims description 26
- 239000004020 conductor Substances 0.000 claims description 23
- 239000011810 insulating material Substances 0.000 claims description 16
- 239000012774 insulation material Substances 0.000 claims description 14
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 8
- 229920005591 polysilicon Polymers 0.000 claims description 8
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 4
- 230000000903 blocking effect Effects 0.000 abstract description 6
- 230000005684 electric field Effects 0.000 abstract description 4
- 239000002210 silicon-based material Substances 0.000 description 16
- 229910052581 Si3N4 Inorganic materials 0.000 description 10
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 10
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 8
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 8
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical group [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 4
- 229910052796 boron Inorganic materials 0.000 description 4
- 238000010276 construction Methods 0.000 description 4
- 125000004437 phosphorous atom Chemical group 0.000 description 4
- 239000000377 silicon dioxide Substances 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 3
- 229910010293 ceramic material Inorganic materials 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
- H01L29/8725—Schottky diodes of the trench MOS barrier type [TMBS]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/063—Reduced surface field [RESURF] pn-junction structures
- H01L29/0634—Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/6609—Diodes
- H01L29/66143—Schottky diodes
Abstract
The charge compensation Schottky semiconductor device of the present invention sets charge compensation semi-conducting material between groove in drift layer, improve device reverse blocking voltage, reduces channel bottom peak value electric field, improves reliability；Top sets MIS structure to the charge compensation Schottky semiconductor device of the present invention in the trench, for reducing the surface field under schottky barrier junction reverse biased, reduces reverse leakage current.
Description
Technical field
Present invention relates generally to a kind of charge compensation Schottky semiconductor devices.
Background technology
Power semiconductor rectifying device is widely used on power management and frequency applications, is related specifically to Schottky half
Conductor device has become the important trend of device development, and schottky device is fast etc. with the low unlatching turn-off speed of positive cut-in voltage
Advantage, while schottky device also has the shortcomings that the special and higher conducting resistance of poor reverse blocking.
It is used to improve the reverse blocking voltage of Schottky there has been proposed new construction, a kind of new construction is in schottky device table
Face introduces P-type conduction material, improves the reverse BV and leakage current characteristic of device, while also in device forward conduction
Few son is introduced, reduces the switch performance of device；Second class new construction introduces groove MIS structure in device surface, by by table
Inside the potential introduction means of face, the pressure drop of device reverse blocking is improved with this or reduces conducting resistance, the method is in schottky junction
Surface potential and reverse blocking pressure drop cannot take into account very well, and the method sets insulating materials in device so that device it is reliable
Property is affected；Three classes new construction introduces P-type conduction material in device, changes drift region electric field with this, improves device
Reverse BV because needing multiple extension manufacturing process, brings the manufacturing process of device complicated and manufacture cost greatly raises
The problem of.
The content of the invention
The present invention provides a kind of charge compensation structure Schottky semiconductor device for said one or multiple problems.
A kind of charge compensation Schottky semiconductor device, substrate layer are the first conducting semiconductor material；Drift layer, for the
Two conducting semiconductor materials, on substrate layer；Multiple grooves, in drift layer, trenched side-wall sets insulation material layer,
Lower part sets insulating materials in groove；Conductive material is metal, polysilicon or amorphous silicon positioned at groove internal upper part；First leads
Electric semiconductor material region is the first conducting semiconductor material, in drift layer, abuts against trenched side-wall and drift layer surface, and
It is connected with substrate layer, the first conducting semiconductor material area forms charge compensation structure with the second conducting semiconductor material of drift layer,
Drift layer upper surface is the second conducting semiconductor material and the first conducting semiconductor material between groove；Schottky barrier junction, position
In abutting against groove the first conducting semiconductor material area upper surface；Upper and lower surface electrode metal, positioned at semiconductor device upper and lower surface,
Upper surface electrode metal connection schottky barrier junction, drift layer the second conducting semiconductor material surface and conductive material.Groove bag
It includes in substrate layer, groove setting includes structure wide at the top and narrow at the bottom；The second conducting semiconductor material of layer surface of drifting about is included for Xiao
Special base barrier junction or Ohmic contact；Conductive material, trenched side-wall insulation material layer and the first conducting semiconductor material area in groove
Form MIS structure；It is not same material that lower part insulating materials, which is included with trenched side-wall insulation material layer, in groove, be silicon nitride or
Ceramic material.
A kind of charge compensation Schottky semiconductor device, substrate layer are the first conducting semiconductor material；Drift layer, for the
Two conducting semiconductor materials, on substrate layer；Multiple grooves, in drift layer, trenched side-wall sets insulation material layer,
Lower part sets insulation material layer in groove；Conductive material is metal, polysilicon or amorphous silicon positioned at groove internal upper part；First
Conducting semiconductor material area is the first conducting semiconductor material, in drift layer, is abutted against entire between trenched side-wall and groove
Drift layer surface, and be connected with substrate layer, the first conducting semiconductor material area is formed with the second conducting semiconductor material of drift layer
Charge compensation structure, drift layer upper surface is the first conducting semiconductor material between groove；Schottky barrier junction, positioned at groove it
Between the first conducting semiconductor material area upper surface；Upper and lower surface electrode metal, positioned at semiconductor device upper and lower surface, upper surface electricity
Pole metal connection schottky barrier junction and conductive material.Groove includes being located in substrate layer, and groove setting includes knot wide at the top and narrow at the bottom
Structure；The second conducting semiconductor material of drift layer is not connected directly with upper surface electrode metal；Conductive material, trenched side-wall in groove
Insulation material layer and the first conducting semiconductor material area form MIS structure；Lower part insulating materials includes and trenched side-wall in groove
Insulation material layer is not same material, is silicon nitride or ceramic material.
It is reversed to improve device by setting charge compensation structure in Schottky semiconductor device for semiconductor device of the present invention
Blocking characteristics, lower part setting insulating materials, reduces channel bottom peak value electric field in the trench, improves reliability；The present invention is partly led
Body device sets the second conducting semiconductor material of charge compensation not being connected directly with surface electrode between groove, prevents PN
Forward conduction is tied, when forward conduction does not introduce few son, therefore the semiconductor device of the present invention has high-speed switch characteristic；The present invention
Top sets MIS structure to semiconductor device in the trench, for reducing the reverse biased lower surface electric field of schottky barrier junction, drop
Low reverse current leakage.
Description of the drawings
Fig. 1 is groove charge compensation Schottky semiconductor device diagrammatic cross-section of the present invention.
Fig. 2 is charge compensation Schottky semiconductor device diagrammatic cross-section of the present invention.
Fig. 3 is the Schottky semiconductor device diagrammatic cross-section of different in width above and below groove of the present invention.
Fig. 4 is the single Schottky semiconductor device diagrammatic cross-section of groove charge compensation of the present invention.
Fig. 5 is the single Schottky semiconductor device diagrammatic cross-section of charge compensation of the present invention.
Fig. 6 is the single Schottky semiconductor device diagrammatic cross-section of different in width above and below groove of the present invention.
Wherein, 1, substrate layer；2nd, drift layer；3rd, conductive material；4th, the first conducting semiconductor material area；5th, insulating materials
Layer；6th, insulating materials；7th, schottky barrier junction；10 upper surface electrode metals；11 lower surface electrode metals.
Specific embodiment
Fig. 1 shows groove charge compensation Schottky semiconductor device diagrammatic cross-section of the present invention, detailed with reference to Fig. 1
Illustrate the Schottky semiconductor device of the present invention.A kind of Schottky semiconductor device, substrate layer 1 are N conductive semiconductor silicon materials
Material, phosphorus atoms doping concentration are 1E19cm-3；Drift layer 2 is the semiconductor silicon material of P conduction types on substrate layer 1,
Boron atom doping concentration is 1E16cm-3；Multiple grooves, in substrate layer 1 and drift layer 2, trench wall is provided with insulation material
The bed of material 5 is silica；Lower part sets insulating materials 6 in groove, is silicon nitride material；Conductive material 3, in groove on
Portion is heavily doped polysilicon；First conducting semiconductor material area 4 is N conductive semiconductor silicon materials, above and below trenched side-wall
Through drift layer, upper surface is schottky barrier junction 7；Upper surface electrode metal 10 is aluminum metal, positioned at semiconductor device upper table
Face, wherein connection drift layer P conductive type semiconductors silicon materials, schottky barrier junction and conductive material, drift layer P conduction types
Semiconductor silicon material surface includes with upper surface electrode metal for schottky barrier junction or Ohmic contact；Lower surface electrode metal
11, it is aluminum metal, positioned at semiconductor device substrate layer lower surface, draws second electrode.Fig. 2 is charge compensation Schottky of the present invention
Semiconductor device diagrammatic cross-section, structure is close with Fig. 1, and distinguishing characteristics sets 6 silicon nitride of insulating materials for lower part in the trench,
Silicon nitride thickness is a gash depth mostly.
Fig. 3 shows the Schottky semiconductor device diagrammatic cross-section of different in width above and below groove of the present invention, with reference to
Fig. 3 Schottky semiconductor devices that the present invention will be described in detail.A kind of Schottky semiconductor device, substrate layer 1 are partly led for N conductions
Body silicon materials, phosphorus atoms doping concentration are 1E19cm-3；Drift layer 2 is the semiconductor of P conduction types on substrate layer 1
Silicon materials, boron atom doping concentration are 1E16cm-3；Multiple grooves, in substrate layer 1 and drift layer 2, trench wall is provided with
Insulation material layer 5, is silica, and groove different in width setting up and down is wide at the top and narrow at the bottom；Lower part sets insulating materials 6 in groove,
For silicon nitride material；Conductive material 3 is heavily doped polysilicon positioned at groove internal upper part；First conducting semiconductor material area 4 is
N conductive semiconductor silicon materials, positioned at trenched side-wall up and down through drift layer, upper surface is schottky barrier junction 7；Upper surface electrode
Metal 10 is aluminum metal, positioned at semiconductor device upper surface, connection drift layer P conductive type semiconductors silicon materials, Schottky gesture
Knot and conductive material are built, wherein drift layer P conductive type semiconductors silicon materials surface includes with upper surface electrode metal for Xiao Te
Base barrier junction or Ohmic contact；Lower surface electrode metal 11 is aluminum metal, positioned at semiconductor device substrate layer lower surface, is drawn
Second electrode.
Fig. 4 shows second of groove charge compensation Schottky semiconductor device diagrammatic cross-section of the invention, with reference to
Fig. 4 Schottky semiconductor devices that the present invention will be described in detail.A kind of Schottky semiconductor device, substrate layer 1 are partly led for N conductions
Body silicon materials, phosphorus atoms doping concentration are 1E19cm-3；Drift layer 2 is the semiconductor of P conduction types on substrate layer 1
Silicon materials, boron atom doping concentration are 1E16cm-3；Multiple grooves, in substrate layer 1 and drift layer 2, trench wall is provided with
Insulation material layer 5 is silica；Lower part sets insulating materials 6 in groove, is silicon nitride material；Conductive material 3, positioned at ditch
Slot internal upper part is heavily doped polysilicon；First conducting semiconductor material area 4 is N conductive semiconductor silicon materials, positioned at channel side
It drifts about between wall and groove layer surface, abuts against the first conducting semiconductor material area connection substrate layer of trenched side-wall, first is conductive
4 upper surface of semiconductor material region is schottky barrier junction 7；Upper surface electrode metal 10 is aluminum metal, on semiconductor device
Surface connects schottky barrier junction and conductive material；Lower surface electrode metal 11 is aluminum metal, positioned at semiconductor device substrate
Layer lower surface, draws second electrode.Fig. 5 be the single Schottky semiconductor device diagrammatic cross-section of charge compensation of the present invention, structure
Close with Fig. 4, distinguishing characteristics sets 6 silicon nitride of insulating materials for lower part in the trench, and silicon nitride thickness is a ditch groove depth mostly
Degree.
Fig. 6 shows the single Schottky semiconductor device diagrammatic cross-section of different in width above and below groove of the present invention, below
With reference to Fig. 6 Schottky semiconductor devices that the present invention will be described in detail.A kind of Schottky semiconductor device, substrate layer 1 are N conductive
Semiconductor silicon material, phosphorus atoms doping concentration are 1E19cm-3；Drift layer 2 is the half of P conduction types on substrate layer 1
Conductor silicon materials, boron atom doping concentration are 1E16cm-3；Multiple grooves, in substrate layer 1 and drift layer 2, trench wall is set
Insulation material layer 5 is equipped with, is silica, groove different in width setting up and down is wide at the top and narrow at the bottom；Lower part sets insulation material in groove
Material 6 is silicon nitride material；Conductive material 3 is heavily doped polysilicon positioned at groove internal upper part；First conducting semiconductor material area
4, it is N conductive semiconductor silicon materials, between narrow trenched side-wall and wide groove in drift layer, abut against trenched side-wall first leads
Electric semiconductor material region connects substrate layer, and 4 upper surface of the first conducting semiconductor material area is schottky barrier junction 7；Upper surface electricity
Pole metal 10 is aluminum metal, positioned at semiconductor device upper surface, connects schottky barrier junction and conductive material；Lower surface electrode
Metal 11 is aluminum metal, positioned at semiconductor device substrate layer lower surface, draws second electrode.
The present invention is elaborated by examples detailed above, while other examples can also be used to realize the present invention.Not office of the invention
It is limited to above-mentioned specific example, therefore the present invention is limited by scope.
Claims (10)
1. a kind of charge compensation Schottky semiconductor device, it is characterised in that：Including：
Substrate layer is the first conducting semiconductor material；
Drift layer is the second conducting semiconductor material, on substrate layer；It is multiple
Groove, in drift layer, trenched side-wall sets insulation material layer, and lower part sets insulating materials in groove；
Conductive material is metal, polysilicon or amorphous silicon positioned at groove internal upper part；
First conducting semiconductor material area is the first conducting semiconductor material, in drift layer, abuts against trenched side-wall and drift
Layer surface, and be connected with substrate layer, the first conducting semiconductor material area forms charge with the second conducting semiconductor material of drift layer
Collocation structure, drift layer upper surface is the second conducting semiconductor material and the first conducting semiconductor material between groove；
Schottky barrier junction, positioned at abutting against groove the first conducting semiconductor material area upper surface；
Upper and lower surface electrode metal, positioned at semiconductor device upper and lower surface, upper surface electrode metal connection schottky barrier junction, drift
Move the second conducting semiconductor material of layer and conductive material.
2. semiconductor device as described in claim 1, it is characterised in that：The groove includes being located in substrate layer.
3. semiconductor device as described in claim 1, it is characterised in that：The groove sets structure wide at the top and narrow at the bottom.
4. semiconductor device as described in claim 1, it is characterised in that：Drift layer second is conductive between the groove partly leads
Body material upper surface is schottky barrier junction or ohmic contact regions.
5. semiconductor device as described in claim 1, it is characterised in that：Conductive material, trenched side-wall insulating materials in groove
Floor and the first conducting semiconductor material area form MIS structure.
6. a kind of charge compensation Schottky semiconductor device, it is characterised in that：Including：
Substrate layer is the first conducting semiconductor material；
Drift layer is the second conducting semiconductor material, on substrate layer；It is multiple
Groove, in drift layer, trenched side-wall sets insulation material layer, and lower part sets insulating materials in groove；
Conductive material is metal, polysilicon or amorphous silicon positioned at groove internal upper part；
First conducting semiconductor material area is the first conducting semiconductor material, in drift layer, abuts against trenched side-wall and groove
Between entirely drift about layer surface, and be connected with substrate layer, the first conducting semiconductor material area and the second conductive semiconductor of drift layer
Material forms charge compensation structure, and drift layer upper surface is the first conducting semiconductor material between groove；
Schottky barrier junction, the first conducting semiconductor material area upper surface between groove；
Upper and lower surface electrode metal, positioned at semiconductor device upper and lower surface, upper surface electrode metal connection schottky barrier junction and
Conductive material.
7. semiconductor device as claimed in claim 6, it is characterised in that：The groove includes being located in substrate layer.
8. semiconductor device as claimed in claim 6, it is characterised in that：The groove sets structure wide at the top and narrow at the bottom.
9. semiconductor device as claimed in claim 6, it is characterised in that：Second conducting semiconductor material of drift layer is not
It is connected directly with upper surface electrode metal.
10. semiconductor device as claimed in claim 6, it is characterised in that：Conductive material, trenched side-wall insulating materials in groove
Floor and the first conducting semiconductor material area form MIS structure.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610996599.8A CN108074986A (en) | 2016-11-13 | 2016-11-13 | A kind of charge compensation Schottky semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610996599.8A CN108074986A (en) | 2016-11-13 | 2016-11-13 | A kind of charge compensation Schottky semiconductor device |
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| Publication Number | Publication Date |
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| CN108074986A true CN108074986A (en) | 2018-05-25 |
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| CN201610996599.8A Pending CN108074986A (en) | 2016-11-13 | 2016-11-13 | A kind of charge compensation Schottky semiconductor device |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103137710A (en) * | 2011-11-21 | 2013-06-05 | 朱江 | Trench Schottky semiconductor device with various insulating layer isolation and preparation method thereof |
| CN103403870A (en) * | 2011-02-04 | 2013-11-20 | 威世通用半导体公司 | Trench MOS barrier schottky (TMBS) having multiple floating gates |
| CN103594514A (en) * | 2012-08-17 | 2014-02-19 | 朱江 | Charge compensation MOS device and preparation method thereof |
-
2016
- 2016-11-13 CN CN201610996599.8A patent/CN108074986A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103403870A (en) * | 2011-02-04 | 2013-11-20 | 威世通用半导体公司 | Trench MOS barrier schottky (TMBS) having multiple floating gates |
| CN103137710A (en) * | 2011-11-21 | 2013-06-05 | 朱江 | Trench Schottky semiconductor device with various insulating layer isolation and preparation method thereof |
| CN103594514A (en) * | 2012-08-17 | 2014-02-19 | 朱江 | Charge compensation MOS device and preparation method thereof |
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