CN108052292A - A kind of high-temperature protection method of solid state disk - Google Patents
A kind of high-temperature protection method of solid state disk Download PDFInfo
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- CN108052292A CN108052292A CN201711420007.9A CN201711420007A CN108052292A CN 108052292 A CN108052292 A CN 108052292A CN 201711420007 A CN201711420007 A CN 201711420007A CN 108052292 A CN108052292 A CN 108052292A
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- solid state
- state disk
- nand flash
- disc
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0683—Plurality of storage devices
- G06F3/0688—Non-volatile semiconductor memory arrays
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/3003—Monitoring arrangements specially adapted to the computing system or computing system component being monitored
- G06F11/3037—Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is a memory, e.g. virtual memory, cache
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/3058—Monitoring arrangements for monitoring environmental properties or parameters of the computing system or of the computing system component, e.g. monitoring of power, currents, temperature, humidity, position, vibrations
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/061—Improving I/O performance
- G06F3/0613—Improving I/O performance in relation to throughput
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
- G06F3/0658—Controller construction arrangements
Abstract
The present invention relates to technical field of memory, the embodiment of the invention discloses a kind of high-temperature protection method of solid state disk, the described method includes:The temperature of solid state disk is detected, according to the temperature information of feedback, the bandwidth of solid state disk is rationally efficiently limited and ensure that other performance indicators of solid state disk.Whereby, the present invention is for solid state disk in some special application scenarios such as environment temperatures up to 40 DEG C~100 DEG C, it avoids solid state disk under hot conditions and enters abnormal patterns, prevent excessive temperature from solid state disk being caused to burn out, cause loss of data, the reliability of solid state disk is greatly strengthened, solves the application technology difficult point of solid state disk at high temperature.
Description
Technical field
The present invention relates to electronic memory technical field, more particularly to a kind of high-temperature protection method of solid state disk.
Background technology
With the continuous development of electronic information technology, the demand of big data storage constantly drives flash memories rapidly
Develop to more extensive, more high density, higher reliability direction.Solid state disk (SSD, Solid State Driver) is one
The non-volatile storage device of kind possesses and preserves data for a long time, quickly update the data, store the characteristics such as mass data, meets
Big data storage demand in every profession and trade.Solid state disk, as storage medium, is had using high density, the NAND Flash of large capacity
The advantages that access speed is fast, memory capacity is big is widely used in the numerous areas such as military affairs, space flight, consumption, industry control, monitoring.
Solid state disk is mainly made of host communication interface, SSD controller, NAND flash storage mediums and power supply interlock circuit,
In, host communication interface, SSD controller, NAND flash storage mediums directly decide the performance of solid state disk.Host communication
Communication interface of the interface as host and solid state disk completes command interaction, the mainstream of data-transformation facility, instantly solid state disk
Communication interface has SATA, AHCI, NVME etc..SSD controller is mainly used for host communication interface to NAND flash storage mediums
Between data transfer；NAND flash storage mediums realize the storage to data, and the performance of NAND flash storage mediums exists
It is played a crucial role in solid state disk, directly restricts the performance of entire solid state disk.
As solid state disk application scenarios become increasingly complex, when its operating ambient temperature is at 60~100 DEG C, it is contemplated that Gu
State hard disk oneself power consumption, the disc temperature of solid state disk may be more than the maximum operation of solid-state hard disk controller or storage medium
Temperature causes solid state disk cisco unity malfunction, causes user data loss or even solid state disk permanent damages occurs.Solid-state
Power consumption caused by itself causes when the excessively high mainly operating ambient temperature of hard disc temperature and disc business operation, building ring
Border temperature is determined by user, then a kind of method is needed to ensure that disc can work normally in hot environment, and meanwhile it is as far as possible simultaneous
Disc performance is cared for, can only be achieved the goal by adjusting the performance of disc.
Solid state disk disc performance is mainly reflected in bandwidth, and solid state disk disc bandwidth is controlled primarily by host communication and connects
Mouth, the rear sort command concurrent capability of solid-state hard disk controller and the performance of NAND flash storage mediums, solid state disk disc
Bandwidth includes data transfer bandwidth and order transmission bandwidth, since solid state disk mainly transmits data, output transmission
Wide main restriction disc bandwidth.And for the rear sort command concurrent capability for solid state disk disc its solid-state hard disk controller specified
It is substantially fixed.In existing technology, mainly reduce the I/O concurrencies of host communication interface reduces disc temperature to reach
The purpose of degree, still, when disc work environment temperature on 80 DEG C it is difficult to ensure that disc can work normally, and disk can be caused
Piece performance fluctuation is larger, and bandwidth amplitude is very big, so as to substantially reduce the performance of solid state disk, seriously limits the wide of solid state disk
General application.
In conclusion in the actual use of solid state disk, the environment temperature of solid state disk work is often to go out at 80 DEG C
It is existing, such as enterprise is for a long time using server or solid state disk is used in the environment of hot weather situations such as, to ensure
Disc remains to normal and efficient operation under high temperature, and meets high reliability, is highly desirable to propose that a kind of solid-state is hard
Disk solves the technical bottleneck of solid state disk high performance operation under hot environment.The reliability of solid state disk is improved, is realized more wide
General application, makes it possible the solid state disk of manufacture high reliability.
The content of the invention
In view of the foregoing drawbacks, the technical problem to be solved by the invention is to provide a kind of high temperature protection sides of solid state disk
Method, it is therefore an objective in the case where disc temperature is higher, disc temperature is effectively reduced, so as to improve the reliable of solid state disk
Property, and other performances of disc are taken into account as far as possible, ensure safe, reliable, efficient work under solid state disk high temperature.
To achieve the above object, the present invention provides a kind of high-temperature protection method of solid state disk, and temperature sensing circuit is to solid
The temperature of state hard disc is detected, and the bandwidth of solid state disk is carried out effectively, rationally according to the temperature information of detection
Ground limit, so as to reduce the power consumption of solid state disk, with this prevent solid state disk due to temperature is excessively high and cisco unity malfunction.And
And a kind of high-temperature protection method of solid state disk provided by the present invention, while solid state disk bandwidth is limited also effectively
It ensure that preferable disc performance, on the basis of existing technology, significantly enhance the reliability of solid state disk.The method
Include the following steps：
Step 1：Temperature sensing circuit detects the disc temperature of solid state disk；
Step 2：Clocked flip temperature sensing circuit task is set；
Step 3：The initial temperature threshold values of solid state disk is set；
Step 4：Start clocked flip task；
Step 5：The actual temperature information of timing acquisition solid state disk；
Step 6：By the actual temperature of solid state disk compared with the initial temperature threshold value set, the difference of the two is obtained
Value；
Step 7：According to the difference between the actual temperature of solid state disk and the initial temperature threshold values of setting, solid state disk is adjusted
Bandwidth.
The disc temperature of the temperature sensing circuit detection solid state disk, temperature sensing circuit receives trigger signal, and opens
Dynamic solid state disk temperature acquisition task.
The setting clocked flip temperature sensing circuit, T1 interrupt cycle of the timing circuit including configuring solid state disk,
Start timer, and periodically trigger signal is sent to temperature sensing circuit in units of T1.When the actual temperature of solid state disk
When degree reaches the temperature initiation threshold of setting, start to carry out data transmission solid state disk bandwidth limitation.
The timed task can periodically send trigger signal to temperature sensing circuit, and it is anti-to obtain temperature sensing circuit
The actual temperature of the solid state disk of feedback.
Solid state disk bandwidth is promoted or limits by adjusting the data transfer bandwidth of NAND Flash.
The data transfer bandwidth of the adjustment NAND Flash, including concurrently leading to the order in NAND Flash controllers
The data throughput of road quantity and NAND Flash interfaces is adjusted.
The concurrent number of channels of order in the adjustment NAND Flash controllers, including：When the actual temperature of solid state disk
Degree is reduced more than the initial temperature threshold values and higher than the disc temperature value of upper a cycle set in NAND Flash controllers
The concurrent number of channels of order；When the actual temperature of solid state disk is more than initial temperature threshold values and than the disc temperature of upper a cycle
Angle value is low, increases the concurrent number of channels of order in NAND Flash controllers；When the actual temperature of solid state disk is less than
Beginning threshold temperature recovers the concurrent number of channels of order in the NAND Flash controllers of acquiescence.
The data throughput of the adjustment NAND Flash interfaces, including：It is set when the actual temperature of solid state disk is more than
Initial temperature threshold values and higher than the disc temperature value of upper a cycle, reduce the data throughputs of NAND Flash interfaces；
When the actual temperature of solid state disk is more than initial temperature threshold values and, promotion NAND lower than the disc temperature value of upper a cycle
The data throughput of Flash interfaces；When solid state disk actual temperature be less than initial temperature threshold values, recover acquiescence NAND
The data throughput of Flash.
The data throughput of the adjustment NAND Flash interfaces, using the reading to NAND flash storage mediums or volume
The operating time of journey order is adjusted.
The business operation time of the adjustment NAND flash storage mediums includes：
Step 1：The disc temperature of solid state disk is periodically obtained, is denoted as the first temperature of disc T1；
Step 2：The temperature initiation threshold of operating ambient temperature setting disc according to residing for disc, is denoted as the second temperature of disc
Spend T2；
Step 3：According to the technological temperature upper limit of solid state disk main control chip, design temperature allowance, and calculate solid state disk
The upper limit of disc temperature is denoted as the 3rd temperature T3 of disc；
Step 4：The basic operation time of reading or program command is obtained inside from NAND flash storage mediums, is remembered respectively
For the first read access time Cr1 and the first programming time Cw1 of NAND Flash；
Step 5：When the first temperature of disc T1 of solid state disk rises to the 3rd temperature T3 of disc, setting NAND Flash are deposited
The reading of storage media or the program command maximum operating time are denoted as the second read access time Crmax2 and the of NAND Flash respectively
Two programming time Cwmax2；
Step 6：According to Cr1 and Crmax2, Cw1 and Cwmax2 obtain the reading of NAND flash storage mediums or programming operation
When, the operating time difference ordered is corresponded to, is denoted as the 3rd read access time Cr3 and the 3rd programming time of NAND Flash respectively
Cw3；
Step 7：The actual temperature range difference of solid state disk is obtained according to T2 and T3, is denoted as the first temperature gap of disc
T4；
Step 8：According to T4 and Cr3, T4 and Cw3, the NAND caused by averagely each degree Celsius of temperature change is obtained
The changing value of flash storage medium command operation time, the 4th read cycle Cr4 and the 4th for being denoted as NAND Flash respectively are compiled
Journey cycle Cw4；
Step 9：If T1 is more than or equal to T2, starts to adjust solid state disk bandwidth, obtain the difference of T1 and T2, and obtain this
To the action type of NAND flash storage mediums, with reference to Cr4 and Cw4 respectively obtain NAND flash storage mediums reading or
The actual operating time of program command.When this is reading order, to the read operation time of NAND flash storage mediums
Cread meets：
Cread=(T1-T2) * Cr4+Cr1
During this programming operation, the actual program time Cwrite of NAND flash storage mediums is met：
Cwrite=(T1-T2) * Cw4+Cw1
If T1 is less than T2, stop adjustment solid state disk bandwidth, the at this time reading of NAND flash storage mediums or programming life
The operating time of order uses the basic operation time.To the actual operating time of the read operation of NAND flash storage mediums
Cread meets：
Cread=Cr1
The actual operating time Cwrite of the programming operation of NAND flash storage mediums is met：
Cwrite=Cw1.
Description of the drawings
Fig. 1 shows the Ssd apparatus added in after method for limiting speed according to embodiments of the present invention.
Fig. 2 shows the internal structure block diagram of temperature sensing circuit module according to embodiments of the present invention.
Fig. 3 shows high temperature Control for Speed Limitation module frame chart according to embodiments of the present invention.
Fig. 4 shows a kind of solid state disk high-temperature protection method overview flow chart according to embodiments of the present invention.
Fig. 5 shows that solid state disk according to embodiments of the present invention adjusts operating time flow in reading or programming operation
Figure.
Specific embodiment
In order to make the purpose , technical scheme and advantage of the present invention be clearer, below in conjunction with the accompanying drawings and specific implementation
The present invention is described in further detail for mode.It should be appreciated that specific embodiment described herein is only used to explain this
Invention, is not intended to limit the present invention.
Referring to Fig. 1, provide according to embodiments of the present invention it is a kind of add after method for limiting speed solid state disk (SSD,
Solid State Driver) device, it stores and is situated between including front end host communication interface, solid-state hard disk controller and NAND Flash
Matter chip.The operation service of solid state disk it is total be divided into programming business, reading business and erasing business.Entire solid state disk circuit
It realizes that the data for issuing host are stored into NAND flash storage particles, can also realize and deposit NAND flash storages
The digital independent of storage is to host.The front end host communication interface is connected with solid-state hard disk controller, for host computer and disk
The interface carried out data transmission between piece, the data including solid state disk are sent to host or are sent to the data of host solid
State hard disk controller；For the data of solid state disk to be sent to host or the data of host are sent to solid state disk control
Device.The front end host communication interface includes SATA interface or PCIE interfaces, can support the SATA3.0 of current mainstream
(Serial ATA, serial ATA) interface or PCIE (Peripheral Component Interconnect Express)
Interface.Solid-state hard disk controller connects host communication interface, and for receiving or uploading data to host communication interface, solid-state is hard
Disk controller is the core of entire solid state disk, for control the data transmission of entire solid state disk disc, order transmission and it is right
The reading of disc, programming, the operation for wiping business.Solid-state hard disk controller is connected to NAND Flash memory chips, for
During to solid state disk read operation, the data read from NAND Flash storage chips are sent to solid-state hard disk controller, then lead to
The operation control of solid-state hard disk controller is crossed, the data of reading are sequentially delivered to host communication interface circuit, are finally uploaded to
Host.Solid-state hard disk controller includes temperature sensing circuit module, generates temperature detection trigger signal and is connected to the temperature
Read module, for receiving the control signal in temperature read module, triggering temperature sensing circuit module carries out temperature detection, and
Temperature value information is periodically sent to high temperature Control for Speed Limitation module；
Temperature read module generates temperature reading control signal and is connected to the temperature sensing circuit module and periodically touches
Power Generation Road, for reading the temperature level of solid state disk disc in real time；
Timing trigger circuit generates periodically timing pip and is connected to high temperature Control for Speed Limitation module and temperature reading
For the trigger mechanism as temperature detection, temperature read control circuit is given by cycle transmission timing pip for modulus block；
High temperature Control for Speed Limitation module, the signal for generating control clocked flip are connected to the timing trigger circuit, generate
Control for Speed Limitation order is connected to the NAND Flash controllers, and the temperature information value of reception is sent to the high temperature speed limit
For working as the temperature of solid state disk disc more than set temperature level, high temperature limit is carried out to solid state disk for maker module
Speed control.
NAND Flash controllers receive the Control for Speed Limitation order of high temperature Control for Speed Limitation module transmission, and it is logical to generate adjustment
The control signal and data amount of bandwidth of road and NAND Flash memory chip data bandwidths to NAND Flash memory chips connect
Mouth circuit, for controlling the programming of entire solid state disk disc or reading or erasing operation and controlling data and the biography of order
It passs, and receives the high temperature speed limit logic control signal and NAND Flash memory chip speed-limiting bandwidthes of the transmission of high temperature speed limit module
Value；
NAND Flash memory chip interface circuits receive the control signal and data of the transmission of NAND Flash controllers,
It generates the programming for accessing NAND flash storage chips or erasing or read operation sequential is sent to NAND Flash storage cores
Piece；NAND Flash memory chips interface circuit can support asynchronous, ONFI protocol interfaces and Toggle protocol interfaces.This field
Technical staff understands that ONFI (Open NAND Flash Interface) agreements and Toggle synchronous protocols are NAND Flash
The international protocol that memory particle manufacturer marks jointly, different vendor use different agreement.
High temperature speed limit maker module generates NAND Flash readings or the latency values size transmission of program command
To high temperature Control for Speed Limitation module, for receiving the obtained different temperatures value of information of high temperature Control for Speed Limitation module, and NAND is generated
Flash is read or the latency values size of program command.Temperature sensing circuit module described in the embodiment of the present invention, temperature are read
Modulus block, timing trigger circuit module, high temperature Control for Speed Limitation module, high temperature speed limit module, NAND Flash controllers (NAND
Flash Controller, NFC) and NAND flash storage interface circuits be all made of digital integrated electronic circuit, to be actual
Existing chip circuit module.
Solid state disk rear end includes the NAND Flash memory chips interface circuit in NAND Flash controllers and leads to more
The NAND Flash memory chips in road.Solid state disk rear end is made of multichannel in the embodiment of the present invention, can so realize number
According to massive store and data efficient storage.It is generally formed per passage by being more than two NAND Flash memory chips, this
The chips of NAND flash storage mediums described in embodiment use 8 NAND flash storage medium chip cascades, form one
NAND Flash memory channels have 4 NAND Flash memory channels altogether.Wherein NAND flash storage mediums chip includes
SLC NAND Flash memory chips, MLC NAND Flash memory chips, TLC NAND Flash memory chips, 3D NAND
Flash memory chip.SLC NAND Flash (Single Level Cell, single layer cell flash memory) storage chip, that is, each battle array
Row device stores 1 bit data, each array device storage 2 of MLC NAND Flash (Multi-Level Cell) storage chip
Bit data, each array device of TLC NAND Flash (Triple-Level Cell) storage chip store 3 bit datas.
Its array structure of 3D NAND Flash memory chips substantially increases memory capacity using current foreword technology three-dimensional storage.
When to solid state disk programming operation, solid-state hard disk controller receives the data transmitted by host communication interface and order, and presses
Corresponding time sequential routine circuit is generated according to operational order, data are sent to NAND Flash storage cores according to programming operation sequential
Piece specifies address, completes the programming operation to solid state disk.Host communication interface uses SATA (Serial Advanced
Technology Attachment, serial ATA interface specification) interface protocol, it realizes and carries out command interaction and number with SATA host
According to transmission.The core component of solid state disk be solid-state hard disk controller and NAND flash storage medium chips, solid state disk control
Device processed controls realization from master for the data for being sent to front end interface circuit from host to be controlled to be sent to solid-state hard disk controller
Machine transmit into data be programmed to NAND flash storages chip or control realize to NAND flash storage chips
Erasing operation or realization read data to front end interface circuit from NAND flash storage chips.NAND Flash are deposited
Chip is stored up to be used to store as data.The Ssd apparatus of the embodiment of the present invention is improved solid-state hard disk controller, adds
Enter high-temperature protection circuit control module, realize the high temperature protection to solid state disk, in the premise of smaller influence solid state disk performance
Under with dramatically improving solid state disk stability.After Fig. 1 shows addition method for limiting speed according to embodiments of the present invention
Solid state disk circuit device, wherein, solid-state hard disk controller includes temperature sensing circuit module, temperature read module, periodically touches
Power Generation Road module, high temperature Control for Speed Limitation module, high temperature speed limit module, NAND Flash controllers (NAND Flash
Controller, NFC) and NAND flash storage interface circuits.Temperature sensing circuit module and temperature read module, timing
Trigger circuit module, high temperature Control for Speed Limitation module, high temperature speed limit module are sequentially connected；High temperature Control for Speed Limitation module and NAND
Flash controllers, NAND Flash storage chip interface circuits are sequentially connected.Wherein, temperature sensing circuit module is used to receive
Control signal in temperature read module, triggering temperature sensing circuit module carry out temperature detection, and periodically by temperature value
It is sent to high temperature Control for Speed Limitation module.Temperature sensing circuit module is really an analog-digital converter, and analog signal source is temperature
Spend detection circuit.Temperature sensing circuit is converted to the realization module of electric signal as physical signal, and core devices are in module
PT100 temperature sensors, temperature signal is transmitted to corresponding detection circuit by medium and is converted to electric signal by it.Temperature
Read module is for the real-time temperature level for reading solid state disk disc.Triggering machine of the timers trigger circuit as temperature detection
System gives temperature read module by cycle transmission trigger signal, and the triggering cycle can be by User Defined, mainly by increasing a master
Machine communications command come complete triggering the cycle update.The triggering cycle is handed down to timer circuit by CPU, and timer circuit realizes meter
Number when the triggering cycle for counting up to setting, that is, generates trigger signal and is sent to temperature read module.High temperature Control for Speed Limitation module is used
It is more than set temperature level in the temperature when solid state disk disc, high temperature Control for Speed Limitation is carried out to solid state disk.Wherein, it is high
The method of warm speed limit is to adjust the data transfer bandwidth of NAND Flash, including concurrent to the order in NAND Flash controllers
The data throughput of number of channels and/or NAND Flash interfaces is adjusted.High temperature speed limit maker module is used to receive
The obtained different values of information of high temperature Control for Speed Limitation module, including the first temperature of disc T1, disc second temperature T2, disc the 3rd
The the first read access time Cr1 and the first programming time Cw1 of temperature T3, NAND Flash, the second read access time of NAND Flash
Crmax2 and the second programming time Cwmax2.High temperature speed limit maker module receives what high temperature Control for Speed Limitation module was calculated
After high-temperature control parameter, calculate and generate to the actual program time Cwrite of NAND flash storage mediums and/or to NAND
The read operation time Cread time values size of flash storage medium, being stored to NAND Flash for most calculating at last are situated between
The actual program time Cwrite and/or the value size of Cread times read operation time of matter are sent to high temperature Control for Speed Limitation mould
Its value size is sent to NAND Flash controllers by block, the control of high temperature Control for Speed Limitation module.By NAND Flash controller roots
According to the value size control NAND Flash memory chip interface circuits, final regulation and control accesses the data of NAND Flash memory chips
Bandwidth, so as to reach the excessively high scheme for carrying out speed limit of temperature, temperature, which reduces, recovers data bandwidth.So as to which not influencing, solid-state is hard
It efficiently solves solid state disk work problem in a high temperauture environment in the case of other working performance indexs of disk, greatly improves
The reliability of solid state disk.
Secondly, the solid state disk of the embodiment of the present invention possesses 4 passages, and each passage can be with 8 NAND Flash of carry
Storage medium chip, the solid state disk of multichannel can realize the massive store and higher bandwidth of data, and multichannel solid-state is hard
The problem of disk co-operation causes solid state disk disc temperature to rise is also the reason for present invention causes high temperature, is meeting multichannel
It carries out big data transmission and multi-channel data transmission causes the raised contradictory problems of disc temperature to be also that the present invention program is solved
One of certainly the problem of.The method of high temperature speed limit is to adjust the data transfer bandwidth of NAND Flash, is also included to NAND Flash
The adjustment of the concurrent number of channels of order in controller, the value of information that high temperature Control for Speed Limitation module receives temperature read module are big
Hour, compare the disc temperature value of reading and initial temperature threshold difference size, set when the actual temperature of solid state disk is more than
Initial temperature threshold values and higher than the disc temperature value of upper a cycle, the order reduced in NAND Flash controllers is concurrent
Number of channels；When the actual temperature of solid state disk is more than initial temperature threshold values and lower than the disc temperature value of upper a cycle,
Increase the concurrent number of channels of order in NAND Flash controllers；When the actual temperature of solid state disk is less than initial temperature valve
Value recovers the concurrent number of channels of order in the NAND Flash controllers of acquiescence.
The continuous development of solid state disk, integrated level is higher and higher, not in the case where being simply suitable for ordinary room temperature environment, application
Scene becomes increasingly complex, under some special application scenarios, if environment temperature is more than such as 60~100 degrees Celsius of ordinary temperature
When, then to the programming operation of solid state disk either read operation or during erasing operation, its own operating power consumption is very high, may
The technological temperature that the temperature of solid state disk in itself is caused to be more than its chip, causes solid state disk disc abnormal work, causes user
The situation of loss of data also results in solid state disk and burns out when serious.Fig. 1 shows front end interface circuit according to embodiments of the present invention
Using SATA agreements, in order not to slow down the access rate of solid state disk and do not reduce other performance indicators, the present invention still uses
Front end interface issues 32 I/O port orders simultaneously, i.e. the concurrency of front end I/O port is still 32, with having patent before
The reduction instruction queue depth (reducing front end I/O port concurrency) that CN201210475065 proposes high temperature protection is compared,
Although the scheme for playing the role of patent plays protection solid state disk to a certain extent, but causes the entirety of solid state disk
Performance is greatly reduced.A kind of high-temperature protection method of solid state disk proposed by the present invention well solves the bottle for the prior art of knowing clearly
Neck, the protection under customer service hot environment to solid state disk, while well ensure the superperformance of solid state disk, it enhances
The reliability of solid state disk.
Fig. 2 shows the internal structure block diagram that temperature detection according to embodiments of the present invention is realized, including temperature sensor, temperature
Spend conversion circuit, temperature data register, detection trigger module.Temperature conversion circuit, temperature data register, detection trigger mode
Block is made of digital circuit.Wherein, temperature sensor, temperature conversion circuit, temperature data register are sequentially connected, detection triggering
Module is connected to temperature conversion circuit.Temperature sensor is for temperature signal to be transferred in temperature conversion circuit, temperature sensing
Device is formed using special substance, has preferable effect for its application scenarios, service life, precision.Temperature conversion circuit
Causing voltage's distribiuting according to the corresponding impedance variations of temperature sensor, the main thermo-resistive effect using temperature sensor carries out, from
And obtain conversion of the temperature physical signal to voltage signal.It is mended since the particularity of temperature sensor (PT100) needs temperature
Circuit is repaid, main function is that it is calibrated, more accurate for the temperature value that uses.When temperature signal is converted to electricity
Digital signal value just can be directly obtained after pressure signal by analog-to-digital conversion, conversion benchmark carries out as the following formula：
Temperature value=Vout/Cbase
In above formula, temperature value is final exact value, and Vout is the value of electrical signals that temperature conversion circuit obtains, and Cbase is
Temperature reference value, i.e., the linear relationship of the variation of voltage value caused by every degree Celsius of variation.In actual application, sensor
The temperature resistance efficiency of part is unlikely to be linear relationship, but after overcompensation, can approximation see linear relationship as, thus can calculate
To the operating temperature of solid state disk.And operating temperature is temporarily stored into temperature data register, is the master control by solid state disk
It is written in the register, finally needs to go to access the base of the data register with specific time sequence when the value is obtained
Location gets the operating temperature of solid state disk with this.Temperature detection trigger module is passive type triggering, it is necessary to the triggering letter specified
Number, so, the temperature acquisition of solid state disk is passive type, after only providing trigger signal to temperature detection trigger module,
Temperature detection could really work with conversion interlock circuit, and what otherwise temperature register preserved is the result of last detection.
For temperature sensor for detecting solid state disk disc temperature, what it got is physical signal, and it is direct to obtain result
Send temperature conversion circuit to.Temperature conversion circuit main function is that physical signal is converted to electric signal, because electric signal is
Actually can sampled signal, electrical signal data is then sent to processor.Data after processor calculates are actual solid-state
Hard disc temperature value, processor most deposit in the temperature register of solid-state address at last by newest temperature value, and user can be straight
It connected the address and gets the current disc temperature value of solid state disk.It is that the sampling solid-state specially designed is hard to detect trigger module
The circuit of disk temperature, user can be applied to the module by simple level triggers, which can automatic trigger temperature transition electricity
Road works and new data is sent to processor.
Fig. 3 shows high temperature speed-limiting control device figure according to embodiments of the present invention, including：Temperature acquisition signal, temperature are adopted
Collect register, high temperature Control for Speed Limitation module, NAND Flash passages, the temperature acquisition register, high temperature Control for Speed Limitation module,
NAND Flash passages are all made of digital integrated electronic circuit, are the tangible chip integrated circuits manufactured.Wherein：
The temperature acquisition signal is connected to the high temperature Control for Speed Limitation module, for triggering the temperature acquisition of solid state disk
Circuit works；
The temperature acquisition register is connected to the high temperature Control for Speed Limitation module, for storing disc temperature value；
The high temperature Control for Speed Limitation module is connected to the NAND Flash passages, for complete according to disc temperature value information
It limits and controls into high temperature；
The NAND Flash passages are connected to the high temperature Control for Speed Limitation module, for as NAND Flash orders or
The transmission channel of data.
The high temperature Control for Speed Limitation module includes：Temperature acquisition signal generator module, temperature value validation checking module, temperature
Spend times of collection statistical module, temperature analysis module, temperature and threshold values comparison module, high temperature speed limit starts determination module, NFC is ordered
Operating time acquisition module, NFC command operation available time analysis modules and NFC command operation time configuration modules are made,
In：
The temperature acquisition signal generator module is connected to the temperature RMS to DC module, for periodically sending out
Temperature detection signal, and temperature value information is received, and it is transferred to temperature RMS to DC module；Herein, NFC (NAND Flash
Controller, NAND Flash controllers) specialized vocabulary known to those skilled in the art.
The temperature RMS to DC module is connected to the temperature acquisition number statistical module, for temperature value information
It is detected, the direct discarding if detection Current Temperatures information is invalid；Otherwise, effective temperature information is transferred to temperature acquisition
Number statistical module；
The temperature acquisition number statistical module is connected to the temperature analysis module, for obtaining multiple temperature information
Value, and count the timestamp information of temperature value；
The temperature analysis module is connected to the temperature and threshold values comparison module, for foundation timestamp information to all
Temperature information analyzed, obtain a maximum temperature value；
The temperature is connected to the high temperature speed limit with threshold values comparison module and starts determination module module, for comparison temperature
Value and setting threshold values, this compares operation and further includes compared with the upper Periodic Temperature value of information；
The high temperature speed limit starts determination module and is connected to the NFC command operations time-obtaining module, for judging height
Whether warm speed limit, which will start, starts, and generates an enabling signal；
The NFC command operations time-obtaining module is connected to the NFC command operations available time analysis module, uses
According to the actual operating time that the temperature transition currently got is NFC orders；
The NFC command operations available time analysis module is connected to NFC command operation time configuration modules, for pair
The validity of the actual operating time of NFC orders is analyzed, mainly identify current NFC orders actual operating time whether
It transfinites；
The NFC command operations time configuration module is connected to NAND Flash passages, for storing current NFC orders
Actual operating time, and continuously effective, the operating time until getting new NFC orders.
A kind of high temperature speed-limiting control device for solid-state hard disk controller, which is characterized in that can to the temperature of disc into
The real-time acquisition operations of row.
A kind of high temperature speed-limiting control device for solid-state hard disk controller, which is characterized in that obtained based on disc temperature
To the actual operating time of NFC read commands.
A kind of high temperature speed-limiting control device for solid-state hard disk controller, which is characterized in that obtained based on disc temperature
To the actual operating time of NFC write orders.
A kind of high temperature speed-limiting control device for solid-state hard disk controller, which is characterized in that described to believe disc temperature
It ceases validity and carries out intelligent measurement.
A kind of high temperature speed-limiting control device for solid-state hard disk controller, which is characterized in that described to NFC command operations
Time is stored.
A kind of high temperature speed-limiting control device for solid-state hard disk controller, which is characterized in that during the NFC command operations
Between can the new operating time replaced.
A kind of high temperature speed-limiting control device for solid-state hard disk controller, which is characterized in that the NFC orders include：
To the order of NAND flash storage read operations, programming operation order, erasing operation order, read states order, pattern switching
Id command is read in order.
A kind of solid state disk high-temperature protection method overview flow chart according to embodiments of the present invention shown by Fig. 4, including with
Lower step：
Step 1：Temperature sensing circuit detects the disc temperature of solid state disk；
Step 2：Clocked flip temperature sensing circuit is set；
Step 3：The initial temperature threshold values of solid state disk is set；
Step 4：Start clocked flip task；
Step 5：The actual temperature information of timing acquisition solid state disk；
Step 6：By the actual temperature of solid state disk compared with the initial temperature threshold value set, the difference of the two is obtained
Value；
Step 7：According to the difference between the actual temperature of solid state disk and the initial temperature threshold values of setting, solid state disk is adjusted
Bandwidth.
The difference according between the actual temperature of solid state disk and the initial temperature threshold values of setting adjusts solid state disk
Bandwidth.By detecting temperature and the initial temperature difference of setting, the bandwidth of solid state disk is adjusted to adjust the behaviour of solid state disk
Make the time cycle, so as to have the function that reduce temperature.The bandwidth of solid state disk includes data transfer bandwidth and order conveyor
Width, due to being mainly the storage of data to the operation of solid state disk, and order relative data very little, therefore influence solid state disk band
Width is mainly determined by data transfer bandwidth.
The setting clocked flip temperature sensing circuit, T1 interrupt cycle of the timing circuit including configuring solid state disk,
Start timer, and periodically to temperature sensing circuit transmission timing trigger signal in units of T1.Temperature sensing circuit mould
Block generates temperature detection trigger signal and is connected to the temperature read module, for receiving the control in temperature read module
Signal, triggering temperature sensing circuit module carries out temperature detection, and temperature value information periodically is sent to high temperature speed limit control
Molding block.
The setting clocked flip temperature sensing circuit, T1 interrupt cycle of the timing circuit including configuring solid state disk,
Start timer, and periodically trigger signal is sent to temperature sensing circuit in units of T1.When the actual temperature of solid state disk
When degree reaches the temperature initiation threshold of setting, start to carry out bandwidth limitation to solid state disk.Temperature set by solid state disk rises
For beginning threshold value by user setting, usual embodiment is 70 degrees Celsius.When temperature sensing circuit detection disc reaches set temperature starting
Threshold value then starts to limit solid state disk bandwidth.
The timed task can periodically send trigger signal to temperature sensing circuit, and it is anti-to obtain temperature sensing circuit
The actual temperature of the solid state disk of feedback.By the actual temperature of solid state disk compared with the initial temperature threshold value set, obtain
The difference of the two.The solid state disk actual temperature fed back such as the temperature sensing circuit that is obtained in embodiment is T1, the starting of setting
Temperature threshold is T2, then the size of T1-T2 is obtained.It is promoted or limited by adjusting the data transfer bandwidth of NAND Flash
Solid state disk bandwidth.
The data transfer bandwidth of the adjustment NAND Flash, including concurrently leading to the order in NAND Flash controllers
The data throughput of road quantity and/or NAND Flash interfaces is adjusted.
The concurrent number of channels of order in the adjustment NAND Flash controllers, including：When the actual temperature of solid state disk
Degree is reduced more than the initial temperature threshold values and higher than the disc temperature value of upper a cycle set in NAND Flash controllers
The concurrent number of channels of order；When the actual temperature of solid state disk is more than initial temperature threshold values and than the disc temperature of upper a cycle
Angle value is low, increases the concurrent number of channels of order in NAND Flash controllers；When the actual temperature of solid state disk is less than
Beginning threshold temperature recovers the concurrent number of channels of order in the NAND Flash controllers of acquiescence.
The data throughput of the adjustment NAND Flash interfaces, including：It is set when the actual temperature of solid state disk is more than
Initial temperature threshold values and higher than the disc temperature value of upper a cycle, reduce the data throughputs of NAND Flash interfaces；
When the actual temperature of solid state disk is more than initial temperature threshold values and, promotion NAND lower than the disc temperature value of upper a cycle
The data throughput of Flash interfaces；When the actual temperature of solid state disk is more than initial temperature threshold values and than the disk of upper a cycle
When piece temperature value wants low, the data throughput of NAND Flash interfaces is promoted to ensure solid state disk integrated operation performance boost,
I.e. when temperature reduction is gone down, it is impossible to limit solid state disk bandwidth always, therefore use the data for promoting NAND Flash interfaces
Throughput promotes solid state disk bandwidth, so as to greatly promoting solid state disk performance.When the actual temperature of solid state disk is less than
Beginning threshold temperature recovers the data throughput of the NAND Flash of acquiescence.
The data throughput of the adjustment NAND Flash interfaces, using the reading to NAND flash storage mediums or volume
The operating time of journey order is adjusted.It is described to be to the reading of NAND flash storage mediums or the operating time of program command
To the incubation period of NAND Flash memory chips operation.
The reading of the adjustment NAND flash storage mediums or programming business operation time include：
Step 1：The disc temperature of solid state disk is periodically obtained, is denoted as the first temperature of disc T1；
Step 2：The temperature initiation threshold of operating ambient temperature setting disc according to residing for disc, is denoted as the second temperature of disc
Spend T2；
Step 3：According to the technological temperature upper limit of solid state disk main control chip, design temperature allowance, and calculate solid state disk
The upper limit of disc temperature is denoted as the 3rd temperature T3 of disc；The technological temperature of the solid state disk main control chip is by line of production technology
It is determined, is usually 125 degrees Celsius.Such as technological temperature is 125 degrees Celsius in embodiment, temperature allowance is 25 degrees Celsius, then
The upper limit of the disc temperature of solid state disk is calculated as the technological temperature upper limit-design temperature allowance=125-25=100 degrees Celsius.Gu
The upper limit of the disc temperature of state hard disk is maximum disc temperature during the adjustment no more than, even hot environment temperature at this time
Degree is 71 degrees Celsius, and the temperature initiation threshold of setting is also 70 degrees Celsius, then starts to adjust solid state disk bandwidth this moment, and to allow
Solid state disk disc temperature is no more than 100 degrees Celsius of the upper limit of disc temperature.
Step 4：The basic operation time of reading or program command is obtained inside from NAND flash storage mediums, is remembered respectively
For the first read access time Cr1 and the first programming time Cw1 of NAND Flash；It is obtained inside from NAND flash storage mediums
It reads or the basic operation time of program command can grasp directly by NAND Flash memory chip operation manuals according to chip
Make handbook and send corresponding order to obtain the first read access time Cr1 and the first programming time Cw1 of NAND Flash.
Step 5：When the first temperature of disc T1 of solid state disk rises to the 3rd temperature T3 of disc, setting NAND Flash are deposited
The reading of storage media or the program command maximum operating time are denoted as the second read access time Crmax2 and the of NAND Flash respectively
Two programming time Cwmax2；
Step 6：According to Cr1 and Crmax2, Cw1 and Cwmax2 obtain the reading of NAND flash storage mediums or programming operation
When, the operating time difference ordered is corresponded to, is denoted as the 3rd read access time Cr3 and the 3rd programming time of NAND Flash respectively
Cw3；That is Cr3 is Cr1 and the difference of Crmax2 values, and Cw3 is Cw1 and the difference of Cwmax2 values.
Step 7：The actual temperature range difference of solid state disk is obtained according to T2 and T3, is denoted as the first temperature gap of disc
T4；That is T4 is the size of T2-T3.
Step 8：According to T4 and Cr3, T4 and Cw3, the NAND caused by averagely each degree Celsius of temperature change is obtained
The changing value of flash storage medium command operation time, the 4th read cycle Cr4 and the 4th for being denoted as NAND Flash respectively are compiled
Journey cycle Cw4；
Step 9：If T1 is more than or equal to T2, starts to adjust solid state disk bandwidth, obtain the difference (T1-T2) of T1 and T2, and
This operation service type to NAND flash storage mediums is obtained, operation service type includes programming operation business and reading
Operation service.With reference to Cr4 and Cw4 respectively obtain NAND flash storage mediums reading or program command practical operation when
Between.When this is reading order, the actual operating time Cread of NAND flash storage mediums is met：
Cread=(T1-T2) * Cr4+Cr1
During this programming operation, the actual operating time Cwrite of NAND flash storage mediums is met：
Cwrite=(T1-T2) * Cw4+Cw1
If T1 is less than T2, stop adjustment solid state disk bandwidth, the at this time reading of NAND flash storage mediums or programming life
The operating time of order uses the basic operation time.To the actual operating time of the read operation of NAND flash storage mediums
Cread meets：
Cread=Cr1
The actual operating time Cwrite of the programming operation of NAND flash storage mediums is met：
Cwrite=Cw1
Fig. 5 shows that solid state disk according to embodiments of the present invention adjusts operating time flow in reading or programming operation
Figure, step include：
Step 1：The disc temperature of solid state disk is periodically obtained, is denoted as the first temperature of disc T1；
Step 2：The temperature initiation threshold of operating ambient temperature setting disc according to residing for disc, is denoted as the second temperature of disc
Spend T2；
Step 3：According to the technological temperature upper limit of solid state disk main control chip, design temperature allowance, and calculate solid state disk
The upper limit of disc temperature is denoted as the 3rd temperature T3 of disc；
Step 4：The basic operation time of reading or program command is obtained inside from NAND flash storage mediums, is remembered respectively
For the first read access time Cr1 and the first programming time Cw1 of NAND Flash；
Step 5：When the first temperature of disc T1 of solid state disk rises to the 3rd temperature T3 of disc, setting NAND Flash are deposited
The reading of storage media or the program command maximum operating time are denoted as the second read access time Crmax2 and the of NAND Flash respectively
Two programming time Cwmax2；
Step 6：According to Cr1 and Crmax2, Cw1 and Cwmax2 obtain the reading of NAND flash storage mediums or programming operation
When, the operating time difference ordered is corresponded to, is denoted as the 3rd read access time Cr3 and the 3rd programming time of NAND Flash respectively
Cw3；
Step 7：The actual temperature range difference of solid state disk is obtained according to T2 and T3, is denoted as the first temperature gap of disc
T4；
Step 8：According to T4 and Cr3, T4 and Cw3, the NAND caused by averagely each degree Celsius of temperature change is obtained
The changing value of flash storage medium command operation time, the 4th read cycle Cr4 and the 4th for being denoted as NAND Flash respectively are compiled
Journey cycle Cw4；
Step 9：If T1 is more than or equal to T2, starts to adjust solid state disk bandwidth, obtain the difference of T1 and T2, and obtain this
To the action type of NAND flash storage mediums, with reference to Cr4 and Cw4 respectively obtain NAND flash storage mediums reading or
The actual operating time of program command；When this is reading order, to the read operation time of NAND flash storage mediums
Cread meets：
Cread=(T1-T2) * Cr4+Cr1
During this programming operation, the actual program time Cwrite of NAND flash storage mediums is met：
Cwrite=(T1-T2) * Cw4+Cw1
If T1 is less than T2, stop adjustment solid state disk bandwidth, the at this time reading of NAND flash storage mediums or programming life
The operating time of order uses the basic operation time, to the actual operating time of the read operation of NAND flash storage mediums
Cread meets：
Cread=Cr1
The actual operating time Cwrite of the programming operation of NAND flash storage mediums is met：
Cwrite=Cw1.
Claims (10)
1. a kind of high-temperature protection method of solid state disk, which is characterized in that comprise the following steps：
Step 1：Temperature sensing circuit detects the disc temperature of solid state disk；
Step 2：Clocked flip temperature sensing circuit is set；
Step 3：The initial temperature threshold values of solid state disk is set；
Step 4：Start clocked flip task；
Step 5：The actual temperature information of timing acquisition solid state disk；
Step 6：By the actual temperature of solid state disk compared with the initial temperature threshold value set, the difference of the two is obtained；
Step 7：Difference between the actual temperature of foundation solid state disk and the initial temperature threshold values of setting adjusts the band of solid state disk
It is wide.
A kind of 2. high-temperature protection method of solid state disk as described in claim 1, which is characterized in that the setting clocked flip
Temperature sensing circuit, T1 interrupt cycle of the timing circuit including configuring solid state disk start timer, and all in units of T1
Trigger signal is sent to temperature sensing circuit to phase property.
3. a kind of high-temperature protection method of solid state disk as described in claim 1, which is characterized in that when the reality of solid state disk
When temperature reaches the temperature initiation threshold of setting, start to carry out data transmission solid state disk bandwidth limitation.
4. a kind of high-temperature protection method of solid state disk as described in claim 1, which is characterized in that the timed task can week
Trigger signal is sent to phase property to temperature sensing circuit, and obtains the actual temperature of the solid state disk of temperature sensing circuit feedback.
5. a kind of high-temperature protection method of solid state disk as described in claim 1, which is characterized in that by adjusting NAND
The data transfer bandwidth of Flash promotes or limits solid state disk bandwidth.
A kind of 6. high-temperature protection method of solid state disk as claimed in claim 6, which is characterized in that the adjustment NAND
The data transfer bandwidth of Flash, including to the concurrent number of channels of order and/or NAND Flash in NAND Flash controllers
The data throughput of interface is adjusted.
A kind of 7. high-temperature protection method of solid state disk as claimed in claim 6, which is characterized in that the adjustment NAND
The concurrent number of channels of order in Flash controllers, including：When the actual temperature of solid state disk is more than the initial temperature valve set
Value and, order concurrent number of channels in reduction NAND Flash controller higher than the disc temperature value of upper a cycle；When
The actual temperature of solid state disk is more than initial temperature threshold values and, increase NAND lower than the disc temperature value of upper a cycle
The concurrent number of channels of order in Flash controllers；When the actual temperature of solid state disk is less than initial temperature threshold values, recovery acquiescence
NAND Flash controllers in the concurrent number of channels of order.
A kind of 8. high-temperature protection method of solid state disk as claimed in claim 6, which is characterized in that the adjustment NAND
The data throughput of Flash interfaces, including：When the actual temperature of solid state disk is more than the initial temperature threshold values of setting and than upper one
The disc temperature value in a cycle is high, reduces the data throughput of NAND Flash interfaces；When the actual temperature of solid state disk is big
In initial temperature threshold values and, the data throughput of promotion NAND Flash interface lower than the disc temperature value of upper a cycle；
When solid state disk actual temperature be less than initial temperature threshold values, recover acquiescence NAND Flash data throughput.
A kind of 9. high-temperature protection method of solid state disk as claimed in claim 8, which is characterized in that the adjustment NAND
The data throughput of Flash interfaces is carried out using the operating time of the reading to NAND flash storage mediums or program command
Adjustment.
A kind of 10. high-temperature protection method of solid state disk as claimed in claim 9, which is characterized in that the adjustment NAND
The business operation time of flash storage medium includes：
Step 1：The disc temperature of solid state disk is periodically obtained, is denoted as the first temperature of disc T1；
Step 2：The temperature initiation threshold of operating ambient temperature setting disc according to residing for disc, is denoted as disc second temperature
T2；
Step 3：According to the technological temperature upper limit of solid state disk main control chip, design temperature allowance, and calculate solid state disk disc
The upper limit of temperature is denoted as the 3rd temperature T3 of disc；
Step 4：The basic operation time of reading or program command is obtained inside from NAND flash storage mediums, is denoted as respectively
The the first read access time Cr1 and the first programming time Cw1 of NAND Flash；
Step 5：When the first temperature of disc T1 of solid state disk rises to the 3rd temperature T3 of disc, setting NAND Flash storages are situated between
The reading of matter or program command maximum operating time, the second read access time Crmax2 and second for being denoted as NAND Flash respectively are compiled
Journey time Cwmax2；
Step 6：According to Cr1 and Crmax2, when Cw1 and Cwmax2 obtain the reading of NAND flash storage mediums or programming operation,
The operating time difference of corresponding order is denoted as the 3rd read access time Cr3 and the 3rd programming time Cw3 of NAND Flash respectively；
Step 7：The actual temperature range difference of solid state disk is obtained according to T2 and T3, is denoted as the first temperature gap of disc T4；
Step 8：According to T4 and Cr3, T4 and Cw3, the NAND Flash caused by averagely each degree Celsius of temperature change are obtained
The changing value of storage media command operating time is denoted as the programming weeks of the 4th read cycle Cr4 and the 4th of NAND Flash respectively
Phase Cw4；
Step 9：If T1 is more than or equal to T2, starts to adjust solid state disk bandwidth, obtain the difference of T1 and T2, and it is right to obtain this
The action type of NAND flash storage mediums respectively obtains reading or the volume of NAND flash storage mediums with reference to Cr4 and Cw4
The actual operating time of journey order；When this is reading order, to the read operation time Cread of NAND flash storage mediums
Meet：
Cread=(T1-T2) * Cr4+Cr1；
During this programming operation, the actual program time Cwrite of NAND flash storage mediums is met：
Cwrite=(T1-T2) * Cw4+Cw1；
If T1 is less than T2, stop adjustment solid state disk bandwidth, the reading of NAND flash storage mediums at this time or program command
Operating time uses the basic operation time, and the actual operating time Cread of the read operation of NAND flash storage mediums is expired
Foot：
Cread=Cr1；
The actual operating time Cwrite of the programming operation of NAND flash storage mediums is met：
Cwrite=Cw1.
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| CN201711420007.9A CN108052292A (en) | 2017-12-25 | 2017-12-25 | A kind of high-temperature protection method of solid state disk |
| US16/216,886 US11010063B2 (en) | 2017-12-25 | 2018-12-11 | High-temperature protection method for solid state drive and implementation device thereof |
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