CN108051720A - The test circuit and test method of paralleling MOS FET inverter modules - Google Patents
The test circuit and test method of paralleling MOS FET inverter modules Download PDFInfo
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- CN108051720A CN108051720A CN201711288460.9A CN201711288460A CN108051720A CN 108051720 A CN108051720 A CN 108051720A CN 201711288460 A CN201711288460 A CN 201711288460A CN 108051720 A CN108051720 A CN 108051720A
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- 238000012360 testing method Methods 0.000 title claims abstract description 49
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- 230000000694 effects Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 238000000034 method Methods 0.000 description 2
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- 241000208340 Araliaceae Species 0.000 description 1
- 235000005035 Panax pseudoginseng ssp. pseudoginseng Nutrition 0.000 description 1
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Classifications
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
Abstract
The purpose of the present invention is to propose to a kind of test circuit and test method of paralleling MOS FET inverter modules, for testing the functionality of paralleling MOS FET inverter modules and searching corresponding hidden danger.The test circuit of the paralleling MOS FET inverter modules of the present invention occurs circuit by inverter module to be measured, load circuit, main power source, accessory power supply and pwm signal and forms;The output terminal that circuit occurs for pwm signal is connected with the input terminal of inverter module to be measured, and the both ends of main power source are connected with the power end of inverter module to be measured, ground terminal and form closed circuit respectively;The load circuit is made of regulation resistance, load inductance, load resistance and load capacitance, wherein regulation resistance, which is serially connected with, surveys between the power end and main power source of inverter module, the series circuit that load inductance and load resistance are formed is serially connected between output terminal and the ground terminal of inverter module to be measured, and load capacitance is in parallel with main power source;Positive-negative power pin of the positive and negative end of accessory power supply respectively with driving chip in inverter module to be measured is connected.
Description
Technical field
The present invention relates to a kind of test of inverter module, more particularly, to a kind of parallel connection of electric machine controller for motor vehicle
The test circuit and test method of MOSFET inverter modules.
Background technology
In recent years, as Global Oil resource day is becoming tight and environmental pollution is on the rise, the new energy of green energy conservation is developed
The cry of source automobile is higher and higher.The new energy vehicle that electric vehicle conduct is wherein with fastest developing speed and technology is most ripe, gradually
It is in the sight of people.The dynamical system of electric car is different from engine, the gearbox of orthodox car, it mainly includes electricity
Pond, motor and electric machine controller.
The high power contravariant module of electric machine controller is its core component, not only plays important work in controller work
With, while itself is also costly and fragile, as long as there is the situation more than working limit condition(As overcurrent, overvoltage or
Long-time hot operation), expendable damage can all be caused even to burn to power module.Inverter module mainly includes two kinds
Power device:One kind is insulated gate bipolar transistor(IGBT, Insulated Gate Bipolar Transistor), it is main
High-pressure system is used for, suitable for Large-power High-Speed electric car;Another kind is Metal-Oxide Semiconductor field-effect transistor
(MOSFET, Metal-Oxide-Semiconductor Field-Effect Transistor), it is mainly used for low-pressure system,
Suitable for small-power low-speed electronic vehicle, due to this feature of the positive temperature coefficient of MOSFET conducting resistances, and MOSFET is separated
Price is relatively relatively inexpensive, and parallel connection separation MOSFET, which forms a powerful module, becomes the side that more and more designers use
Method.
Although separation MOSFET parallel connections have many good qualities, since electronic device is more after parallel connection, welding procedure is difficult to really
The reliable of all MOSFET is protected, the actual use situation that can not confirm the module after parallel connection is a comparison stubborn problem.Such as
The real work power of what testing power module and passable safe current size, while can ensure work(to the greatest extent again
Rate module it is intact, it is necessary to design a kind of dedicated test circuit and test method.
The content of the invention
The purpose of the present invention is to propose to a kind of test circuit and test method of paralleling MOS FET inverter modules, for surveying
It tries the functionality of paralleling MOS FET inverter modules and searches corresponding hidden danger.
The test circuit of the paralleling MOS FET inverter modules of the present invention is by inverter module to be measured, load circuit, main power source, auxiliary
Help power supply and pwm signal that circuit composition occurs;The inverter module to be measured is made of driving chip, two MOSFET pipes, wherein
The source electrode of first MOSFET pipes is connected with the drain electrode of the 2nd MOSFET pipes, and driving chip tool connects respectively there are two output terminal
To the grid of two MOSFET pipes, the driving chip receives the pwm signal that circuit occurs for pwm signal, and to two MOSFET
The grid of pipe sends the PWM drive signal of opposite in phase;Power end of the source electrode of first MOSFET pipes as inverter module to be measured,
Ground terminal of the drain electrode as inverter module to be measured of 2nd MOSFET pipes passes through two between the source electrode of two MOSFET pipes and drain electrode
Pole pipe connects, and the conducting direction of diode is by source electrode to drain electrode;The input terminal of the driving chip is as inverter module to be measured
Input terminal, the output terminal of the contact of the drain electrode of the source electrode and the 2nd MOSFET pipes of the first MOSFET pipes as inverter module to be measured;
The output terminal that circuit occurs for pwm signal is connected with the input terminal of inverter module to be measured, the both ends of main power source respectively with inversion to be measured
The power end of module, ground terminal connect and form closed circuit;The load circuit is by regulation resistance, load inductance, load resistance
And load capacitance is formed, wherein regulation resistance, which is serially connected with, surveys between the power end and main power source of inverter module, and load inductance is with bearing
It carries the series circuit that resistance is formed to be serially connected between output terminal and the ground terminal of inverter module to be measured, load capacitance and main power source are simultaneously
Connection;Positive-negative power pin of the positive and negative end of accessory power supply respectively with driving chip in inverter module to be measured is connected.
The effect of above-mentioned accessory power supply is powered to driving chip, so that driving chip can export after pwm signal is received
Corresponding PWM drive signal is managed to two MOSFET, so as to control the switch motion of MOSFET pipes.Specifically, driving chip
The signal of output is the pwm signal of two opposite in phase, when corresponding to the high level of PWM, MOSFET pipes conducting, when corresponding to
During the low level of PWM, the shut-off of MOSFET pipes because the current drive capability of driving chip is larger, quickly can control MOSFET to manage
Turn-on and turn-off.
Further, for convenience of testing, the regulation resistance is the rheostat of adjustable resistance value;The power supply is output voltage
And the adjustable regulated power supply of output current;It is adjustable that the pwm signal duty cycle that circuit is exported occurs for the pwm signal.
Paralleling MOS FET inverter modules are tested using above-mentioned test circuit, including short-circuit test, rosin joint and element
Defect test, load capacity test, wherein:
The short-circuit test is as follows:It is powered using accessory power supply for inverter module to be measured, while monitors auxiliary electricity
Whether ource electric current stops to test, reason is investigated, if accessory power supply electric current is in preset range beyond preset range if if
It is interior, then measure each foot voltage of the driving chip in inverter module to be measured, whether extremely, and using pwm signal electricity occurs for electric current
Road direction inverter module output pwm signal to be measured, it is whether abnormal with the input and output of oscillograph observation driving chip;If drive core
Two output end voltages of piece are pulled low, then illustrate that corresponding MOSFET pipes are abnormal, if the voltage quilt of the power pins of driving chip
It drags down or electric current is bigger than normal work, then illustrate that driving chip and/or MOSFET pipes are abnormal;It is managed in driving chip and MOSFET
In the case of working normally, pwm signal is disconnected, then gradually increases the voltage of main power source, monitors the output current of main power source, if
The output current of main power source is not zero at this time, then illustrates that there are short-circuit conditions for the inverter module to be measured.
Rosin joint and component defects test are as follows:The output voltage of main power source is adjusted to zero volt, and is disconnected negative
Resistance is carried, circuit occurs to inverter module output pwm signal to be measured using pwm signal, inverter module to be measured is observed with oscillograph
Output terminal waveform, and quality is out of question with reference to the defeated of inverter module with having determined that under similary test condition by the waveform
Outlet waveform compares, and the amplitude differences of two waveforms then illustrates inverter module to be measured, and there are rosin joint or defective elements.
Load capacity test is as follows:It closes main power source, accessory power supply and pwm signal and circuit occurs, then
The resistance value of regulation resistance is set to zero into Europe, pwm signal is then turned on and circuit occurs, and adjusts the output letter that circuit occurs for pwm signal
Number duty cycle, to ensure that the two of inverter module to be measured MOSFET can be turned in turn;Startup accessory power supply is inversion to be measured
Module for power supply, the waveform of the output terminal of inverter module to be measured is observed with oscillograph, while gradually rises the output voltage of main power source,
Until the waveforms amplitude of the output terminal of inverter module to be measured no longer raises, the output voltage of main power source at this time is kept, then will
The duty cycle of pwm signal is gradually turned down, until the output current of main power source is 1A;The output voltage of main power source is raised again to actually
Then operating voltage gradually increases pwm signal duty cycle again, by the output voltage waveforms of inverter module to be measured and similary test-strips
The quality output voltage waveforms out of question with reference to inverter module compare having determined that under part, if waveform is consistent, judge
Tested module is normal, judges that inverter module to be measured is abnormal if inconsistent.
The paralleling MOS FET inverter modules of the present invention test circuit is simple, test method is reliable, can be adapted for half-bridge,
The test of three-phase and full-bridge circuit with the functionality of certification paralleling MOS FET inverter modules and searches hidden danger that may be present.
Description of the drawings
Fig. 1 is the test circuit schematic diagram of the paralleling MOS FET inverter modules of the present invention.
Specific embodiment
Below against attached drawing, by the description to embodiment, each component for example involved to the specific embodiment of the present invention
The works such as shape, construction, the mutual alignment and connection relation between each several part, the effect of each several part and operation principle it is further
It is described in detail.
Embodiment 1:
As shown in the figure, the inverter module to be measured of the present embodiment by inverter module to be measured, load circuit, main power source, accessory power supply and
Circuit composition occurs for pwm signal;The inverter module to be measured is made of driving chip, two MOSFET pipes, wherein first
The source electrode of MOSFET pipes is connected with the drain electrode of the 2nd MOSFET pipes, and driving chip tool is respectively connected to two there are two output terminal
The grid of a MOSFET pipes, the driving chip receive the pwm signal that circuit occurs for pwm signal, and to two MOSFET pipes
Grid sends the PWM drive signal of opposite in phase;Power end of the source electrode of first MOSFET pipes as inverter module to be measured, second
Ground terminal of the drain electrode as inverter module to be measured of MOSFET pipes passes through diode between the source electrode of two MOSFET pipes and drain electrode
Connection, the conducting direction of diode is by source electrode to drain electrode;Input of the input terminal of the driving chip as inverter module to be measured
End, the output terminal of the contact of the drain electrode of the source electrode and the 2nd MOSFET pipes of the first MOSFET pipes as inverter module to be measured;PWM believes
The output terminal that circuit number occurs is connected with the input terminal of inverter module to be measured, the both ends of main power source respectively with inverter module to be measured
Power end, ground terminal connect and form closed circuit;The load circuit is by regulation resistance, load inductance, load resistance and load
Capacitance is formed, and wherein regulation resistance, which is serially connected with, surveys between the power end and main power source of inverter module, load inductance and load resistance
The series circuit formed is serially connected between output terminal and the ground terminal of inverter module to be measured, and load capacitance is in parallel with main power source;It is auxiliary
Positive-negative power pin of the positive and negative end of power supply respectively with driving chip in inverter module to be measured is helped to be connected.
For convenience of test, in the present embodiment, regulation resistance Rft is the rheostat of adjustable resistance value;The power supply is output
Voltage and the adjustable regulated power supply of output current;The pwm signal duty cycle that the pwm signal generation circuit is exported is adjustable,
Specific that hardware circuit overlap joint or signal generator can be used, details are not described herein again.
Paralleling MOS FET inverter modules are tested using above-mentioned test circuit, including short-circuit test, rosin joint and element
Defect test, load capacity test, wherein:
The short-circuit test is as follows:It is powered using accessory power supply for inverter module to be measured, while monitors auxiliary electricity
Whether ource electric current stops to test, reason is investigated, if accessory power supply electric current is in preset range beyond preset range if if
Interior, then whether abnormal, if two output terminals of driving chip if measuring each foot voltage, the electric current of driving chip in inverter module to be measured
Voltage is pulled low, then illustrates that corresponding MOSFET pipes are abnormal, if the voltage of the power pins of driving chip is pulled low or electric current ratio
What is worked normally is big, then illustrates that driving chip and/or MOSFET pipes are abnormal;Circuit occurs to inversion mould to be measured using pwm signal
Block output pwm signal, it is whether abnormal with the input and output of oscillograph observation driving chip;If two output terminal electricity of driving chip
Pressure is pulled low, then illustrates that corresponding MOSFET pipes are abnormal, if the voltage of the power pins of driving chip be pulled low or electric current ratio just
What is often worked is big, then illustrates that driving chip and/or MOSFET pipes are abnormal;In the feelings that driving chip and MOSFET pipes work normally
Under condition, pwm signal is disconnected, then gradually increases the voltage of main power source, monitors the output current of main power source, if main power source at this time is defeated
Go out electric current to be not zero, then illustrate that there are short-circuit conditions for the inverter module to be measured.
Rosin joint and component defects test are as follows:The output voltage of main power source is adjusted to zero volt, and is disconnected negative
Carry resistance, circuit occur to inverter module output pwm signal to be measured using pwm signal, at the same using pwm signal occur circuit to
It has determined that quality reference inverter module out of question exports same pwm signal, inverter module to be measured and ginseng is observed with oscillograph
The waveform of the output terminal of inverter module is examined, and the output terminal waveform of two inverter modules is compared, the amplitude of two waveforms is not
It is same then illustrate inverter module to be measured there are rosin joint or defective elements.
Load capacity test is as follows:It closes main power source, accessory power supply and pwm signal and circuit occurs, then
The resistance value of regulation resistance is set to zero into Europe, pwm signal is then turned on and circuit occurs, and adjusts the output letter that circuit occurs for pwm signal
Number duty cycle, to ensure that the two of inverter module to be measured MOSFET can be turned in turn;Startup accessory power supply is inversion to be measured
Module for power supply, the waveform of the output terminal of inverter module to be measured is observed with oscillograph, while gradually rises the output voltage of main power source,
Until the waveforms amplitude of the output terminal of inverter module to be measured no longer raises, the output voltage of main power source at this time is kept, then will
The duty cycle of pwm signal is gradually turned down, until the output current of main power source is 1A;The output voltage of main power source is raised again to actually
Then operating voltage gradually increases pwm signal duty cycle again, by the output voltage waveforms of inverter module to be measured and similary test-strips
The quality output voltage waveforms out of question with reference to inverter module compare having determined that under part, if waveform is consistent, judge
Tested module is normal, judges that inverter module to be measured is abnormal if inconsistent.
Above-mentioned test is based on half-bridge circuit, but three-phase and full-bridge circuit are considered as three or two half-bridges, point
It does not test;Confirming that each half-bridge is normal, by three-phase or full-bridge simulation real fashion work, checking noise, heat
Deng to the interference between bridge and influencing each other, it can be said that the step of half-bridge, full-bridge, three phase bridge circuit totality is consistent,
On the basis of the present embodiment, the dependence test of full-bridge, three phase bridge circuit can be completed in technical staff.
Claims (7)
1. a kind of test circuit of paralleling MOS FET inverter modules, it is characterised in that by inverter module to be measured, load circuit, main electricity
Circuit composition occurs for source, accessory power supply and pwm signal;The inverter module to be measured is made of driving chip, two MOSFET pipes,
The source electrode of wherein the first MOSFET pipes is connected with the drain electrode of the 2nd MOSFET pipes, and driving chip has there are two output terminal, and respectively
The grid of two MOSFET pipes is connected to, the driving chip receives the pwm signal that circuit occurs for pwm signal, and to two
The grid of MOSFET pipes sends the PWM drive signal of opposite in phase;The source electrode of first MOSFET pipes is as inverter module to be measured
Power end, ground terminal of the drain electrode as inverter module to be measured of the 2nd MOSFET pipes, between the source electrode of two MOSFET pipes and drain electrode
It is connected by diode, the conducting direction of diode is by source electrode to drain electrode;The input terminal of the driving chip is as to be measured inverse
Become the input terminal of module, the contact of the drain electrode of the source electrode and the 2nd MOSFET pipes of the first MOSFET pipes is as inverter module to be measured
Output terminal;The output terminal that circuit occurs for pwm signal is connected with the input terminal of inverter module to be measured, and the both ends of main power source are respectively with treating
Survey the power end of inverter module, ground terminal connects and forms closed circuit;The load circuit is by regulation resistance, load inductance, negative
It carries resistance and load capacitance is formed, wherein regulation resistance, which is serially connected with, surveys between the power end and main power source of inverter module, load electricity
The series circuit that sense and load resistance are formed is serially connected between output terminal and the ground terminal of inverter module to be measured, load capacitance and master
Power sources in parallel;Positive-negative power pin of the positive and negative end of accessory power supply respectively with driving chip in inverter module to be measured is connected
It connects.
2. the test circuit of paralleling MOS FET inverter modules according to claim 1, it is characterised in that the regulation resistance
It is the rheostat of adjustable resistance value.
3. the test circuit of paralleling MOS FET inverter modules according to claim 1, it is characterised in that the power supply is defeated
Go out the adjustable regulated power supply of voltage and output current.
4. the test circuit of paralleling MOS FET inverter modules according to claim 1, it is characterised in that the pwm signal hair
The pwm signal duty cycle that raw circuit is exported is adjustable.
5. a kind of test method of paralleling MOS FET inverter modules using test circuit described in claim 1, is surveyed including short circuit
Examination, rosin joint and component defects test, load capacity test, it is characterised in that the short-circuit test is as follows:It utilizes
Accessory power supply is powered for inverter module to be measured, while whether monitors accessory power supply electric current beyond preset range, is stopped if if
Reason is investigated in test, if accessory power supply electric current is in preset range, measures each of driving chip in inverter module to be measured
Whether foot voltage, electric current are abnormal, and circuit occurs to inverter module output pwm signal to be measured using pwm signal, are seen with oscillograph
Whether input and the output for examining driving chip are abnormal;If two output end voltages of driving chip are pulled low, illustrate corresponding
MOSFET pipes are abnormal, if the voltage of the power pins of driving chip is pulled low or electric current is bigger than normal work, illustrate to drive
Chip and/or MOSFET pipes are abnormal;In the case where driving chip and MOSFET pipes work normally, disconnection pwm signal, then by
Cumulative plus main power source voltage, monitors the output current of main power source, if the output current of main power source is not zero at this time, illustrates this
There are short-circuit conditions for inverter module to be measured.
6. the test method of paralleling MOS FET inverter modules according to claim 5, it is characterised in that the rosin joint and member
Part defect test is as follows:The output voltage of main power source is adjusted to zero volt, and disconnecting consumers resistance, is believed using PWM
Number circuit occurs to inverter module output pwm signal to be measured, the waveform of the output terminal of inverter module to be measured is observed with oscillograph, and
By the waveform, the quality output terminal waveform out of question with reference to inverter module compares with having determined that under similary test condition, and two
The amplitude difference of a waveform then illustrates inverter module to be measured, and there are rosin joint or defective elements.
7. the test method of paralleling MOS FET inverter modules according to claim 5, it is characterised in that the load capacity
Test is as follows:It closes main power source, accessory power supply and pwm signal and circuit occurs, then by the resistance value of regulation resistance
Europe is set to zero, pwm signal is then turned on and circuit occurs, and adjusts the duty cycle that the output signal of circuit occurs for pwm signal, to ensure
Two MOSFET of inverter module to be measured can be turned in turn;Start accessory power supply to power for inverter module to be measured, use oscillograph
The waveform of the output terminal of inverter module to be measured is observed, while gradually rises the output voltage of main power source, until inverter module to be measured
The waveforms amplitude of output terminal no longer raise, keep the output voltage of main power source at this time, then by the duty cycle of pwm signal by
It gradually turns down, until the output current of main power source is 1A;The output voltage of main power source is raised again to real work voltage, then again by
Cumulative plus pwm signal duty cycle will have determined that quality under the output voltage waveforms of inverter module to be measured and similary test condition
The output voltage waveforms of reference inverter module out of question compare, if waveform is consistent, judge that tested module is normal, if
It is inconsistent, judge that inverter module to be measured is abnormal.
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CN110556788A (en) * | 2019-08-21 | 2019-12-10 | 苏州浪潮智能科技有限公司 | Protection method of synchronous buck conversion circuit and novel synchronous buck conversion circuit |
CN113189466A (en) * | 2019-08-26 | 2021-07-30 | 上海禾赛科技有限公司 | Breakdown voltage testing of photodiodes |
CN113759275A (en) * | 2020-05-29 | 2021-12-07 | 圣邦微电子(北京)股份有限公司 | Testing device and testing method for power output short circuit |
CN114325285A (en) * | 2021-12-31 | 2022-04-12 | 浙江大学杭州国际科创中心 | SiC MOSFET (metal oxide semiconductor field effect transistor) repeated short circuit test method with adjustable gate voltage structure |
CN115656770A (en) * | 2022-10-19 | 2023-01-31 | 杭州国磊半导体设备有限公司 | Method and device for testing power driving chip, computer equipment and storage medium |
CN115656770B (en) * | 2022-10-19 | 2023-09-01 | 杭州国磊半导体设备有限公司 | Power supply driving chip testing method and device, computer equipment and storage medium |
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