CN108011637A - A kind of flowing water type analog-to-digital converter of Op-amp sharing - Google Patents
A kind of flowing water type analog-to-digital converter of Op-amp sharing Download PDFInfo
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- CN108011637A CN108011637A CN201711213046.1A CN201711213046A CN108011637A CN 108011637 A CN108011637 A CN 108011637A CN 201711213046 A CN201711213046 A CN 201711213046A CN 108011637 A CN108011637 A CN 108011637A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/1205—Multiplexed conversion systems
- H03M1/122—Shared using a single converter or a part thereof for multiple channels, e.g. a residue amplifier for multiple stages
Abstract
The present invention provides a kind of flowing water type analog-to-digital converter of Op-amp sharing, belong to pipelined digital-to-analog converter technical field.It solves in the prior art the problem of operational amplifier quantity is more, serious waste of resources.The flowing water type analog-to-digital converter of this Op-amp sharing, including sequence generation module and the sequentially connected level circuit of some levels, each level circuit includes analog-digital converter subADC, digital analog converter subDAC and sample circuit, operational amplifier OP is equipped between two neighboring level circuit, previous stage sample circuit and when prime sample circuit respectively sequence generation module produce opposite timing rhohase be connected and work with operational amplifier OP, previous stage level circuit connects to form previous stage sampling hold circuit with operational amplifier OP, to be formed when prime level circuit is connected with operational amplifier OP when prime sampling hold circuit.The flowing water type analog-digital converter structure of this Op-amp sharing is simple, and design is reasonable, and operational amplifier is fully used, and the wasting of resources is few, and heat dissipation is few.
Description
Technical field
The invention belongs to the flowing water type analog-to-digital conversion of pipelined digital-to-analog converter technical field, particularly a kind of Op-amp sharing
Device.
Background technology
Analog-to-digital conversion module, also known as A/D converter or Analog-to-digital Converter, abbreviation ADC, it is
The device that continuous analog-signal transitions are discrete digital signal.Flowing water working method inspires in by digital display circuit, someone
The concept of pipeline ADC is proposed, in the concept, multiple ADC use flowing water working method, and this mode sees class on the whole
It is similar to serially, single pair has from the point of view of the conversion of each step and belongs to parallel, its conversion speed is fast, it is possible to achieve very high conversion frequency,
It is a kind of structure that can realize at a high speed but also realize suitable resolution ratio, is widely used in electronic system, while to performance
It is it is required that also higher and higher.
Conventional pipeline ADC structures as shown in Figure 1, it to include the sampling hold circuit of front end, some levels intimate
Level circuit, with for register circuit, digital circuit for rectifying, voltage reference generation circuit, timing sequence generating circuit, wherein each level is electric
The circuit structure on road is as shown in Fig. 2, including sampling and keep module, sub- ADC, sub- DAC, subtraction block, gain module.Each level electricity
The operation principle on road：Sampling hold circuit samples the analog signal of input first, and then input signal is quantified as by a sub- ADC
Ki data outputs, this transformation result constitute the quantization output of this level-one, then convert thereof into analog signal by sub- DAC,
Subtract each other to obtain residual signal with the input signal of holding again.In order to allow next stage to use identical datum, surplus letter
Number needing could be as the input signal of next stage after accurate 2ki times of amplification.Its neutron DAC, subtraction block and gain module structure
Into residue-gain-circuit, which has：1st, subtraction function.The value is subtracted with the analog output value of previous stage through sub- ADC to quantify
Again into the analogue value after sub- DAC conversion to obtain surplus.2nd, gain function.In order to make every grade of energy use same reference voltage
Source will be multiplied by every grade of surplus one suitable factor.3rd, sampling keeps function.The residue-gain-circuit during work of level circuit
Sequential as shown in figure 3, φ 1 and φ 2 control respectively residue-gain-circuit be operated in sampling and amplification two states.Work as circuit
When being operated in sample states, the amplifier in circuit is in idle state；When circuit is in magnifying state, at the amplifier in circuit
In working status.As the above analysis, when the level circuit of pipeline ADC is operated in sampling configuration, amplifier is left unused；It is operated in guarantor
When holding pattern, amplifier work；And in pipeline organization, adjacent two-stage level circuit is operated in sampling and keeps both not respectively
Under same working status, the amplifier in circuit is so caused to have half the time to be in idle state, amplifier utilization rate is low, resource is unrestrained
Take serious.
The content of the invention
The purpose of the present invention is for existing technology, there are the above problem, it is proposed that a kind of flowing water pattern of Op-amp sharing
Number converter, the flowing water type analog-to-digital converter of the Op-amp sharing can reduce the quantity of amplifier in pipeline ADC, greatly improve fortune
The utilization rate put.
The purpose of the present invention can be realized by following technical proposal：A kind of flowing water type analog-to-digital converter of Op-amp sharing,
Including sequence generation module and the sequentially connected level circuit of some levels, it is characterised in that each level circuit includes analog-to-digital conversion
Device subADC, digital analog converter subDAC and sample circuit, operational amplifier OP is equipped between two neighboring level circuit, described
Previous stage sample circuit and when prime sample circuit respectively sequence generation module produce opposite timing rhohase put with computing
Big device OP is connected and worked, and the previous stage level circuit connects to form previous stage sampling hold circuit with operational amplifier OP,
It is described when prime level circuit connects to be formed when prime sampling hold circuit with operational amplifier OP.
In a kind of flowing water type analog-to-digital converter of above-mentioned Op-amp sharing, the previous stage sampling hold circuit includes
Previous stage input signal Vk-1, switch S11, switch S12, switch S13, switch S14, switch S15, capacitance Cfk-1With capacitance CSk-1；
The prime sampling hold circuit of working as includes switch S21, switch S22, switchs S23, switchs S24, switch S25, capacitance CfkWith
Capacitance CSk；Sequence generation module produces the clock signal φ 1 and clock signal φ 2 with 1 opposite in phase of clock signal φ；It is described
Previous stage sampling hold circuit when clock signal φ 1 is high level with previous stage analog-digital converter SubADCk-1, previous stage
Analog-digital converter SubADCk-1And operational amplifier OP connections enter sampling operation state, while work as prime sampling hold circuit
Into holding working status；It is described when prime sampling hold circuit when clock signal φ 2 is high level with working as prime modulus
Converter SubADCk, enter sampling operation state as prime analog-digital converter SubADC and operational amplifier OP connections, at the same time
Previous stage sampling hold circuit, which enters, keeps working status.
In a kind of flowing water type analog-to-digital converter of above-mentioned Op-amp sharing, the previous stage input signal Vk-1Respectively
Connect previous stage analog-digital converter SubADCk-1First end, switch S11 first end and switch S12 first end；Described
Previous stage analog-digital converter SubADCk-1Second end connection previous stage digital analog converter SubDACk-1First end；Switch S11
Second end difference connecting valve S22 first ends, capacitance Cfk-1First end；Switch the second end difference connecting valve S21 of S12
First end and capacitance Csk-1First end；The second end connection previous stage digital analog converter SubDAC of the switch S21k-1
Second end；The capacitance Csk-1The first end of second end difference connecting valve S13 and the first end of switch S23；It is described
Switch S13 second end ground connection；The second end of the switch S23 connects the reverse input end of operational amplifier OP and opens respectively
Close the first end of S14；The second end of the switch S14 meets the first end of switch S25, capacitance Cf respectivelykFirst end and electricity
Hold CskFirst end；The second end ground connection of the switch S25；The output terminal of the operational amplifier OP connects switch respectively
The second end of S22, the first end for switching S24, as prime analog-digital converter SubADCkFirst end and capacitance CfkSecond end；
Described works as prime analog-digital converter SubADCkThe second current level digital analog converter SubDAC of terminationkFirst end；Described
The second end of switch S24 meets capacitance Cs respectivelykSecond end, switch S15 first end；The second termination of the switch S15
Current level digital analog converter SubDACkSecond end.
In a kind of flowing water type analog-to-digital converter of above-mentioned Op-amp sharing, 1 controlling switches of clock signal φ
S11, switch S12, switch S13, switch S14 and the cut-off/close for switching S15, the 2 controlling switch S21 of clock signal φ,
Switch S22, switch S23, switch S24 and the cut-off/close for switching S25；When φ 1 puts high, switch S11, switch S12, switch
S13, switch S14 and switch S15 closures, switch S21, switch S22, switch S23, switch S24 and switch S25 are disconnected, capacitance
Cfk-1With capacitance Csk-1Complete previous stage input signal Vk-1Sampling；When φ 2 puts high, switch S11, switch S12, switch
S13, switch S14 and switch S15 are disconnected, switch S21, switch S22, switch S23, switch S24 and switch S25 closures, capacitance Cfk
With capacitance CskPrime input signal V is worked as in completionkSampling.
In a kind of flowing water type analog-to-digital converter of above-mentioned Op-amp sharing, the current level digital analog converter
SubDACkTo as prime input signal V while φ 2 puts highkChange simultaneously output digit signals Dk。
Compared with prior art, the present invention by redesign circuit result by previous stage level circuit and rear class level circuit into
Row organically combines, by clock signal control different switches realize to the operational amplifier OP between adjacent two-stage level circuit into
Row is shared, the total number of operational amplifier in circuit is reduced half, so as to greatly reduce the power consumption and area of circuit.
Brief description of the drawings
Fig. 1 is the circuit diagram of the adjacent two-stage level circuit shared operational amplifier OP of the present invention.
Fig. 2 is the equivalent circuit diagram when clock signal φ 1 puts high.
Fig. 3 makes the equivalent circuit diagram when clock signal φ 2 puts high.
Embodiment
It is the specific embodiment of the present invention and with reference to attached drawing below, technical scheme is further described,
But the present invention is not limited to these embodiments.
As shown in Figure 1, when the serial number k of prime level circuit, previous stage level circuit sequence number phase defined in the embodiment of the present invention
Answer for k-1, the corresponding serial number k+1 of rear stage level circuit, the numbering of corresponding each component is as follows：Previous stage analog-to-digital conversion
Device SubADCk-1, as prime analog-digital converter SubADCk, rear stage analog-digital converter SubADCk+1, previous stage digital analog converter
SubDACk-1, current level digital analog converter SubDACk, rear stage digital analog converter SubDACk+1, electricity in previous stage level circuit
Hold Cfk-1With capacitance Csk-1；Capacitance Cf in rear stage level circuitkWith capacitance Csk。
The flowing water type analog-to-digital converter of this Op-amp sharing includes sequence generation module and the sequentially connected level circuit of some levels,
Wherein each level circuit includes analog-digital converter subADC, digital analog converter subDAC and sample circuit, two neighboring level electricity
Operational amplifier OP is equipped between road.Previous stage sample circuit and when prime sample circuit respectively sequence generation module produce
Opposite timing rhohase is connected and works with operational amplifier OP, previous stage level circuit connected with operational amplifier OP to be formed it is previous
Level sampling hold circuit, to form when prime sampling hold circuit when prime level circuit is connected with operational amplifier OP.
Specifically, previous stage sampling hold circuit includes previous stage input signal Vk-1, switch S11, switch S12, switch
S13, switch S14, switch S15, capacitance Cfk-1With capacitance CSk-1；When prime sampling hold circuit include switch S21, switch S22,
Switch S23, switch S24, switch S25, capacitance CfkWith capacitance CSk；Sequence generation module produces clock signal φ 1 and believes with sequential
The clock signal φ 2 of number 1 opposite in phase of φ.Previous stage input signal Vk-1Previous stage analog-digital converter SubADC is connected respectivelyk-1
First end, switch S11 first end and switch S12 first end；Previous stage analog-digital converter SubADCk-1Second end connect
Meet previous stage digital analog converter SubDACk-1First end；Switch second end difference connecting valve S22 first ends, the capacitance of S11
Cfk-1First end；Switch the first end and capacitance Cs of the second end difference connecting valve S21 of S12k-1First end；Switch S21
Second end connection previous stage digital analog converter SubDACk-1Second end；Capacitance Csk-1Second end difference connecting valve S13
First end and switch S23 first end；Switch the second end ground connection of S13；The second end of switch S23 connects operational amplifier respectively
The reverse input end of OP and the first end of switch S14；The second end of switch S14 meets the first end of switch S25, capacitance Cf respectivelyk
First end and capacitance CskFirst end；Switch the second end ground connection of S25；The output terminal of operational amplifier OP connects switch respectively
The second end of S22, the first end for switching S24, as prime analog-digital converter SubADCkFirst end and capacitance CfkSecond end；
As prime analog-digital converter SubADCkThe second current level digital analog converter SubDAC of terminationkFirst end；Switch the second of S24
End meets capacitance Cs respectivelykSecond end, switch S15 first end；Switch the second current level digital analog converter of termination of S15
SubDACkSecond end.1 controlling switch S11 of clock signal φ, switch S12, switch S13, switch S14 and switch the disconnected of S15
Opening/closing conjunction, 2 controlling switch S21 of clock signal φ, switch S22, switch S23, switch S24 and the cut-off/close for switching S25.
As shown in Fig. 2, previous stage sampling hold circuit when clock signal φ 1 is high level with previous stage analog-digital converter
SubADCk-1, previous stage analog-digital converter SubADCk-1And operational amplifier OP connections enter sampling operation state.Specially：
Switch S11, switch S12, switch S13, switch S14 and switch S15 closures, switch S21, switch S22, switch S23, switch S24
Disconnected with switch S25, capacitance Cfk-1With capacitance Csk-1Complete previous stage input signal Vk-1Sampling；
As shown in figure 3, when prime sampling hold circuit when clock signal φ 2 is high level and works as prime analog-digital converter
SubADCk, as prime analog-digital converter SubADCkAnd operational amplifier OP connections enter sampling operation state, while previous stage
Sampling hold circuit, which enters, keeps working status.Specially：When φ 2 puts high, switch S11, switch S12, switch S13, switch
S14 and switch S15 are disconnected, switch S21, switch S22, switch S23, switch S24 and switch S25 closures, previous stage analog-to-digital conversion
Device SubADCk-1To previous stage input signal Vk-1Carry out analog-to-digital conversion and produce digital signal Dk-1, then pass through previous stage digital-to-analogue again
Converter SubDACk-1, operational amplifier OP amplifies to form residual signal Vk, meanwhile, residual signal VkBy when prime level circuit
In capacitance CfkWith capacitance CskSampling；And work as prime analog-digital converter SubADCkAlso output digit signals D at this momentk.When
When the clock signal φ 1 of next clock cycle puts high, digital signal DkAfter carrying out digital-to-analogue conversion, by being turned by current level digital-to-analogue
Parallel operation SubDACkResidual signal V is produced with the circuit that operational amplifier OP is formedk+1, at this time, rear class analog-digital converter
SubADCk+1Output digit signals Dk+1.According to above-mentioned principle, clock signal produces the flowing water type analog-to-digital converter of this Op-amp sharing at any time
The clock signal of raw module carries out repeating use and keeps operation.
Specific embodiment described herein is only to spirit explanation for example of the invention.Technology belonging to the present invention is led
The technical staff in domain can do various modifications or additions to described specific embodiment or replace in a similar way
Generation, but without departing from spirit of the invention or beyond the scope of the appended claims.
Claims (5)
1. a kind of flowing water type analog-to-digital converter of Op-amp sharing, including sequence generation module and the sequentially connected level electricity of some levels
Road, it is characterised in that each level circuit includes analog-digital converter subADC, digital analog converter subDAC and sample circuit, phase
Be equipped with operational amplifier OP between adjacent two level circuits, the previous stage sample circuit and when prime sample circuit respectively when
The opposite timing rhohase that sequence generation module produces is connected and works with operational amplifier OP, the previous stage level circuit and fortune
Amplifier OP is calculated to connect to form previous stage sampling hold circuit, it is described when prime level circuit connects to be formed with operational amplifier OP
When prime sampling hold circuit.
2. the flowing water type analog-to-digital converter of a kind of Op-amp sharing according to claim 1, it is characterised in that described is previous
Level sampling hold circuit includes previous stage input signal Vk-1, switch S11, switch S12, switch S13, switch S14, switch S15,
Capacitance Cfk-1With capacitance CSk-1；The prime sampling hold circuit of working as includes switch S21, switch S22, switchs S23, switchs
S24, switch S25, capacitance CfkWith capacitance CSk；Sequence generation module produce clock signal φ 1 and with 1 phase phases of clock signal φ
Anti- clock signal φ 2；The previous stage sampling hold circuit turns when clock signal φ 1 is high level with previous stage modulus
Parallel operation SubADCk-1, previous stage analog-digital converter SubADCk-1And operational amplifier OP connections enter sampling operation state, together
When prime sampling hold circuit enter keep working status；It is described when prime sampling hold circuit is in clock signal φ 2
With working as prime analog-digital converter SubADC during high levelk, as prime analog-digital converter SubADCkAnd operational amplifier OP connections
Into sampling operation state, while previous stage sampling hold circuit enters holding working status.
3. the flowing water type analog-to-digital converter of a kind of Op-amp sharing according to claim 2, it is characterised in that described is previous
Level input signal Vk-1Previous stage analog-digital converter SubADC is connected respectivelyk-1First end, switch S11 first end and switch
The first end of S12；The previous stage analog-digital converter SubADCk-1Second end connection previous stage digital analog converter
SubDACk-1First end；Switch second end difference connecting valve S22 first ends, the capacitance Cf of S11k-1First end；Switch
The first end and capacitance Cs of the second end difference connecting valve S21 of S12k-1First end；The second end of the switch S21 connects
Meet previous stage digital analog converter SubDACk-1Second end；The capacitance Csk-1Second end difference connecting valve S13 the
One end and the first end of switch S23；The second end ground connection of the switch S13；The second end of the switch S23 connects fortune respectively
Calculate the reverse input end of amplifier OP and the first end of switch S14；The second end of the switch S14 connects switch S25's respectively
First end, capacitance CfkFirst end and capacitance CskFirst end；The second end ground connection of the switch S25；The computing is put
The output terminal of big device OP connects the second end of switch S22, switchs the first end of S24, as prime analog-digital converter SubADC respectivelyk's
First end and capacitance CfkSecond end；Described works as prime analog-digital converter SubADCkThe second current level digital-to-analogue conversion of termination
Device SubDACkFirst end；The second end of the switch S24 meets capacitance Cs respectivelykSecond end, switch S15 first end；
The second current level digital analog converter SubDAC of termination of the switch S15kSecond end.
4. the flowing water type analog-to-digital converter of a kind of Op-amp sharing according to Claims 2 or 3, it is characterised in that described
1 controlling switch S11 of clock signal φ, switch S12, switch S13, switch S14 and the cut-off/close for switching S15, the sequential
2 controlling switch S21 of signal psi, switch S22, switch S23, switch S24 and the cut-off/close for switching S25；When φ 1 puts high, open
Close S11, switch S12, switch S13, switch S14 and switch S15 closure, switch S21, switch S22, switch S23, switch S24 and
Switch S25 to disconnect, capacitance Cfk-1With capacitance Csk-1Complete previous stage input signal Vk-1Sampling；When φ 2 puts high, switch
S11, switch S12, switch S13, switch S14 and switch S15 disconnections, and switch S21, switch S22, switch S23, switch S24 and open
Close S25 closures, capacitance CfkWith capacitance CskPrime input signal V is worked as in completionkSampling.
5. the flowing water type analog-to-digital converter of a kind of Op-amp sharing according to claim 4, it is characterised in that described is current
Level digital analog converter SubDACkTo as prime input signal V while φ 2 puts highkChange simultaneously output digit signals Dk。
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| Application Number | Priority Date | Filing Date | Title |
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| CN201711213046.1A CN108011637A (en) | 2017-11-28 | 2017-11-28 | A kind of flowing water type analog-to-digital converter of Op-amp sharing |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201711213046.1A CN108011637A (en) | 2017-11-28 | 2017-11-28 | A kind of flowing water type analog-to-digital converter of Op-amp sharing |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101295987A (en) * | 2007-04-25 | 2008-10-29 | 中国科学院微电子研究所 | Operational amplifier sharing multiplication D/A conversion circuit and application |
| CN103916125A (en) * | 2013-01-06 | 2014-07-09 | 上海华虹宏力半导体制造有限公司 | Assembly line analog-digital converter |
| CN104769847A (en) * | 2013-03-15 | 2015-07-08 | 艾尔弗雷德·E·曼科学研究基金会 | High voltage monitoring successive approximation analog to digital converter |
| EP2924880A1 (en) * | 2014-03-27 | 2015-09-30 | MediaTek, Inc | Multiplying digital-to-analog converter and pipeline analog-to-digital converter using the same |
-
2017
- 2017-11-28 CN CN201711213046.1A patent/CN108011637A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101295987A (en) * | 2007-04-25 | 2008-10-29 | 中国科学院微电子研究所 | Operational amplifier sharing multiplication D/A conversion circuit and application |
| CN103916125A (en) * | 2013-01-06 | 2014-07-09 | 上海华虹宏力半导体制造有限公司 | Assembly line analog-digital converter |
| CN104769847A (en) * | 2013-03-15 | 2015-07-08 | 艾尔弗雷德·E·曼科学研究基金会 | High voltage monitoring successive approximation analog to digital converter |
| EP2924880A1 (en) * | 2014-03-27 | 2015-09-30 | MediaTek, Inc | Multiplying digital-to-analog converter and pipeline analog-to-digital converter using the same |
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Application publication date: 20180508 |