CN108010899A - Separate type preform packaging conductor frame and preparation method thereof - Google Patents
Separate type preform packaging conductor frame and preparation method thereof Download PDFInfo
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- CN108010899A CN108010899A CN201610929467.3A CN201610929467A CN108010899A CN 108010899 A CN108010899 A CN 108010899A CN 201610929467 A CN201610929467 A CN 201610929467A CN 108010899 A CN108010899 A CN 108010899A
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- chip
- face
- separate type
- lead
- glued membrane
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
- H01L21/4828—Etching
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49579—Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Abstract
A kind of separate type preform packaging conductive wire stand manufacturing method and separate type preform packaging conductor frame, etched and encapsulated using segmented, conductive substrate is allowed to be encapsulated by the gluing of encapsulating material, and allow each lead frame unit for the separate type preform packaging conductor frame to be formed to be not required to individually separated by supporting rack connection and electrical independence, and subsequently encapsulation, the processing procedure use of singulation can be easier to.
Description
Technical field
The present invention relates to a kind of square flat outer-pin-free (QFN, quad flat no-lead) lead frame and its making side
Method, more particularly to a kind of preform packaging conductor frame and preparation method thereof.
Background technology
Refering to Fig. 1, existing square flat outer-pin-free (QFN, quad flat no-lead) conducting wire frame structure, is mostly
First by bulk etch (bulk etching) mode, by one selected from the gold that copper, iron-nickel alloy, or copper series alloy are material composition
After belonging to piece etching removal unnecessary portion, and form a lead frame 1.The lead frame 1 have it is a plurality of longitudinal and transversely arranged and
The connecting bracket 11 being spaced, and multiple connecting brackets 11 arranged by wantonly two transverse direction and longitudinal directions that are adjacent and intersecting each other are total to
With the lead frame unit 12 defined.Each lead frame unit 12 has a chip carrier 13, and a plurality of from the connecting bracket
11 pins 14 extended towards the chip carrier 13.When to carry out chip package using the foregoing lead frame 1, usually first by one
Semiconductor chip (not shown) fits in the top surface of the chip carrier 13, after then carrying out routing, encapsulation, then along a pre-incision lines
(imaginary line as shown in Figure 1) cuts the pin 14, allows the pin 14 is electrically independent each other to carry out, and obtains simple grain envelope
Fill grainiess.
Coordinate and refer to Fig. 2, and another kind QFN packaged types, then it is that industry is known as GQFN (grid quad flat no-
Lead) packaged type.It is after one sheet metal 10 first is etched removal unnecessary portion by bulk etch, in the sheet metal
A 10 wherein surface forms the line pattern 121 that the structure of the lead frame unit 12 shown in one and Fig. 1 duplicates, then first by one
Semiconductor chip 15 fits in the top surface of the chip carrier 13, then carries out wire-bonding package, forms conducting wire 16 with encapsulating the chip 15
Back of the body etching is carried out after the encapsulated layer 17 of the conducting wire 16, then by the sheet metal 10 for being packaged with the semiconductor chip 15, in the gold
The surface for belonging to the reverse semiconductor chip 15 of piece 10 etches to form electrical interconnection pattern 122 corresponding with the line pattern 121,
Then after forming an insulating layer 18 in the gap of the electrical interconnection pattern 122, then singulation (dicing) is carried out, and obtains simple grain
The encapsulation crystal grain of encapsulation.Foregoing GQFN processing procedures because the line pattern 121 that etching is formed for the first time only on 10 surface of sheet metal, because
This, the pin 14 can be each independent, to connect without there are connecting bracket 11 as shown in Figure 1, therefore, when with GQFN encapsulation sides
When the encapsulation chip that formula obtains carries out singulation, its cutting position (position as shown by the arrows in figure 2) only can cut to encapsulating material not
Metal material can be cut to.However, this packaged type is because be to carry out the second etching again after first the semiconductor chip 15 is encapsulated,
Therefore, the influence in etching process to the semiconductor chip 15 can not be expected.
The content of the invention
It is an object of the invention to provide a kind of easy to use and available for the separate type for simplifying follow-up encapsulation cutting processing procedure
Preform packaging conductive wire stand manufacturing method.
The separate type preform packaging conductive wire stand manufacturing method of the invention, includes one first etching step, one first sealing
Step, and one second etching step.
First etching step is to prepare one to have the conductive substrate of first surface and second surface in face to face each other,
Etch conductive material one first etching groove of formation for removing part downwards from the first surface, and the depth of the etching groove is not passed through
The second surface, obtains a lead frame semi-finished product, the lead frame semi-finished product have a conductive base, it is multiple from the conductive base to
On upper chip portion, and it is multiple with the upper chip portion into the lead portion in a gap, the lead portion is with upper chip portion by this
First etching groove is separated, wherein, the bottom surface of the conductive base is the second surface, the reverse conduction in the upper chip portion
The surface of base portion is the face for being used to be connected with semiconductor chip.
The first sealing step is to fill in a polymer encapsulation material in first etching groove, one the first one-tenth of formation after curing
Shape glued membrane, and the first shaping glued membrane does not cover the upper chip portion and the surface of the reverse conductive base of lead portion.
Second etching step is lead frame semi-finished product by the first shaping glued membrane is formed from the second of the conductive base
Surface is etched, and the conductive material etching which is corresponded to the first etching groove location is removed to the first shaping glue
Film exposes and removes the partially electronically conductive material in the correspondence lead portion and upper chip portion, and forms one second etching groove and multiple
The lower chip portion of connection corresponding with the upper chip portion and the lead portion and electrical connection section respectively, and the lower chip portion and
Electrical connection section is separated by second etching groove.
It is preferred that separate type preform packaging conductive wire stand manufacturing method of the present invention, this method also includes one second
Sealing step, fills in a polymer encapsulation material in second etching groove and forms one second shaping glued membrane, and the second shaping glue
Film does not cover the surface in the reverse upper chip portion of the electrical connection section and lower chip portion.
It is preferred that separate type preform packaging conductive wire stand manufacturing method of the present invention, this method also includes a metal
Layer forming step, the surface that the second shaping glued membrane is exposed in the electrical connection section and the lower chip portion form a metal
Layer.
It is preferred that separate type preform packaging conductive wire stand manufacturing method of the present invention, wherein, which serves as reasons
At least one layer of conductive material is formed, the surface of the first shaping glued membrane which forms and the upper chip portion and
The surface of the reverse conductive base of the lead portion flushes, and the first and second shaping glued membrane can be identical or different macromolecule
Encapsulating material.
Another object of the present invention is to provide a kind of easy to use and subsequently encapsulate point for cutting processing procedure available for simplifying
From formula preform packaging conductor frame.
The separate type preform packaging conductor frame of the present invention, includes multiple lead frame unit, and a preform glue-line.
The lead frame unit is constructed from a material that be electrically conducting, electrically isolated from one another to be not connected with and be spaced into array, often
One lead frame unit has at least one chip carrier, and a plurality of each electrical independent pin, the chip carrier have one to be used for
The top surface being connected with semiconductor chip, each pin have one towards the chip carrier top surface extension and with the chip carrier
Lead portion and the top surface of the lead portion into a gap are flushed with the top surface of the chip carrier, and relatively remote from each lead portion
Side from the chip carrier extends downwardly and can be used for the electrical connection section being externally electrically connected.
The pin in gap and each lead frame unit of the preform glue-line between the lead frame unit
Portion, the gap of the electrical connection section and the chip carrier, the preform glue-line have one adjacent with the top surface of the chip carrier the
Simultaneously, and reverse first face the second face, wherein, the top surface of each chip carrier and each lead portion is from first face
Expose, reversely the bottom surface of the top surface and the surface of the reverse lead portion of each electrical connection section can certainly should each chip carrier
Second shows out, and the top surface of the chip carrier is flushed with the first face of the preform glue-line and the surface of the lead portion, altogether
With one flat surface of composition.
It is preferred that separate type preform packaging conductor frame of the present invention, wherein, which has one certainly should
First facing to second face formed first shaping glued membrane, and one from this second facing to the first face formed second shaping glue
Film, and the material of the first and second shaping glued membrane can be identical or different.
It is preferred that separate type preform packaging conductor frame of the present invention, the separate type preform packaging conductor frame is also
Comprising a metal layer, which is formed at the chip carrier and the electrical connection section from the exposed surface in second face.
The beneficial effect of the present invention is：Etched and encapsulated using segmented, conductive substrate can be borrowed in etching process
Encapsulated by the gluing of encapsulating material, and allow each to be formed lead frame unit to be not required to the company by existing metal supporting frames
Connect, individually separated and electrical independence, and subsequently encapsulation, the processing procedure use of singulation can be easier to.
Brief description of the drawings
Fig. 1 is the schematic diagram for illustrating tradition QFN conducting wire frame structures；
Fig. 2 is the encapsulation production process schematic diagram for illustrating tradition GQFN；
Fig. 3 is the schematic top plan view for the first embodiment for illustrating separate type preform packaging conductor frame of the present invention；
Fig. 4 is the sectional view of 4-4 secants in Fig. 3；
Fig. 5 be illustrate illustrate the first embodiment pin be plurality of rows of schematic diagram；
Fig. 6 is to illustrate that the controller of the of the invention first embodiment be roller bearing, and the broken section for also having fixed link shows
It is intended to；
Fig. 7 illustrates the flow diagram of the step 91；
Fig. 8 is the flow diagram that step 92-94 is aided in illustrating with the sectional structure of 8-8 secants in Fig. 7；
Fig. 9 is that explanation carries out semiconductor die package using the separate type preform packaging conductor frame of the first embodiment
Afterwards, the schematic cross-sectional view before singulation；
Figure 10 is the schematic cross-sectional view for illustrating separate type preform packaging conductor frame made from the second embodiment；
Figure 11 is the word flow chart of steps for illustrating the second embodiment.
Embodiment
The present invention is described in detail with reference to the accompanying drawings and embodiments.Before the present invention is described in detail, it should note
It is intended in the following description content, similar component is represented with being identically numbered.
Refering to Fig. 3,4, an embodiment of separate type preform packaging conductor frame 200 (see Fig. 8) of the present invention be can be used for into
Row semiconductor die package.The separate type preform packaging conductor frame 200 has multiple lead frame unit 2, and a preform glue
Layer 3.
The lead frame unit 2 is made of at least one conductive material such as copper, copper series alloy or iron-nickel alloy, electric each other
Sexual isolation is not connected with and is spaced into array.Define a plurality of precut along Y-direction and X-direction spaced first and second
Road 301,302, described first and second precut road 301,302 i.e. respectively between wantonly two adjacent lead frame unit 2, that is,
Say, wantonly two adjacent and intersecting first and second precut roads 301,302 can define a lead frame unit 2.Each lead frame
Unit 2 has a chip carrier 21, and a plurality of each electrically independent from the side in neighbouring described first and second precut road 301,302
Edge extends towards 21 periphery of chip carrier and the pin 22 with the chip carrier 21 into a gap.
Specifically, which has a top surface 211 for being used to be connected with semiconductor chip, and the reverse top
The bottom surface 212 in face 211, each pin 22 have one towards the chip carrier 21 top surface 211 extend and with the chip carrier 21 into
The lead portion 221 in one gap, and the top surface 222 of the lead portion 221 is flushed with the top surface 211 of the chip carrier 21, and from the pin
Side of the portion 221 away from the chip carrier 21 extends downwardly and can be used for the electrical connection section 223 being externally electrically connected.It is noted that
Be in Fig. 3 by taking each lead frame unit 2 includes chip carrier 21 as an example, however, during actual implementation, the lead frame list
Member 2 can also have multiple chip carriers 21 respectively, be not limited with this quantity.In addition, be in Fig. 3 with the pin 22 be from that
This opposite first precut road 301, extend towards the chip carrier 21, and is formed exemplified by single pin, but during actual implementation,
, should by optional position direction in the range of the pin 22 can be defined from described first and second precut road 301,302 respectively
Chip carrier 21 extends, for example, the pin 22 can be extended by diverse location as shown in Figure 5, and formed it is multiple rows of (Fig. 5 using 2 rows as
Example) pin.
The preform glue-line 3 is made of the macromolecule encapsulating material such as epoxy resin, between the lead frame unit 2
The gap of the lead portion 221 of gap and each lead frame unit 2, the electrical connection section 223 and the chip carrier 21.Should
Preform glue-line 3 has first face 31 adjacent with the top surface 211 of the chip carrier 21, and the of reverse first face 31
Two faces 32, wherein, the top surface 211 of each chip carrier 21 and the top surface 222 of each lead portion 221 are from first face 31
Expose, the bottom surface 212 of the reverse top surface 211 of each chip carrier 21 and the reverse lead portion of each electrical connection section 223
221 surface can expose from second face 32, and first face of the top surface 211 of the chip carrier 21 and the preform glue-line 3
31 and the top surface 222 of the lead portion 221 flush, collectively form a flat surface.
Cooperation refers to Fig. 6-8, and foregoing 200 production method of separate type preform packaging conductor frame, is first to carry out one first
Etching step 91,100 unnecessary portion of a conductive substrate is etched and is removed, obtains a lead frame semi-finished product.
The conductive substrate 100 have an estimated first surface 101 for connecting semiconductor chip and with the first surface
A 101 opposite second surfaces 102, and define a plurality of be spaced and with the Y-direction and X-direction row in the conductive substrate 100
First and second division island 103,104 of row, and first and second division island 103,104 is to correspond to as shown in Figure 3 first and second
The position in precut road 301,302.To illustrate that conductive substrate 100 can be by the conductive material of an individual layer, such as copper, copper
It is that alloy or iron-nickel alloy etc. are formed or be laminated by multilayer conductive material, such as palladium layers is plated again in nickel coating on copper sheet,
And being formed has copper/nickel/palladium three-decker, and need not especially be any limitation as.In this present embodiment, which is
With individual layer, and illustrate exemplified by the copper sheet that thickness is 1.0-1.5mm.
First etching step 91 is described in the first surface 101 etching removal downwards from the conductive substrate 100 corresponds to
First and second division island 103,104 positions and remaining unwanted conductive material, formed one be not passed through the second surface 102 the
One etching groove 105, and obtaining one has the lead frame semi-finished product 200A of predetermined conducting wire pattern in the first surface 101.
Lead frame semi-finished product 200A has a conductive base 201, multiple upper chip portions 202 upward from the conductive base 201 and multiple
Lead portion 221 with the upper chip portion 202 into a gap, and the lead portion 221 and the upper chip portion 202 by this
One etching groove 105 is separated.Wherein, the bottom surface of the conductive base 201 is the second surface 102, the upper chip portion 202
The surface of the reverse conductive base 201 is the face for being used to be connected with semiconductor chip.It is preferred that first etching groove 105
Depth, no more than the half that the first surface 101 arrives 102 distance of second surface, and in order to can the more precise control conduction
The etching precision of line pattern, more preferably, the depth of first etching groove 105 is in order to control no more than 0.5mm.
Then, one first sealing step 92 is carried out, lead frame semi-finished product 200A is located in a mould (not shown),
A polymer encapsulation material selected from insulating polymers such as epoxy resin is filled in first etching groove 105 with the mode that is molded into, and
Control the table for allowing the polymer encapsulation material not cover the upper chip portion 202 and the reverse conductive base 201 of lead portion 221
Face, then by the Blister pack material solidification, forms one first shaping glued membrane 106.
Then, one second etching step 93 is carried out, the lead frame semi-finished product of the first shaping glued membrane 106 will be previously formed
200A is etched from the second surface 102 (i.e. the bottom surface of the conductive base 201), by the conductive base 201 correspond to this first
The conductive material etching removal of 105 position of etching groove exposes to the first shaping glued membrane 106 and will correspond to the lead portion at the same time
221 and upper chip portion 202 partially electronically conductive material remove, and formed one second etching groove 107 and it is multiple respectively with it is corresponding
The lower chip portion 203 and electrical connection section 223 that the upper chip portion 202 and the lead portion 221 connect, and the lower chip portion
203 and electrical connection section 223 be separated by second etching groove 107.Cooperation refers to Fig. 3, at this time, corresponding described first and second
Precut road 301, the conductive material of 302 positions are removed, and each corresponds to the upper chip portion 202 of connection and lower chip
Portion 203 collectively forms the chip carrier 21 as shown in Figure 3；And each corresponds to the lead portion 221 and electrical connection section 223 of connection
Collectively form the pin 22 that can be externally electrically connected.
One second sealing step 94 is finally carried out again, and filling in a polymer encapsulation material in second etching groove 107 forms
One second shaping glued membrane 108, you can obtain separate type preform packaging conductor frame 200 as shown in Figure 3.
In detail, which will be previously formed the lead frame semi-finished product of second etching groove 107
200A is located in a mould (not shown), and filling in one in second etching groove 107 with the mode that is molded into is selected from epoxy resin etc. absolutely
The high molecular polymer encapsulation material of edge, and control and make the polymer encapsulation material not cover the electrical connection section 223 and lower core
The reverse surface in the lead portion 221 and upper chip portion 202 in piece portion 203, then by the polymer encapsulation material solidification, being formed should
Second shaping glued membrane 108, which, which can be engaged with each other, collectively forms the preforming glue-line 3, you can
Complete the making of the separate type preform packaging conductor frame 200.It is noted that selected by the first and second shaping glued membrane 106,108
Polymer encapsulation material can be identical or different, it is only necessary to compatible good insulating polymeric material each other is selected, and
It is not required to especially be any limitation as.
In addition, it is noted that also visual actual process requirement is without implementing the second sealing step 94.When this is not carried out
During the second sealing step 94, the finally formed preform glue-line 3 then can only have the first shaping glued membrane 106.
The present invention utilizes first etching step 91, and the conductive base 100 first is carried out shallow etch and forms conducting wire
Pattern, thus can more accurately control etching formed conducting wire pattern (such as lead portion 221) precision, and obtain quality compared with
Good conducting wire pattern.In addition, because first and second etching step 91,93, it is that the corresponding position of original is pre- described first and second
Cutting Road 301, the conductive material of 302 positions are fully etched removal, therefore, final obtained separate type preform packaging conductive wire
Each lead frame unit 2 of frame 200 is to electrically isolate each other, and precuts road 301,302 in correspondence described first and second
Position has no conductive (metal) material, and only exists polymer encapsulation material.
Refering to Fig. 9, when the later use separate type preform packaging conductor frame 200 carry out semiconductor chip W fitting,
After routing and encapsulation, you can first carry out single electrical testing for the encapsulation crystal grain for the lead frame unit 2 chosen respectively；And
(Fig. 9 arrows are to show along described first when finally carrying out singulation (dicing) along described first and second precut road 301,302
Precut road 301 carries out singulation), because can only cut to high molecular material without cutting to metal material, and can be easier to cut
Cut and avoid cutting tool from wearing.
Refering to Figure 10, a second embodiment of separate type preform packaging conductor frame 200 of the present invention, its structure with this first
Embodiment is roughly the same, difference be in the second embodiment the chip carrier 21 and the electrical connection section 223 from this second
The surface that face 32 is exposed, and/or be the portion top surface exposed in the lead portion 221 and the chip carrier 21 from first face 31
222nd, 211 a metal layer 4 can also be formed.The metal layer 4 can be individual layer or multimembrane Rotating fields, and material may be selected from nickel, palladium, silver or
The metals such as gold, available for the follow-up reliability with other circuit board electrical connections, scolding tin or routing processing procedure of lifting.It is only aobvious in Figure 10
Show the chip carrier 21 and the electrical connection section 223 from the surface that second face 32 is exposed have the metal layer 4 exemplified by explain.
Refering to Figure 11, the preparation method of the second embodiment is roughly the same with the first embodiment, difference be in this
Two sealing steps 94 also need further to carry out a metal layer forming step 95 after implementing, using changing the plated film sides such as plating mode or sputter
Formula, with the surface that the chip carrier 21 and the electrical connection section 223 expose from second face 32, and/or is drawn in described
The portion top surface 222,211 that foot 221 and the chip carrier 21 expose from first face 31 forms the metal layer 4.Due to foregoing
The selection of the relevant parameter and Coating Materials of the processing procedure such as the change plating or sputter is known in the art to be known, therefore no longer adds to go to live in the household of one's in-laws on getting married
State.
When carrying out the encapsulation of semiconductor chip using the separate type preform packaging conductor frame 200 of the second embodiment,
Since the electrical connection section 223 of the pin 22 is used for the surface that is externally electrically connected first preplating gold in the reverse chip carrier 21
Belong to layer 4, therefore, can be directly electrically connected using the metal layer 4 and other circuit board (not shown) or scolding tin, and more increasing makes
Use convenience.
In conclusion the of the invention separate type preform packaging conductor frame 200 utilizes segmentation etch and encapsulation, and allow via
Each lead frame unit 2 that etching is formed can be not required to by conventional metals supporting rack (connecting bracket 11 as shown in Figure 1)
Connection, individually separated and electrical independence, and subsequently encapsulation, the processing procedure of singulation can be easier to.In addition, form metal by further
Layer 4, can be also directly electrically connected or scolding tin using the metal layer 4 and other circuit boards, and more increase ease of use, therefore really
It may achieve the purpose of the present invention in fact.
Claims (7)
- A kind of 1. separate type preform packaging conductive wire stand manufacturing method, it is characterised in that：Comprising：One first etching step, preparing one has the conductive substrate of first surface and second surface in face to face each other, certainly should First surface, which etches downwards, to be removed the conductive material of part and forms one first etching groove, and the depth of the etching groove be not passed through this Two surfaces, obtain a lead frame semi-finished product, which has a conductive base, multiple upward from the conductive base Upper chip portion, and it is multiple with the upper chip portion into the lead portion in a gap, the lead portion and upper chip portion by this first Etching groove is separated, wherein, the bottom surface of the conductive base is the second surface, the reverse conductive base in the upper chip portion Surface be to be used for the face that is connected with semiconductor chip；One first sealing step, a polymer encapsulation material is filled in first etching groove,One first shaping glued membrane is formed after curing, and the first shaping glued membrane does not cover the upper chip portion and lead portion and reversely should The surface of conductive base；AndOne second etching step, will be formed the lead frame semi-finished product of the first shaping glued membrane from the second surface of the conductive base into Row etching, conductive material etching removal to the first shaping glued membrane which is corresponded to the first etching groove location expose And by the partially electronically conductive material in the correspondence lead portion and upper chip portion remove, and formed one second etching groove and it is multiple respectively with The upper chip portion and the lower chip portion of the corresponding connection of the lead portion and electrical connection section, and the lower chip portion and electrical connection Portion is separated by second etching groove.
- 2. separate type preform packaging conductive wire stand manufacturing method according to claim 1, it is characterised in that：This method is also wrapped Containing one second sealing step, fill in a polymer encapsulation material in second etching groove and form one second shaping glued membrane, and this Two shaping glued membranes do not cover the surface in the reverse upper chip portion of the electrical connection section and lower chip portion.
- 3. separate type preform packaging conductive wire stand manufacturing method according to claim 1, it is characterised in that：This method is also wrapped Containing a metal layer forming step, the surface that the second shaping glued membrane is exposed in the electrical connection section and the lower chip portion is formed One metal layer.
- 4. separate type preform packaging conductive wire stand manufacturing method according to claim 1, it is characterised in that：The conductive substrate To be made of at least one layer of conductive material, the surface for the first shaping glued membrane which forms and the upper chip Portion and the surface of the reverse conductive base of the lead portion flush, and the first and second shaping glued membrane can be identical or different height Molecule encapsulating material.
- A kind of 5. separate type preform packaging conductor frame, it is characterised in that：Comprising：Multiple lead frame unit, are constructed from a material that be electrically conducting, electrically isolated from one another to be not connected with and be spaced into array, each Lead frame unit has at least one chip carrier, and a plurality of each electrically independent pin, which has one to be used for and one The top surface of semiconductor chip connection, each pin have one towards the chip carrier top surface extension and with the chip carrier into one The top surface of the lead portion in gap and the lead portion is flushed with the top surface of the chip carrier, and is relatively distant from this from each lead portion The side of chip carrier extends downwardly and can be used for the electrical connection section being externally electrically connected；AndOne preform glue-line, the lead portion in gap and each lead frame unit between the lead frame unit, The gap of the electrical connection section and the chip carrier, the preform glue-line have one adjacent with the top surface of the chip carrier first Face, and second face in reverse first face, wherein, the top surface of each chip carrier and each lead portion first is showed from this Go out, each chip carrier reversely the bottom surface of the top surface and each electrical connection section reversely the lead portion surface can from this Two show out, and the top surface of the chip carrier is flushed with the first face of the preform glue-line and the surface of the lead portion, jointly Form a flat surface.
- 6. separate type preform packaging conductor frame according to claim 5, it is characterised in that：The preform glue-line has one From this first facing to second face formed first shaping glued membrane, and one from this second facing to the first face formed the second one-tenth Type glued membrane, and the material of the first and second shaping glued membrane can be identical or different.
- 7. separate type preform packaging conductor frame according to claim 6, it is characterised in that：The separate type preform encapsulates Lead frame also includes a metal layer, which is formed at the chip carrier and the electrical connection section from the exposed table in second face Face.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610929467.3A CN108010899A (en) | 2016-10-31 | 2016-10-31 | Separate type preform packaging conductor frame and preparation method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610929467.3A CN108010899A (en) | 2016-10-31 | 2016-10-31 | Separate type preform packaging conductor frame and preparation method thereof |
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| Publication Number | Publication Date |
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| CN108010899A true CN108010899A (en) | 2018-05-08 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201610929467.3A Pending CN108010899A (en) | 2016-10-31 | 2016-10-31 | Separate type preform packaging conductor frame and preparation method thereof |
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Cited By (1)
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| CN113192921A (en) * | 2021-06-25 | 2021-07-30 | 江苏长晶浦联功率半导体有限公司 | Packaging frame structure, manufacturing method and chip packaging structure |
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| CN102891125A (en) * | 2011-07-20 | 2013-01-23 | 南茂科技股份有限公司 | Chip packaging structure and manufacturing method thereof |
| CN206584920U (en) * | 2016-10-31 | 2017-10-24 | 长华科技股份有限公司 | Separate type preform packaging conductor frame |
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| US6927483B1 (en) * | 2003-03-07 | 2005-08-09 | Amkor Technology, Inc. | Semiconductor package exhibiting efficient lead placement |
| CN101877339A (en) * | 2009-04-28 | 2010-11-03 | 旺宏电子股份有限公司 | Leadframe |
| CN101694837A (en) * | 2009-10-17 | 2010-04-14 | 天水华天科技股份有限公司 | Packaging part with double-row pins and four flat and pin-free surfaces and production method thereof |
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Application publication date: 20180508 |