CN108009352A - A kind of filling flow of lithography layout and the design method of photo etched mask - Google Patents
A kind of filling flow of lithography layout and the design method of photo etched mask Download PDFInfo
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- CN108009352A CN108009352A CN201711242816.5A CN201711242816A CN108009352A CN 108009352 A CN108009352 A CN 108009352A CN 201711242816 A CN201711242816 A CN 201711242816A CN 108009352 A CN108009352 A CN 108009352A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
- G06F30/398—Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM]
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
- G06F30/392—Floor-planning or layout, e.g. partitioning or placement
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Evolutionary Computation (AREA)
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- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Architecture (AREA)
- Preparing Plates And Mask In Photomechanical Process (AREA)
Abstract
The present invention relates to technical field of integrated circuits, more particularly to a kind of filling flow of lithography layout and the design method of photo etched mask, including：Step S1, there is provided there is the original domain of design configuration, design configuration corresponds to specific IC design；Step S2, for the first domain, uses the filling that redundant pattern is carried out for filling the first coded program of redundant pattern；Step S3, for the domain after filling redundant pattern, the printed pattern that can be printed on using the modified second coded program filling of optical proximity effect on wafer；Step S4, Time-Series analysis is carried out to the third edition figure after filling redundant pattern and printed pattern；The Time-Series analysis of comprehensive full print pattern can be carried out, so as to ensure that the high reliability of preparation process.
Description
Technical field
The present invention relates to technical field of integrated circuits, more particularly to a kind of filling flow of lithography layout and photo etched mask
Design method.
Background technology
In integrated circuit diagram, the correlation according to each level in semiconductor devices is generally required, is calculated on chip
Redundant pattern region can not be filled and redundant pattern region can be filled, the superfluous of redundant pattern area filling particular form can filled
Complementary graph.
In traditional layout design of integrated circuit, carry out Time-Series analysis is generally required after completing the filling of redundant pattern, but
Time-Series analysis at this time can not take follow-up extra printed pattern increased by optical proximity effect amendment into account, from
And Time-Series analysis may be caused to fail.
The content of the invention
In view of the above-mentioned problems, the present invention proposes a kind of filling flow of lithography layout, wherein, including：
Step S1, there is provided there is the original domain of design configuration, the design configuration corresponds to specific integrated circuit
Design；
Step S2, it is described superfluous using the first coded program progress for filling redundant pattern for first domain
The filling of complementary graph；
Step S3, for the domain after the filling redundant pattern, uses the modified second coding journey of optical proximity effect
Sequence filling can be printed on the printed pattern on wafer；
Step S4, Time-Series analysis is carried out to the third edition figure after the filling redundant pattern and the printed pattern.
Above-mentioned filling flow, wherein, in the step S2 and S3, fill the redundant pattern and the printed pattern
Operation is completed at the same time.
Above-mentioned filling flow, wherein, by integrating first coded program and the second coded program institute
The operation for stating redundant pattern and the printed pattern is completed at the same time.
A kind of design method of photo etched mask, wherein, including as above any filling flow.
Beneficial effect：A kind of filling flow of lithography layout proposed by the present invention and the design method of photo etched mask, can
The Time-Series analysis of comprehensive full print pattern is carried out, so as to ensure that the high reliability of preparation process.
Brief description of the drawings
Fig. 1 is the step flow chart of the filling flow of lithography layout in one embodiment of the invention.
Embodiment
The present invention is further described with reference to the accompanying drawings and examples.
Embodiment one
In a preferred embodiment, as shown in Figure 1, it is proposed that a kind of filling flow of lithography layout, wherein it is possible to
Including：
Step S1, there is provided there is the original domain of design configuration, design configuration corresponds to specific IC design；
Step S2, for the first domain, redundant pattern is carried out using the first coded program for filling redundant pattern
Filling；
Step S3, for the domain after filling redundant pattern, is filled out using modified second coded program of optical proximity effect
Fill the printed pattern that can be printed on wafer；
Step S4, Time-Series analysis is carried out to the third edition figure after filling redundant pattern and printed pattern.
In above-mentioned technical proposal, be traditionally used for subsequently being printed on wafer since optical proximity effect amendment increases
The track added is often prepared after Time-Series analysis, is not involved in Time-Series analysis, then can not be taken into account in Time-Series analysis
In, therefore traditional process is easy to cause Time-Series analysis failure；, can will be due to optical adjacent using the filling flow in the present invention
The printed pattern of effect amendment filling takes into account so that Time-Series analysis is more complete and effective；The specific shape of Time-Series analysis
Formula is the ordinary skill in the art, and details are not described herein, the present invention be by optical proximity effect amendment fill correspond to can quilt
The printed pattern of structure of the photoetching on wafer is also added in Time-Series analysis, the concrete form of Time-Series analysis is not changed
Into；The filling for corresponding to the printed pattern that can be photo-etched print structure on wafer of optical proximity effect amendment filling can be with
It is completed in after the filling of redundant pattern so that the filling substep of two kinds of figures carries out, and avoids producing interference mutually or produces report
It is wrong；Specific IC design can be the various designs of ability routine, and details are not described herein.
In a preferred embodiment, in step S2 and S3, the operation for filling redundant pattern and printed pattern is complete at the same time
Into so that the filling of two kinds of figures is carried out at the same time, and the reaction time is short, efficient.
In above-described embodiment, it is preferable that can be by integrating the first coded program and the second coded program redundancy figure
The operation of shape and printed pattern is completed at the same time.
Embodiment two
In a preferred embodiment, it is also proposed that a kind of design method of photo etched mask, wherein it is possible to including as above
Any filling flow, and other conventional steps or flow of photo etched mask are formed, such as follow-up flow and hard mask
Preparation etc..
Above-mentioned technical proposal use filling flow will not to formation photo etched mask pattern other conventional steps or
Flow has an impact, and has preferable compatibility.
In conclusion a kind of filling flow of lithography layout proposed by the present invention and the design method of photo etched mask, including：
Step S1, there is provided there is the original domain of design configuration, design configuration corresponds to specific IC design；Step S2,
For the first domain, the filling that redundant pattern is carried out for filling the first coded program of redundant pattern is used；Step S3, for
The domain after redundant pattern is filled, can be printed on using the modified second coded program filling of optical proximity effect on wafer
Printed pattern；Step S4, Time-Series analysis is carried out to the third edition figure after filling redundant pattern and printed pattern；It can carry out comprehensively
The Time-Series analysis of full print pattern, so as to ensure that the high reliability of preparation process.
By explanation and attached drawing, the exemplary embodiments of the specific structure of embodiment are given, it is smart based on the present invention
God, can also make other conversions.Although foregoing invention proposes existing preferred embodiment, however, these contents are not intended as
Limitation.
For a person skilled in the art, after reading described above, various changes and modifications undoubtedly will be evident.
Therefore, appended claims should regard whole variations and modifications of the true intention and scope that cover the present invention as.Weighing
Any and all scope and content of equal value, are all considered as still belonging to the intent and scope of the invention in the range of sharp claim.
Claims (4)
- A kind of 1. filling flow of lithography layout, it is characterised in that including：Step S1, there is provided there is the original domain of design configuration, the design configuration corresponds to specific IC design；Step S2, for first domain, the redundancy figure is carried out using the first coded program for filling redundant pattern The filling of shape；Step S3, for the domain after the filling redundant pattern, is filled out using modified second coded program of optical proximity effect Fill the printed pattern that can be printed on wafer；Step S4, Time-Series analysis is carried out to the third edition figure after the filling redundant pattern and the printed pattern.
- 2. filling flow according to claim 1, it is characterised in that in the step S2 and S3, fill the redundancy figure The operation of shape and the printed pattern is completed at the same time.
- 3. filling flow according to claim 2, it is characterised in that by integrating first coded program and described Two coded programs cause the operation of the redundant pattern and the printed pattern to complete at the same time.
- 4. a kind of design method of photo etched mask, it is characterised in that including the filling flow as described in claims 1 to 3 is any.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711242816.5A CN108009352A (en) | 2017-11-30 | 2017-11-30 | A kind of filling flow of lithography layout and the design method of photo etched mask |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711242816.5A CN108009352A (en) | 2017-11-30 | 2017-11-30 | A kind of filling flow of lithography layout and the design method of photo etched mask |
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| Publication Number | Publication Date |
|---|---|
| CN108009352A true CN108009352A (en) | 2018-05-08 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201711242816.5A Pending CN108009352A (en) | 2017-11-30 | 2017-11-30 | A kind of filling flow of lithography layout and the design method of photo etched mask |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113772621A (en) * | 2021-07-28 | 2021-12-10 | 浙江工业大学 | Processing method of wettability gradient surface |
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| CN101288080A (en) * | 2005-10-12 | 2008-10-15 | 国际商业机器公司 | Designer's intent tolerance bands for proximity correction and checking |
| CN101494162A (en) * | 2008-01-24 | 2009-07-29 | 索尼株式会社 | Manufacturing method, manufacturing program and manufacturing system for semiconductor device |
| US20120091592A1 (en) * | 2010-10-19 | 2012-04-19 | Taiwan Semiconductor Manufacturing Company, Ltd. | Double Patterning Technology Using Single-Patterning-Spacer-Technique |
| CN102682143A (en) * | 2011-03-11 | 2012-09-19 | 台湾积体电路制造股份有限公司 | RC extraction for single-pattern spacings technology |
| US20120269421A1 (en) * | 2003-10-07 | 2012-10-25 | Asml Netherlands B.V. | System and Method for Lithography Simulation |
| CN103777459A (en) * | 2012-10-25 | 2014-05-07 | 中芯国际集成电路制造(上海)有限公司 | OPC (Optical Proximity Correction) verification method and method for preparing mask |
| CN103871949A (en) * | 2012-12-18 | 2014-06-18 | 上海华虹宏力半导体制造有限公司 | DFM (design for manufacturability) method for territory |
| CN104951600A (en) * | 2015-06-04 | 2015-09-30 | 大连理工大学 | Photoetch-friendly dummy metal fill method |
| CN106094421A (en) * | 2016-07-22 | 2016-11-09 | 上海华力微电子有限公司 | For performing the method that domain OPC processes |
-
2017
- 2017-11-30 CN CN201711242816.5A patent/CN108009352A/en active Pending
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20120269421A1 (en) * | 2003-10-07 | 2012-10-25 | Asml Netherlands B.V. | System and Method for Lithography Simulation |
| CN101288080A (en) * | 2005-10-12 | 2008-10-15 | 国际商业机器公司 | Designer's intent tolerance bands for proximity correction and checking |
| CN101494162A (en) * | 2008-01-24 | 2009-07-29 | 索尼株式会社 | Manufacturing method, manufacturing program and manufacturing system for semiconductor device |
| US20120091592A1 (en) * | 2010-10-19 | 2012-04-19 | Taiwan Semiconductor Manufacturing Company, Ltd. | Double Patterning Technology Using Single-Patterning-Spacer-Technique |
| CN102682143A (en) * | 2011-03-11 | 2012-09-19 | 台湾积体电路制造股份有限公司 | RC extraction for single-pattern spacings technology |
| CN103777459A (en) * | 2012-10-25 | 2014-05-07 | 中芯国际集成电路制造(上海)有限公司 | OPC (Optical Proximity Correction) verification method and method for preparing mask |
| CN103871949A (en) * | 2012-12-18 | 2014-06-18 | 上海华虹宏力半导体制造有限公司 | DFM (design for manufacturability) method for territory |
| CN104951600A (en) * | 2015-06-04 | 2015-09-30 | 大连理工大学 | Photoetch-friendly dummy metal fill method |
| CN106094421A (en) * | 2016-07-22 | 2016-11-09 | 上海华力微电子有限公司 | For performing the method that domain OPC processes |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113772621A (en) * | 2021-07-28 | 2021-12-10 | 浙江工业大学 | Processing method of wettability gradient surface |
| CN113772621B (en) * | 2021-07-28 | 2024-06-07 | 浙江工业大学 | Processing method of wettability gradient surface |
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