CN108008359A - A kind of cascade digital based on pattern-band radio frequency sampling filters anti-Communication Jamming method - Google Patents
A kind of cascade digital based on pattern-band radio frequency sampling filters anti-Communication Jamming method Download PDFInfo
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- CN108008359A CN108008359A CN201711090002.4A CN201711090002A CN108008359A CN 108008359 A CN108008359 A CN 108008359A CN 201711090002 A CN201711090002 A CN 201711090002A CN 108008359 A CN108008359 A CN 108008359A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
- G01S7/02—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S13/00
- G01S7/28—Details of pulse systems
- G01S7/2813—Means providing a modification of the radiation pattern for cancelling noise, clutter or interfering signals, e.g. side lobe suppression, side lobe blanking, null-steering arrays
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
- G01S7/02—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S13/00
- G01S7/36—Means for anti-jamming, e.g. ECCM, i.e. electronic counter-counter measures
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/0003—Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain
- H04B1/0007—Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain wherein the AD/DA conversion occurs at radiofrequency or intermediate frequency stage
- H04B1/001—Channel filtering, i.e. selecting a frequency channel within the SDR system
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/0003—Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain
- H04B1/0007—Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain wherein the AD/DA conversion occurs at radiofrequency or intermediate frequency stage
- H04B1/0017—Digital filtering
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/0003—Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain
- H04B1/0007—Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain wherein the AD/DA conversion occurs at radiofrequency or intermediate frequency stage
- H04B1/0021—Decimation, i.e. data rate reduction techniques
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/10—Means associated with receiver for limiting or suppressing noise or interference
Abstract
The present invention relates to radar anti-active jamming field, spy is related to a kind of cascade digital based on pattern-band radio frequency sampling and filters anti-Communication Jamming method.The present invention is by the way that the rf echo signal that radar receives is digitized by the direct bandpass sampling of ADC chips, digital signal after sampling carries out Digital Down Convert, after digital mixing, multistage filtering extraction, obtain required baseband signal, and do not introduce spectral aliasing, reach the Out-of-band rejection ability of good digital filtering so that the Communication Jamming beyond working frequency points is filtered out, and meets the requirement that target detection is shown.The invention enables the same band communication interference that radar secondary lobe enters to be effectively suppressed, and lifts Anti-jamming Ability for Radar, improves admission detection picture.
Description
Technical field
The present invention relates to radar anti-active jamming field, spy is related to a kind of cascade digital filter based on pattern-band radio frequency sampling
The anti-Communication Jamming method of ripple.
Background technology
Confrontation is current demand of the radar under complex electromagnetic environment with Band mobile communication interference.At present, radar system
Usually all use superhet IF Sampling Digital Receiver, it is relatively low to digital circuit requirement, be easily achieved.But needed under which
Analog frequency mixing, filtering process are carried out to signal, analog radio frequency front end is relatively complicated, and limited flexibility, easily produces mould
Intend the problems such as circuit aging, parameter drift, while the narrow band signal Out-of-band rejection ability of analog filter is also limited by itself property
Can, under normal circumstances, the rejection ability beyond working frequency points ± 10MHz is not less than 50dB, considers Communication Jamming intensity, thunder
Up to actual conditions such as antenna side lobe gain, receiver gain, receiver sensitivities, it is difficult to effectively suppress the same of radar secondary lobe entrance
Band communication disturbs.
The working frequency range of pattern-band radar is overlapping with mobile communication frequency range, so that the target echo of radar is easily done
Disturb, during using analog filter, due to the deficiency of its rejection ability, the overall performance of radar can be subject to extreme influence.In the past by
It is limited to the performance levels such as operational capability, the sample frequency of digital device, the application of the direct sampling digitizing processing of radiofrequency signal is also
Fewer, with the continuous development of good digital device, radio frequency sampling digital receiver has turned into possibility, passes through high property first
Can ADC chips by the direct bandpass sampling of radar rf echo signal, digitized processing, then by high-speed transmission interface by number
According to process chip is transmitted to, relevant DDC, filtering extraction algorithm and function, the mode of this kind of software radio are completed using software
Not only there is high degree of flexibility, convenient design debugging and the advantage for greatly shortening the R＆D cycle, and it is more excellent with digital filtering
Narrow band signal Out-of-band rejection ability, can effectively suppress radar secondary lobe entrance same band communication interference, lifting radar resist it is dry
Disturb ability.
The content of the invention
For the performance limitation of conventional radio frequency signal imitation mixing, filtering and if sampling in background technology, the present invention
Propose a kind of cascade digital using radio frequency sampling technology and filter anti-Communication Jamming method.The present invention is by the way that radar received
Rf echo signal is digitized by the direct bandpass sampling of ADC chips, and the digital signal after sampling carries out Digital Down Convert, by number
After word mixing, multistage filtering extraction, required baseband signal is obtained, and does not introduce spectral aliasing, reaches good digital filter
The Out-of-band rejection ability of ripple so that the Communication Jamming beyond working frequency points is filtered out, and meets the requirement that target detection is shown.This
So that the same band communication interference that radar secondary lobe enters can be effectively suppressed, lifting Anti-jamming Ability for Radar, improves record for invention
Take detection picture.
The technical scheme is that：A kind of cascade digital based on pattern-band radio frequency sampling filters anti-Communication Jamming method,
Order includes rf echo signal bandpass sampling step, first time DDC filtering extraction step, high speed data transfer step, second
Secondary DDC cascades filtering extraction step, it is characterised in that：
The rf echo signal bandpass sampling step includes：
1.1 radio frequencies are inputted produces sub-step with sample frequency；
Rf echo signal S (t) by receiving front-end amplification filtering process inputs ADC, while direct by full coherent
Frequency synthesizer produces required sample frequency fs；
1.2 analog-to-digital conversion sub-steps；
The sample frequency f produced in the adc using step 1.1sRf echo signal S (t) the progress band logical of input is adopted
High frequency analog signals are converted to digital discrete signal by sample；
The first time DDC filtering extraction step, is completed under data using digital mixing technology and 2 grades of half-band filters
Frequency conversion and filtering extraction, including following sub-steps：
2.1 mixing frequencies produce sub-step；
According to sample frequency fsWith carrier frequency fcFrequency tuning word is calculated, passes through frequency tuning word and phase offset word
12 NCO of ADC chips are set, produce mixing frequencies；
2.2 digital mixing orthogonal processing sub-steps；
The digital signal that step 1.2 is produced carries out digital mixing with the mixing frequencies that step 2.1 produces, and full range is taken a message
Number base band is moved, while complete digital quadrature processing, obtain I, Q two-way orthogonal signalling；
2.3 digital program-con-trolled exchange sub-steps；
I, Q two-way quadrature digital signal obtained in step 2.2 is subjected to 4 times of extractions by 2 grades of half-band filters, is reduced
Data transfer rate, and complete low-pass filtering treatment；
The high speed data transfer step, using JESD204B high-speed serial communication transport protocols realize ADC chips with
Stablizing for high speed, Large Volume Data between fpga chip is transmitted, including following sub-steps：
The 3.1 generation same substeps of group code；
Data receiver end module sends synchronization request first, and then data transmitting end module sends K characters, when receiving terminal mould
When block at least has correctly received 4 continuous K characters, synchronously complete；
3.2 initial channels alignment sub-step；
After step 3.1 is completed, start in next multiframe clock boundaries, continuously transmit 4 multiframes, R character representations are opened
Begin, A character representations terminate；
3.3 user data transmission sub-steps；
After step 3.2 is completed, ADC chips just start the transmission of user data, and data pass after encapsulation framing, coding
Transport to fpga chip；
Second of DDC cascade filtering extraction steps, at digital mixing alignment technique and cascade digital filtering
Reason completes data down-conversion and filtering extraction, including following sub-steps：
4.1 digital mixings correct sub-step；
Mixing frequencies are produced using the DDS of fpga chip, digital mixing is carried out with the digital signal that step 3.3 is sent, will
Narrow band signal moves base band, while corrects the frequency offset error of ADC chips generation；
4.2 cascade digital filtering extraction sub-steps；
5 times of filtering extractions are carried out first by absolute filter to the digital signal that step 4.1 produces, reuse even symmetry
FIR filter carries out 2 times of filtering extractions, finally carries out 9 times of filtering extractions using high-performance shaping low pass filter, obtains required
Narrow band signal.
Brief description of the drawings
Fig. 1 is the processing block diagram of the present invention.
Fig. 2 is the first time DDC filtering extraction functional block diagram of the present invention.
Second of DDC that Fig. 3 is the present invention cascades filtering extraction functional block diagram.
Fig. 4 is the output spectrum figure of first order absolute filter in cascade digital filtering.
Fig. 5 is the output spectrum figure of second level even symmetry FIR filter in cascade digital filtering.
Fig. 6 is the output spectrum figure of third level high-performance shaping low pass filter in cascade digital filtering.
Fig. 7 is the filtered output spectrum figure of cascade digital.
Fig. 8 is the pulse pressure figure that measured data exports result.
Embodiment
Explanation of nouns：
DDC：Digital Down Convert (Digital Down Converter).
ADC：Analog-digital converter (Analog-to-Digital Converter).
FPGA：Field programmable gate array (Field-Programmable Gate Array).
NCO：Numerically-controlled oscillator (Numerically Controlled Oscillator).
DDS：Direct Digital Synthesizer (Direct Digital Synthesizer).
FIR：There is limit for length's unit impulse response wave filter (Finite Impulse Response).
Below in conjunction with the attached drawing in the embodiment of the present invention, the technical solution in the embodiment of the present invention is carried out clear, complete
Site preparation describes, it is clear that described embodiment is only part of the embodiment of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, those of ordinary skill in the art are obtained every other without making creative work
Embodiment, belongs to the scope of protection of the invention.
The present invention provides a kind of cascade digital based on pattern-band radio frequency sampling to filter anti-Communication Jamming method, Neng Gouyou
Effect suppresses the same band communication interference that radar secondary lobe enters.The specific embodiment of the present invention, processing block diagram are shown in Fig. 1：
First, rf echo signal sampling step：
1.1 radio frequencies are inputted produces sub-step with sample frequency；
Rf echo signal S (t) by receiving front-end amplification filtering process inputs ADC chips, while passes through full coherent
Direct synthesizer produces sample frequency fs, sample frequency fsSelection should avoid the aliasing of frequency spectrum；
fsIt need to meet fs>=2B and 2fH/(m+1)≤fs≤2fL/ m, m=0,1,2..., wherein fH=f0+B/2,fL=f0-
B/2, fHFor the upper cut off frequency of radar working frequency range, fLFor the lower limiting frequency of working frequency range, f0For in working frequency range again and again
Rate, B are working band bandwidth.
The present embodiment uses working frequency range bandwidth as 120MHz, and carrier frequency is 0.9GHz or so, sampling rate 720MHz, signal
Bandwidth 1MHz.
1.2 analog-to-digital conversion sub-steps；
The sample frequency f produced in the adc using step 1.1sRf echo signal S (t) the progress band logical of input is adopted
High frequency analog signals are converted to digital discrete signal by sample；
2nd, first time DDC filtering extractions step, to reduce data transfer rate, its functional block diagram is shown in Fig. 2：
2.1 mixing frequencies produce sub-step；
12 NCO of ADC chips are set by frequency tuning word and phase offset word, produce mixing frequencies.Wherein frequency
Tuning word NCO_FTW can be calculated by following formula：
Wherein：
fsIt is the sample frequency of ADC chips；
fcIt is required carrier frequency；
Mod () is MOD function；
Round () is the function that rounds up.
The actual mixing frequencies f produced according to frequency tuning word NCO_FTWc-actualFor：
2.2 digital mixing orthogonal processing sub-steps；
The echo digital signal S (n) that step 1.2 is produced is carried out at digital mixing with the mixing frequencies that step 2.1 produces
Reason, the echo-signal S (n) that radar receives are represented by：
Wherein：
fcIt is the frequency of carrier frequency；
A (n) is the amplitude of signal；
It is the phase of signal；
TsIt is the sampling time；
X (n) is the complex envelope of S (n), contains the useful information of S (n)；
exp(2πfcnTs) be S (t) carrier frequency, without useful information.
By S (n) and exp (- 2 π fcnTs) be multiplied, carrier component is removed, becomes zero-frequency, switchs to required baseband signal, its
Representation is：
Orthogonal I, Q digital signal of two-way is obtained, wherein I roads signal isQ roads signal is
2.3 digital program-con-trolled exchange sub-steps；
2 grades of half-band filters that the I (n) obtained in step 2.2 and Q (n) two-way quadrature digital signal are passed through into ADC chips
Carry out 4 times of filtering extractions, half-band filter be a kind of decimation factor be 2 special low pass Finite Impulse Response filter, its phase requirements
To be linear, there is symmetry, i.e. h (n)=h (N-1-n), its frequency response can be expressed as：Then I (n) and Q (n) two-way quadrature digital signal export as y respectively after filtering extractionI1(n) and
yQ1(n), then：
The nearly half coefficient of half-band filter of the present invention is zero, and computation amount, has very high efficiency.For the first time
Full range band signal is moved into base band after DDC processing, data transfer rate is reduced to 180MHz, and data transfer rate reduces by 4 times, is adapted to follow-up FPGA
Processing.
3rd, high speed data transfer step, passes through code transfer, it is possible to achieve the data transfer between adc data and FPGA.
The 3.1 generation same substeps of group code；
SYNCINB ± the pins of ADC chips are set to low level by data receiver first, are sent synchronization request, are then counted
K characters are sent according to transmitting terminal, data receiver positions K characters using clock and data recovery technology in input traffic, when
When reception end module at least has correctly received 4 continuous K characters, transmitting terminal releasing set SYNCINB ±, generation group code is synchronously complete
Into；
3.2 initial channels alignment sub-step；
After step 3.1 is completed, start in next multiframe clock boundaries, continuously transmit 4 multiframes, first multiframe from
Send R characters to start, 0 to 255 ramp data of a multiframe is then sent, with A character ends；Send chain in second multiframe
Road configuration data, is started with R characters, followed by Q characters, then when 14 configurations, 8 words link configuration parameters, finally with A
Character ends；Third and fourth multiframe is started with R characters, with A character ends；
3.3 user data transmission sub-steps；
After step 3.2 is completed, you can carry out the transmission of user data.Data after ADC is sampled are carried out by frame format
Encapsulation, wherein significance bit 14, and 2 stop bits are filled；8B/10B codings and the parallel-serial conversion for completing data at the same time are laggard
Row transmission；
4th, second of DDC cascade filtering extraction step, functional block diagram are shown in Fig. 3：
4.1 digital mixings correct sub-step；
Mixing frequencies, the digital signal y sent with step 3.3 are produced using the DDS of fpga chipI1(n) and yQ1(n) into
Row mixing, and the frequency offset error of ADC chips generation is effectively corrected by 48 NCO of DDS, while narrow band signal is moved into base
Band, obtains two ways of digital signals yI1' (n) and yQ1'(n)；
4.2 cascade digital filtering extraction sub-steps；
5 times of filtering extractions are carried out first by absolute filter, even symmetry FIR filter is reused and carries out 2 times of extraction filters
Ripple, finally carries out 9 times of filtering extractions using high-performance shaping low pass filter.
The digital signal y produced to step 4.1I1' (n) and yQ1' (n) first order first using accumulator, withdrawal device and subtracts
The efficient filtering processing of musical instruments used in a Buddhist or Taoist mass combination, the state equation of accumulator is y (n)=y (n-1)+x (n), its transfer function isThe state equation of subtracter is y (n)=x (n)-x (n-D) (D is decimation factor), its transfer function is h2
(z)=1-z-D.The absolute filter then combined by 5 grades of accumulators, 5 times of withdrawal devices and 5 grades of subtracters is carried out at filtering extraction
Two ways of digital signals difference y is obtained after reasonI2' (n) and yQ2' (n), wherein Data transfer rate is reduced to 36MHz at the same time, its output spectrum figure is shown in Fig. 4.
Second level even symmetry FIR filter is reused, 2 times of filtering extractions is carried out, data transfer rate is reduced to 18MHz, obtains two
Railway digital signal distinguishes yI3' (n) and yQ3' (n), its output spectrum figure is shown in Fig. 5；
It is low using third level high-performance shaping finally for the intermediate zone of the preceding two stage filter situation inadequate to AF panel
Bandpass filter, low-pass filter and withdrawal device are combined together to input signal yI3' (n) and yQ3' (n) carry out extraction shaping
Filtering, if the shock response of wave filter is h (n), then its Z domain convertsWork as extraction
When the factor is D, the transfer function H (z) of wave filter is represented by：
Order
Then
Finally enter signal yI3' (n) and yQ3' (n) export signal after the meeting by 9 times of filtering extractions of transfer function H (z)
For yI4' (n) and yQ4' (n), while data transfer rate is reduced to 2MHz, its output spectrum figure is shown in Fig. 6.
The filtered output spectrum figure of cascade digital is shown in Fig. 7.
Pulse pressure processing is carried out using the output result of real data, sees Fig. 8, it is identical with theory analysis, it was demonstrated that method
Correctness.
In step of the present invention, alternative scheme is：In step 1.1,1.2, the sample frequency of higher is such as used, also may be used
Realize the bandpass sampling of radiofrequency signal, but have the performance requirement of higher, meeting for ADC chips, fpga chip and data transfer
There is the problem of Project Realization is complicated, difficulty is big and cost is higher.In step 4 in addition to FPGA process chips, it can also use
The factor consideration such as the process chips such as DSP, ASIC, CPU, comprehensive versatility, flexibility, real-time, disposal ability, cost, this hair
Bright middle FPGA process chips are more advantageous.
The beneficial effects of the invention are as follows：Become under the down conversion method of step 2, step 4 radio frequency analog different from the past
Frequency method, analog down is relative complex, and flexibility is not strong, the problems such as aging and parameter drift easily occurs, and simulates filter
Ripple device limited capacity, it is difficult to effectively suppress the same band communication interference that secondary lobe enters.Before radio frequency being simplified using Digital Down Convert
End, the selection to narrow band signal on different operating frequency point can be realized with digital method, has farthest used digital method
Signal is handled, there is more preferable flexibility and performance.
The first order uses the group of multistage accumulator, withdrawal device and subtracter in the cascade digital filtering algorithm of step 4.2
Absolute filter is closed, is adapted to the situation of high sampling rate, its is simple in structure, saving resource, and secondary lobe can be reduced by multilevel design
Level, increases stopband attenuation, reduces aliazing effect；The second level uses even symmetry FIR filter, and operand is greatly decreased, and reduces
Ensure that spectral aliasing will not be introduced in passband while sample rate；Intermediate zone is wider after preceding two-stage filtering extraction, it is difficult to meets narrow
The filtering requirements of band signal, therefore the third level meets passband ripple compared with high-order shaping low pass filter is used under low sampling rate
Filtering demands small, intermediate zone is narrow, Out-of-band rejection is big.If only using one-stage low-pass filter, not only exponent number is very high, Er Qiexing
It can be not easy to meet, it is difficult to which design is realized, the requirement of resource and speed can be not only met by using cascade digital filtering, is realized
Also it is more convenient, and can also meet high performance filtering requirements, method using the present invention, beyond working frequency points ± 5MHz
Rejection ability is not less than 90dB, can achieve the purpose that the same band communication interference for effectively filtering out secondary lobe entrance.
Claims (2)
1. a kind of cascade digital based on pattern-band radio frequency sampling filters anti-Communication Jamming method, it is characterised in that including following step
Suddenly：
Step 1: rf echo signal sampling step, including following sub-step：
1.1 radio frequencies are inputted produces sub-step with sample frequency：By the rf echo signal S of receiving front-end amplification filtering process
(t) ADC chips are inputted, while sample frequency f is produced by full coherent direct synthesizers；Wherein fsIt need to meet fs>=2B and
2fH/(m+1)≤fs≤2fL/ m, m=0,1,2..., fH=f0+B/2,fL=f0- B/2, fHFor the upper cut-off of radar working frequency range
Frequency, fLFor the lower limiting frequency of working frequency range, f0For the IF frequency of working frequency range, B is working band bandwidth, and m is nature
Number；
1.2 analog-to-digital conversion sub-steps：The sample frequency f produced in ADC chips using step 1.1sThe radio-frequency echo wave of input is believed
Number S (t) carries out bandpass sampling, and high frequency analog signals are converted to digital discrete signal；
Step 2: first time DDC filtering extraction step, including following sub-step：
2.1 mixing frequencies produce sub-step：12 NCO of ADC chips are set by frequency tuning word and phase offset word, are produced
Mixing frequencies, frequency tuning word NCO_FTW are：
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Wherein：fcIt is required carrier frequency；Mod () is MOD function；Round () is the function that rounds up；
The actual mixing frequencies f produced according to frequency tuning word NCO_FTWc-actualFor：
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The echo digital signal S (n) that step 1.2 is produced carries out digital mixing processing, thunder with the mixing frequencies that step 2.1 produces
It is expressed as up to the echo-signal S (n) received：
Wherein：A (n) is the amplitude of signal；It is the phase of signal；TsIt is the sampling time；X (n) is the complex envelope of S (n), comprising
The useful information of S (n)；
By S (n) and exp (- 2 π fcnTs) be multiplied, carrier component is removed, becomes zero-frequency, switchs to required baseband signal, it is represented
Form is：
Orthogonal I, Q digital signal of two-way is obtained, wherein I roads signal isQ roads signal is
2.3 digital program-con-trolled exchange sub-steps；
I (n) and Q (n) two-way quadrature digital signal export as y respectively after filtering extractionI1(n) and yQ1(n), then：
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H (n) is the shock response of wave filter, and N is the joint number of wave filter；
Step 3: high speed data transfer step, transmitted between ADC chip datas and process chip data；
Step 4: second of DDC cascade filtering extraction step：
4.1 digital mixings correct sub-step；
Mixing frequencies, the digital signal y sent with step 3.3 are produced using process chipI1(n) and yQ1(n) it is mixed, and is led to
48 NCO for crossing process chip effectively correct the frequency offset error of ADC chips generation, while narrow band signal is moved base band, obtain
To two ways of digital signals yI1' (n) and yQ1'(n)；
4.2 cascade digital filtering extraction sub-steps；
The digital signal y produced to step 4.1I1' (n) and yQ1' (n) first order first uses accumulator, withdrawal device and subtracter
The efficient filtering processing of combination, the state equation of accumulator is y (n)=y (n-1)+x (n), its transfer function isThe state equation of subtracter is decimation factor for y (n)=x (n)-x (n-D), D, its transfer function is h2(z)
=1-z-D；The absolute filter combined by 5 grades of accumulators, 5 times of withdrawal devices and 5 grades of subtracters obtains after carrying out filtering extraction processing
Distinguish y to two ways of digital signalsI2' (n) and yQ2' (n), wherein
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Using second level even symmetry FIR filter, 2 times of filtering extractions are carried out, data transfer rate is reduced to 18MHz, obtains two railway digitals
Signal distinguishes yI3' (n) and yQ3'(n)；
Low-pass filter and withdrawal device are combined together to input signal yI3' (n) and yQ3' (n) carry out extraction shaping filter, if
The shock response of wave filter is h (n), then its Z domain conversion H (z) isWhen decimation factor is D,
The transfer function H (z) of wave filter is represented by：
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Order
Then
Input signal yI3' (n) and yQ3' (n) to export signal after the meeting by 9 times of filtering extractions of transfer function H (z) be yI4'(n)
And yQ4'(n)。
2. the cascade digital according to claim 1 based on pattern-band radio frequency sampling filters anti-Communication Jamming method, its feature
It is：Step 3 comprises the following steps, the 3.1 generation same substeps of group code；3.2 initial channels alignment sub-step；3.3 user data
Transmit sub-step.
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109343109A (en) * | 2018-11-27 | 2019-02-15 | 四川省地震局水库地震研究所 | It is embedded in leading second order pole type seismic data collector |
| CN109917405A (en) * | 2019-03-04 | 2019-06-21 | 中国电子科技集团公司第十一研究所 | A kind of laser distance measurement method and system |
| CN111257838A (en) * | 2020-01-15 | 2020-06-09 | 西安电子科技大学 | Multichannel signal preprocessing method based on broadband receiver |
| CN112636696A (en) * | 2020-12-24 | 2021-04-09 | 中国电子科技集团公司第二十研究所 | Intermediate frequency modulation and demodulation method for digital T/R assembly |
| CN113176543A (en) * | 2021-03-26 | 2021-07-27 | 上海卫星工程研究所 | Radio frequency interference suppression method and system based on multi-dimensional information combination |
| CN114257285A (en) * | 2021-12-13 | 2022-03-29 | 中国电子科技集团公司第十四研究所 | Method and system for filtering perception signal of perception integrated base station |
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2017
- 2017-11-08 CN CN201711090002.4A patent/CN108008359A/en not_active Withdrawn
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109343109A (en) * | 2018-11-27 | 2019-02-15 | 四川省地震局水库地震研究所 | It is embedded in leading second order pole type seismic data collector |
| CN109343109B (en) * | 2018-11-27 | 2024-03-08 | 四川省地震局水库地震研究所 | Embedded dominant second-order pole type seismic data collector |
| CN109917405A (en) * | 2019-03-04 | 2019-06-21 | 中国电子科技集团公司第十一研究所 | A kind of laser distance measurement method and system |
| CN111257838A (en) * | 2020-01-15 | 2020-06-09 | 西安电子科技大学 | Multichannel signal preprocessing method based on broadband receiver |
| CN111257838B (en) * | 2020-01-15 | 2023-02-10 | 西安电子科技大学 | Multichannel signal preprocessing method based on broadband receiver |
| CN112636696A (en) * | 2020-12-24 | 2021-04-09 | 中国电子科技集团公司第二十研究所 | Intermediate frequency modulation and demodulation method for digital T/R assembly |
| CN113176543A (en) * | 2021-03-26 | 2021-07-27 | 上海卫星工程研究所 | Radio frequency interference suppression method and system based on multi-dimensional information combination |
| CN114257285A (en) * | 2021-12-13 | 2022-03-29 | 中国电子科技集团公司第十四研究所 | Method and system for filtering perception signal of perception integrated base station |
| CN114257285B (en) * | 2021-12-13 | 2023-11-21 | 中国电子科技集团公司第十四研究所 | Method and system for filtering sensing signals of general sense integrated base station |
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