CN107994894B - Polysilicon fuse pre-trimming circuit - Google Patents

Polysilicon fuse pre-trimming circuit Download PDF

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CN107994894B
CN107994894B CN201711181539.1A CN201711181539A CN107994894B CN 107994894 B CN107994894 B CN 107994894B CN 201711181539 A CN201711181539 A CN 201711181539A CN 107994894 B CN107994894 B CN 107994894B
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input end
inverter
output end
trimming
fuse
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CN107994894A (en
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杨平
李大刚
岑远军
李永凯
张克林
冯浪
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Chengdu Hua Microelectronics Technology Co ltd
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175Coupling arrangements; Interface arrangements
    • H03K19/017509Interface arrangements

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Fuses (AREA)

Abstract

The invention discloses a polysilicon fuse pre-trimming circuit, relating to an integrated circuit, comprising: the first input end of the selector is connected with the output end of the third inverter, the second input end of the selector is connected with the output end of the first inverter, the first input end of the switching device is connected with the signal input end, the second input end of the switching device is connected with the control signal end, and the output end of the switching device is connected with the grid electrode of the first MOS tube; the current input end of the first MOS tube is connected with a first reference point, and the current output end of the first MOS tube is grounded; the current input end of the first current source unit is connected with a first reference point, and the current output end of the first current source unit is grounded; and a first inverter, a second inverter, a third inverter. The invention completely avoids the influence of packaging stress and ensures the parameter consistency of batch trimming to the maximum extent.

Description

Polysilicon fuse pre-trimming circuit
Technical Field
The invention relates to an integrated circuit, in particular to a 12-bit or more high-precision A/D, D/A converter circuit.
Background
The high-precision A/D converter can convert any analog signal level in the measuring range into a digital code word uniquely corresponding to the analog signal level for output, and the conversion output result can be used as an operation instruction to directly control the whole system to perform corresponding operation.
The high-precision D/A converter can convert any digital input code word in the range into a unique corresponding analog signal for output, and the conversion output result can be used as an operation instruction to directly control the whole system to perform corresponding operation.
From the above, for the high-precision class a/D, D/a converter, the uniqueness of the conversion result will directly affect the operation correctness of the whole system.
In order to ensure the correctness of the operation of the whole system, the whole system usually provides a fault-tolerant mechanism within a certain range, so as to ensure that the whole system can still operate normally when the output result of the a/D, D/a converter fluctuates within a small range.
Therefore, it is required that the functional parameters of the class a/D, D/class a converter are within a certain specified accuracy range when the converter is designed. However, in the batch manufacturing process of chip process manufacturers, due to process fluctuation and process matching accuracy limitations, and uncertainty of package stress during package of the package, it is difficult for the current mainstream process manufacturers to meet the requirements of the a/D, D/a converter with accuracy of more than 12 bits without any calibration measures.
In order to meet the requirements of the application environment of the whole machine, the conversion precision batch consistency of the A/D, D/A converter during batch production needs to be further improved. In order to ensure batch consistency, a single circuit calibration function needs to be realized on the full static parameters of the converter circuit, and the current single circuit calibration means generally comprises two major categories of a chip internal electrical parameter dynamic automatic calibration technology and a laser trimming dynamic calibration during chip testing.
The dynamic automatic calibration technology for the electrical parameters in the chip outputs error values through sampling, and then returns to a signal input end after certain operation, although the final conversion precision can be improved, the scheme needs to add a very complex algorithm scheme, and the precision improvement range is limited, so when the dynamic automatic calibration technology is applied to an ultrahigh-precision converter, the batch consistency is still poor.
The current mainstream schemes of the laser trimming dynamic calibration technology during chip testing are divided into two schemes, namely a metal film resistor trimming scheme and an aluminum fuse trimming scheme. According to the two schemes, single circuit trimming can be realized, and very high parameter precision consistency after batch trimming can be ensured. However, both the trimming schemes for the thin film resistor and the aluminum fuse need to be completed in a bare chip testing stage (the condition allows recalibration before the encapsulation of the tube shell), but no matter the chip encapsulation or the encapsulation of the tube shell, encapsulation stress is introduced, so that the random offset of the resistance and the capacitance in the chip is caused, and a random offset is introduced into a finished circuit, so that certain parameter batch inconsistency still exists in the finished circuits of the two trimming schemes.
Disclosure of Invention
The invention aims to solve the technical problems that in order to ensure the parameter consistency of batch products, the trimming efficiency is improved to the maximum extent and the production cost is saved under the condition of realizing the full parameter trimming of a single circuit.
The technical scheme adopted by the invention for solving the technical problems is that the polycrystalline fuse wire pre-trimming circuit comprises the following parts:
a first input end of the selector S is connected with the output end of the third inverter, a second input end of the selector S is connected with the output end of the first inverter, and the output end of the selector S is used as the output end of the pre-trimming circuit;
a first input end of the switching device M1 is connected with the signal input end VIN, a second input end thereof is connected with the control signal end EN, and an output end thereof is connected with the gate of the first MOS transistor;
the current input end of the first MOS transistor NMOS1 is connected with a first reference point B, and the current output end of the first MOS transistor NMOS1 is grounded;
a first current source unit I1, the current input terminal of which is connected to the first reference point, and the current output terminal of which is grounded;
a first inverter INV1, having an input connected to the first reference point and an output connected to the second input of the selector S;
the input end of the second inverter INV2 is connected with the enable signal input end, and the output end of the second inverter INV2 is connected with the input end of the third inverter;
a third inverter INV3, the input of which is connected to the input of the second inverter, and the output of which is connected to one control end of the selector;
the reference point is a connection point of the fuse connection port, and the other connection point of the fuse connection port is connected with the input end of the power supply end of the system.
The switching device M1 is an and gate, and the control terminal is an input terminal of the and gate.
The invention has the advantages that the technology of the invention can directly carry out parameter trimming aiming at the finished product circuit, completely avoid the influence of packaging stress and ensure the parameter consistency of batch trimming to the maximum extent; after the optimal fusing scheme is obtained through multiple times of pre-fusing operation, real fusing operation is performed, so that the condition of low trimming yield caused by inconsistency between actual control quantity of the fuse and a theoretical value is avoided, and finally, the trimming success rate is improved to the maximum extent while the consistency of batch trimming parameters is ensured.
Drawings
FIG. 1 is a diagram of a poly fuse module.
Fig. 2 is a schematic diagram of the present invention.
Fig. 3 is a circuit diagram of the present invention.
Detailed Description
The invention adopts the trimming scheme of the polycrystalline fuse wire to realize direct trimming of the finished product circuit, thereby avoiding batch inconsistency caused by packaging stress, and simultaneously increasing the pre-trimming function in the trimming unit and improving the trimming yield to the maximum extent.
The pre-trimming circuit for the polycrystalline fuse is characterized by comprising the following parts:
a first input end of the selector S is connected with the output end of the third inverter, a second input end of the selector S is connected with the output end of the first inverter, and the output end of the selector S is used as the output end of the pre-trimming circuit;
a first input end of the switching device M1 is connected with the signal input end VIN, a second input end thereof is connected with the control signal end EN, and an output end thereof is connected with the gate of the first MOS transistor;
the current input end of the first MOS transistor NMOS1 is connected with a first reference point B, and the current output end of the first MOS transistor NMOS1 is grounded;
a first current source unit I1, the current input terminal of which is connected to the first reference point, and the current output terminal of which is grounded;
a first inverter INV1, having an input connected to the first reference point and an output connected to the second input of the selector S;
the input end of the second inverter INV2 is connected with the enable signal input end, and the output end of the second inverter INV2 is connected with the input end of the third inverter;
a third inverter INV3, the input of which is connected to the input of the second inverter, and the output of which is connected to one control end of the selector;
the reference point is a connection point of the fuse connection port, and the other connection point of the fuse connection port is connected with the input end of the power supply end of the system.
The reference point is a connection point of the fuse connection port, and the other connection point of the fuse connection port is connected with the input end of the power supply end of the system.
The switching device M1 is an and gate, and the control terminal is an input terminal of the and gate.
The invention is characterized in that the polycrystalline fuse unit adopts the external port of the finished product circuit to be directly connected with the power supply voltage to carry out the fuse fusing operation;
all fuses in the circuit can realize pre-fusing operation;
after the pre-fusing operation, the finished product circuit can output a calibrated electrical parameter result corresponding to the real fusing operation according to the pre-fusing operation scheme;
according to the circuit parameter calibration result after pre-fusing, the pre-fusing operation can be repeatedly carried out;
after multiple pre-fusing calibrations, when the final fuse trimming scheme is determined, real fuse fusing operation is performed.
As shown in fig. 1, when the voltage applied across A, B is less than the blowing threshold voltage, the fuse is not blown, and at this time, both ends A, B are in a short-circuit state, and when the voltage across A, B is greater than the blowing threshold voltage, the fuse is blown, and at this time, both ends A, B are in an open-circuit state.
If the A end of the fuse module is connected with the power supply and the B end is used as a logic output port, when the fuse trimming circuit structure is reasonably arranged, the logic output port can output logic high level (or low level) before the polycrystalline fuse module is fused, and the logic output port can output logic low level (or high level) after the polycrystalline fuse module is effectively fused.
Based on the working principle of the fuse module, the schematic diagram of the fuse calibration circuit adopted by the invention is shown in fig. 2:
when VIN is at logic low level, the fuse wire is not fused, at this time, the point B outputs logic high level, and the OUT end outputs logic low level; when VIN is at a logic high level, the fuse is blown, the point B outputs a logic low level, and the OUT terminal outputs a logic high level. Therefore, the parameter trimming function can be realized only by taking the OUT terminal as a parameter trimming logic control signal.
However, in the actual operation process, the real trimming amount of the fuse is often greatly different from the theoretical value, and the fuse blowing process shown in fig. 2 is irreversible, and if a trimming error occurs in one fuse, the whole circuit is rejected, so when a single circuit has a very large number of fuses (for example, more than 100), the trimming yield shown in fig. 2 is very low.
In order to improve the trimming yield, on the basis of fig. 2, the invention continues to add the pre-trimming function, and the specific circuit schematic diagram is shown in fig. 3:
when the fuse enable terminal EN is at a low level, no matter VIN is at a logic high level or at a low level, the fuse is not blown, and the output alternative switch S constantly selects the pre-blowing path L1 to be open with the true blowing path L2, and at this time, the logic of the OUT terminal is the same as VIN, that is, the pre-blowing operation is realized.
When the fuse enable terminal EN is at a high level, VIN normally controls the blowing operation of the fuse and the output either-or switch S is enabled to constantly select the true blowing path L2, and the schematic circuit diagram of fig. 3 is equivalent to that shown in fig. 2, i.e. this operation realizes the true blowing operation.
In summary, if the poly fuse calibration circuit with the pre-fuse function of the present invention is adopted, as shown in fig. 3, it is only necessary to keep the enable terminal EN at a logic low level all the time in the pre-fuse stage, and thus, the theoretical control logic after fuse is fused can be obtained at the output terminal and used as the parameter trimming logic control signal, so as to achieve the parameter pre-trimming function. And readjusting the pre-trimming scheme according to the parameter trimming result, and repeating the pre-trimming process until the final optimal trimming scheme is determined. When the optimal trimming scheme is determined, only the enable terminal EN needs to be set to be at a logic high level, and then the true fusing operation is carried out.
Therefore, the invention can realize the full-parameter adjustable function of a single circuit, avoid the inconsistency of batch parameters caused by packaging stress, improve the rate of finished products of adjustment to the maximum extent and save the production cost.

Claims (2)

1. The pre-trimming circuit for the polycrystalline fuse is characterized by comprising the following parts:
the first input end of the selector is connected with the output end of the third inverter, the second input end of the selector is connected with the output end of the first inverter, and the output end of the selector is used as the output end of the pre-trimming circuit;
the first input end of the switch device is connected with the signal input end, the second input end of the switch device is connected with the control signal end, and the output end of the switch device is connected with the grid electrode of the first MOS tube;
the current input end of the first MOS tube is connected with a first reference point, and the current output end of the first MOS tube is grounded;
the current input end of the first current source unit is connected with a first reference point, and the current output end of the first current source unit is grounded;
the input end of the first inverter is connected with the first reference point, and the output end of the first inverter is connected with the second input end of the selector;
the input end of the second inverter is connected with the enable signal input end, and the output end of the second inverter is connected with the input end of the third inverter;
the input end of the third inverter is connected with the input end of the second inverter, and the output end of the third inverter is connected with one control end of the selector;
the reference point is a connection point of the fuse connection port, and the other connection point of the fuse connection port is connected with the input end of the power supply end of the system;
the switching device is an AND gate, and the control end is an input end of the AND gate.
2. The poly fuse trimming circuit of claim 1, wherein the switching device is an and gate and the control terminal is an input terminal of the and gate.
CN201711181539.1A 2017-11-23 2017-11-23 Polysilicon fuse pre-trimming circuit Active CN107994894B (en)

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Publication number Priority date Publication date Assignee Title
CN108649957B (en) * 2018-05-11 2022-04-15 成都华微电子科技股份有限公司 Normalized bridging capacitance conversion circuit with calibration
CN108649949B (en) * 2018-05-11 2022-04-12 成都华微电子科技股份有限公司 High-precision converter
CN112702055B (en) * 2021-03-23 2021-06-15 泉芯电子技术(深圳)有限公司 Chip peripheral anti-fuse pre-trimming circuit and trimming method thereof
CN114256812B (en) * 2022-02-08 2022-11-01 深圳市创芯微微电子有限公司 Battery protection circuit and trimming circuit

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101740566A (en) * 2009-12-21 2010-06-16 西安电子科技大学 Current fusing-based polycrystalline fuse circuit
CN102520332A (en) * 2011-12-15 2012-06-27 无锡中星微电子有限公司 Wafer testing device and method for the same
CN103825601A (en) * 2012-11-15 2014-05-28 东莞赛微微电子有限公司 Fuse trimming and adjusting circuit
CN105912059A (en) * 2016-05-23 2016-08-31 深圳创维-Rgb电子有限公司 Reference voltage regulating circuit and system of integrated circuit
CN106057783A (en) * 2016-05-27 2016-10-26 上海路虹电子科技有限公司 Fuse circuit
CN106128508A (en) * 2016-06-22 2016-11-16 西安电子科技大学 IC parameter one-time programmable fuse trimming circuit

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8179189B2 (en) * 2010-03-11 2012-05-15 Himax Analogic, Inc. Trimming circuit
CN105575436B (en) * 2016-02-23 2023-06-23 中国科学院半导体研究所 Programmable control poly fuse circuit and integrated circuit comprising same
CN105915209B (en) * 2016-05-17 2018-09-18 中国电子科技集团公司第二十四研究所 A kind of multifunctional low power consumption fuse trims control circuit and its control method
CN106209069B (en) * 2016-06-30 2019-01-15 西安交通大学 A kind of super low-power consumption numerical model analysis integrates fuse and trims circuit and fuse method for repairing and regulating
CN107169219A (en) * 2017-05-26 2017-09-15 北京伽略电子股份有限公司 A kind of fuse of high flexibility ratio trims circuit and its application method

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101740566A (en) * 2009-12-21 2010-06-16 西安电子科技大学 Current fusing-based polycrystalline fuse circuit
CN102520332A (en) * 2011-12-15 2012-06-27 无锡中星微电子有限公司 Wafer testing device and method for the same
CN103825601A (en) * 2012-11-15 2014-05-28 东莞赛微微电子有限公司 Fuse trimming and adjusting circuit
CN203675091U (en) * 2012-11-15 2014-06-25 东莞赛微微电子有限公司 Fuse wire trimming circuit
CN105912059A (en) * 2016-05-23 2016-08-31 深圳创维-Rgb电子有限公司 Reference voltage regulating circuit and system of integrated circuit
CN106057783A (en) * 2016-05-27 2016-10-26 上海路虹电子科技有限公司 Fuse circuit
CN106128508A (en) * 2016-06-22 2016-11-16 西安电子科技大学 IC parameter one-time programmable fuse trimming circuit

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
"一款高性能开关电源芯片的修调方案分析与设计";王欢;《中国优秀硕士学位论文全文数据库•信息科技辑》;20160315;第2016年卷(第3期);I136-325 *
"一种基于标准工艺的熔丝修调电路设计";王欢等;《微电子学》;20140820;第44卷(第4期);第503-506页 *
"圆片测试中的熔丝修调方法研究";高剑等;《电子测量技术》;20160630;第39卷(第6期);第15-19页 *

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