CN107979356B - Voltage controlled oscillator circuit - Google Patents
Voltage controlled oscillator circuit Download PDFInfo
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- CN107979356B CN107979356B CN201711394141.6A CN201711394141A CN107979356B CN 107979356 B CN107979356 B CN 107979356B CN 201711394141 A CN201711394141 A CN 201711394141A CN 107979356 B CN107979356 B CN 107979356B
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
- H03K3/03—Astable circuits
- H03K3/0315—Ring oscillators
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/01—Details
- H03K3/013—Modifications of generator to prevent operation by noise or interference
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
- H03L7/0995—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator comprising a ring oscillator
Abstract
The invention discloses a voltage-controlled oscillator circuit, comprising: the voltage-to-current module is used for converting the voltage-controlled voltage VC output by the PLL low-pass filter into current related to the voltage-controlled voltage VC; the voltage-controlled oscillator is used for changing the frequency of the output signal under the control of the current generated by the voltage-to-current module.
Description
Technical Field
The present invention relates to a voltage controlled oscillator circuit, and more particularly, to a novel voltage controlled oscillator circuit for use in a Phase Locked Loop (PLL).
Background
In a phase-locked loop (PLL) design, a Voltage Controlled Oscillator (VCO) is one of the core modules. Taking a charge pump type PLL as an example, in operation, the charge pump converts the output of the phase detector into a pulse current, and the pulse current is converted into a direct current voltage VC through a low pass filter to be used as a voltage control signal of the voltage controlled oscillator. Thus, for a voltage controlled oscillator, VC is used as its input and frequency is used as its output, while its oscillation frequency directly determines the frequency range in which the PLL can operate.
The commonly used voltage-controlled oscillator mainly comprises a ring oscillator formed by cascading a plurality of single-ended or differential inverters, and the oscillation frequency of the ring oscillator is changed by changing the equivalent resistance or the equivalent capacitance of the output end of the inverter through controlling the voltage VC.
Fig. 1 is a schematic diagram of a conventional voltage-controlled oscillator in the prior art. A ring oscillator is formed by an odd number of inverters, and a PMOS tube controlled by the output voltage VC of the filter provides driving for the ring oscillator. VC is different, the current capability provided by the PMOS tube to the ring oscillator is also different, and therefore different oscillation frequency outputs are obtained.
In the prior art, the ring oscillator directly controlled by the VC shows any noise interference on the VC in frequency, namely, the noise suppression capability is weak; secondly, when the use range of VC is limited, and the current provided by PMOS is nonlinear with VC voltage, the PLL is easy to generate jitter on the output of PLL when the frequency of PLL changes.
Disclosure of Invention
In order to overcome the above-mentioned deficiencies of the prior art, an object of the present invention is to provide a voltage controlled oscillator circuit, which effectively increases the application range of the voltage controlled voltage VC and can suppress the high frequency noise interference on the voltage controlled voltage VC.
To achieve the above and other objects, the present invention provides a voltage controlled oscillator circuit, comprising:
the voltage-to-current module is used for converting the voltage-controlled voltage VC output by the PLL low-pass filter into current related to the voltage-controlled voltage VC;
and the voltage-controlled oscillator is used for changing the frequency of the output signal under the control of the current generated by the voltage-to-current conversion module.
Further, the voltage-to-current module comprises:
the first current mirror is used for generating a fixed source current bias I0 to be output outwards so as to adjust the controlled range of the voltage-controlled oscillator;
the voltage-current conversion unit is used for converting the voltage-controlled voltage VC into a linear sink current I1;
the second current mirror is used for converting the linear sinking current I1 into a source current I1 to be output outwards;
the third current mirror combines the fixed source current bias I0 and the source current I1 output by the first current mirror and the second current mirror to generate a sink current I2;
and the fourth current mirror is used for converting the sink current I2 generated by the third current mirror into a source current I2 and outputting the source current I2 to the voltage-controlled oscillator.
Further, the first current mirror comprises a reference current source Iref0, a first PMOS tube and a second PMOS tube, the source electrodes of the first PMOS tube and the second PMOS tube are connected to a power supply voltage, the grid electrode and the drain electrode of the first PMOS tube are in short circuit and are connected with one end of a reference current source Iref0 and the grid electrode of the second PMOS tube, the other end of the reference current source Iref0 is grounded, and the drain electrode of the second PMOS tube is connected to the second current mirror and the third current mirror.
Furthermore, the voltage-current conversion unit comprises a first NMOS transistor and a first resistor, a drain of the first NMOS transistor is connected to the second current mirror, a gate of the first NMOS transistor is connected to the voltage-controlled voltage VC, a source of the first NMOS transistor is connected to one end of the first resistor to form a node VB, and the other end of the first resistor is grounded.
Furthermore, the second current mirror comprises a third PMOS tube and a fourth PMOS tube, the source electrodes of the third PMOS tube and the fourth PMOS tube are connected with power supply voltage, the grid electrode and the drain electrode of the third PMOS tube are in short circuit connection and are connected with the drain electrode of the first NMOS tube and the grid electrode of the fourth PMOS tube, and the drain electrode of the fourth PMOS tube is connected with the drain electrode of the second PMOS tube and the third current mirror.
Furthermore, the third current mirror comprises a second resistor, a second NMOS transistor and a third NMOS transistor, drain electrodes of the second PMOS transistor and the fourth PMOS transistor are connected to one end of the second resistor, a source electrode of the second NMOS transistor and a source electrode of the third NMOS transistor are grounded, a gate electrode and a drain electrode of the second NMOS transistor are in short circuit and connected to a gate electrode of the third NMOS transistor, and a drain electrode of the third NMOS transistor is connected to the fourth current mirror.
Furthermore, the fourth current mirror comprises a fifth PMOS tube and a sixth PMOS tube, the source electrodes of the fifth PMOS tube and the sixth PMOS tube are connected with power voltage, the grid electrode and the drain electrode of the fifth PMOS tube are in short circuit and are connected with the grid electrode of the sixth PMOS tube and the drain electrode of the third NMOS tube, and the drain electrode of the sixth PMOS tube is connected to the voltage-controlled oscillator.
Further, the voltage-controlled oscillator is a current-driven ring oscillator.
Furthermore, the voltage-controlled oscillator comprises an odd number of inverters connected to each other at the head, and the current output by the voltage-to-current module is connected to the current control end of each inverter.
Further, the voltage-controlled oscillator comprises an odd number of inverters connected to each other at the head, and the drain of the sixth PMOS transistor is connected to the current control end of each inverter.
Compared with the prior art, the voltage-controlled oscillator circuit converts the voltage-controlled voltage VC output by the PLL low-pass filter into the current related to the voltage-controlled voltage VC by using the voltage-to-current module, and then controls the working frequency of the current-driven type ring oscillator by using the current, so that the ring oscillator is not directly controlled by the voltage-controlled voltage VC any more, the use range of the voltage-controlled voltage VC is effectively enlarged, and meanwhile, the high-frequency noise interference on the voltage-controlled voltage VC can be inhibited.
Drawings
Fig. 1 is a schematic diagram of a conventional voltage-controlled oscillator in the prior art;
FIG. 2 is a circuit diagram of a VCO circuit according to the present invention;
FIGS. 3(a) and (b) are graphs showing the variation of the current and the oscillation frequency with the voltage-controlled voltage VC according to the embodiment of the present invention;
fig. 4 is a circuit diagram of a PLL to which the voltage controlled oscillator circuit of the present invention is applied.
Detailed Description
Other advantages and capabilities of the present invention will be readily apparent to those skilled in the art from the present disclosure by describing the embodiments of the present invention with specific embodiments thereof in conjunction with the accompanying drawings. The invention is capable of other and different embodiments and its several details are capable of modification in various other respects, all without departing from the spirit and scope of the present invention.
Fig. 2 is a circuit diagram of a voltage-controlled oscillator circuit according to the present invention. As shown in fig. 2, a voltage controlled oscillator circuit of the present invention includes: a voltage-to-current module 10 and a voltage-controlled oscillator 20.
The voltage-to-current module 10 is configured to convert the voltage-controlled voltage VC output by the PLL low-pass filter into a current related to the voltage-controlled voltage VC; a voltage controlled oscillator 20 for varying the frequency of the output signal under control of the current generated by the voltage to current module 10.
Specifically, the voltage-to-current module 10 includes: a first current mirror 101, a voltage-current conversion unit 102, a second current mirror 103, a third current mirror 104, and a fourth current mirror 105.
The first current mirror 101 consists of a reference current Source Iref0, a first PMOS transistor PM1 and a second PMOS transistor PM2, and is used for generating a fixed Source current (Source) bias I0 to be output outwards so as to adjust the controlled range of the voltage-controlled oscillator; the voltage-current converting unit 102 is composed of a first NMOS transistor NM1 and a first resistor R1, and is configured to convert a voltage-controlled voltage VC into a linear Sink current (Sink) I1; the second current mirror 103 consists of a third PMOS tube PM3 and a fourth PMOS tube PM4 and is used for converting a linear Sink current (Sink) I1 into a Source current (Source) I1 to be output outwards; the third current mirror 104 consists of a second resistor R2, a second NMOS transistor NM2 and a third NMOS transistor NM3, and is configured to combine a fixed Source current (Source) bias I0 and a Source current (Source) I1 output by the first current mirror 101 and the second current mirror 103 to generate a Sink current (Sink) I2; the fourth current mirror 105 is composed of a fifth PMOS transistor PM5 and a sixth PMOS transistor PM6, and is configured to convert a Sink current (Sink) I2 generated by the third current mirror 104 into a Source current (Source) to be output outwards; the voltage controlled oscillator 20, which is a current-driven ring oscillator, is composed of an odd number of inverters INV0, INV1, … …, and INV (2K +1), and changes the frequency of an output signal under the control of a Source current (Source) generated by the fourth current mirror 105.
The sources of the first, second, third, fourth, fifth and sixth PMOS transistors PM1, PM2, PM3, PM4, PM6 are all connected to the power supply VDD, the gate and drain of the first PMOS transistor PM1 are shorted and connected to one end (input end) of the reference current source Iref0 and the gate of the second PMOS transistor PM2, the other end of the reference current source Iref0 is grounded, the gate and drain of the third PMOS transistor PM3 are shorted and connected to the drain of the first NMOS transistor NM1 and the gate of the fourth PMOS transistor PM4, the gate of the first NMOS transistor NM1 is connected to the voltage-controlled voltage VC, the source of the first NMOS transistor NM1 is connected to one end of the first resistor R1 to form the node VB, the other end of the first resistor R9 is grounded, the drain of the second PMOS transistor PM2 is connected to the drain of the fourth PMOS transistor PM4 and one end of the second resistor R2, the drain of the second PMOS transistor NM2 is connected to the gate of the third PMOS transistor PM 868627 and the drain of the second NMOS transistor PM 86867 are shorted and the drain of the NMOS transistor 368658, the grid electrode and the drain electrode of the fifth PMOS transistor PM5 are shorted and connected to the grid electrode of the sixth PMOS transistor PM6 and the drain electrode of the third NMOS transistor NM3, the drain electrode of the sixth PMOS transistor PM6 is connected to the current control end of the inverters INV1, INV2, … … and INV (2K +1), the inputs and outputs of the inverters INV1, INV2, … … and INV (2K +1) are sequentially connected end to end, that is, the output end of the inverter INV (i) is connected to the input end of the inverter INV (i +1), i is 1,2, … and 2K, the output end of the inverter INV (2K +1) is connected to the input end of the inverter INV1, and a frequency-controlled signal is output from the output end of the inverter INV (2K + 1).
When the circuit works, the voltage-to-current module 10 (the first current mirror 101, the voltage-to-current conversion unit 102, the second current mirror 103, the third current mirror 104, and the fourth current mirror 105) converts the voltage-controlled voltage VC output by the PLL low-pass filter into a current I2 related thereto, and then controls the operating frequency of the current-driven ring oscillator by using the current, so that the ring oscillator is no longer directly controlled by the voltage-controlled voltage VC, thereby avoiding the influence of high-frequency noise possibly existing on VC on the output frequency of the oscillator, and meanwhile, due to the effect of the special structure of the voltage-to-current module 10, when the voltage-controlled voltage VC is very small, the current controlling the oscillator is not 0, thereby increasing the operable range of the ring oscillator and indirectly increasing the usable range of VC.
In the specific embodiment of the present invention, the mirror ratio of all the current mirrors is 1: 1, the practical use is not limited to 1: 1 mirror image, firstly, for a current-driven ring oscillator, since the oscillation frequency f is α I/CV, where α is a proportionality coefficient, I is a driving current, C is an inverter output equivalent capacitance, and V is an inverter output amplitude. It can be seen that the oscillation frequency is proportional to the drive current and that the range of current is determined for a given frequency requirement.
Then, for the voltage-to-current module 10 (in the normal operation of the circuit, when the voltage-controlled voltage VC < < Vthn (the threshold voltage of the first NMOS transistor NM 1), the first NMOS transistor NM1 is in the cut-off region, VB is 0, the current flowing through the first resistor R1 is 0, as VC increases, the first NMOS transistor NM1 is gradually turned on, VB increases as the voltage-controlled voltage VC increases, and the current I1 also gradually increases, when the voltage-controlled voltage VC is greater than Vthn, NM1 acts as a source follower, where VB equals VC-Vthn, so that the current I1 VB/R0. generated at the first resistor R1 is also I1. due to the mirroring effect of the PMOS transistors PM3-PM4 of the second current mirror 103, the current flowing through the fourth PMOS transistor PM4 is also I1., on the other hand, the current flowing through the PMOS transistors PM 4684 of the first current mirror 1-PM 3984 to the reference current source Iref I4642 is also equal to the first current I4624, and the current flowing through the second PMOS transistor R0 is also equal to the second current 465, the current flowing through the second resistor R2 is I2 ═ I0+ I1 ═ I0+ (VC-Vthn)/R0
The simulation curve is shown in fig. 3. As can be seen from the figure, when the voltage VC is less than Vthn (about 500mV), the current I1 is very small and is nonlinear with the control voltage VC, and when VC is near Vthn, the I1 is linear with VC but the absolute value is too small (by reducing R0, the absolute value of I1 at this time can be increased, but when VC is large, the current is too large, the frequency exceeds the use range, and thus the use range of VC is wasted), and the requirement of the later current-driven ring oscillator cannot be met; when VC is greater than Vthn, I1 may better maintain a linear relationship with VC. The current I2 is obtained by superposing a fixed bias current I0 on the basis of I1, and the size of I0 is adjusted, so that the ring oscillator can work well in all linear ranges of I2, and the linear range of the frequency is reduced from about 800mV (VC) to 500mV (VC), thereby effectively enlarging the actual use range of VC.
A PLL circuit structure including the voltage controlled oscillator circuit of the present invention is shown in fig. 4. NDivider, MDivider and ODIvider are a reference frequency divider, a phase detection frequency divider and an output frequency divider, PFD is a phase detection frequency divider, CP is a charge pump, LPF is a filter, and VCO is a voltage controlled oscillator. VC in the invention is voltage-controlled voltage output by the low pass filter LPF, and the output is oscillation square wave signal of VCO.
In summary, the voltage-controlled oscillator circuit of the present invention utilizes the voltage-to-current conversion module to convert the voltage-controlled voltage VC output by the PLL low-pass filter into a current related to the voltage-controlled voltage VC, and then utilizes the current to control the operating frequency of the current-driven ring oscillator, so that the ring oscillator is no longer directly controlled by the voltage-controlled voltage VC, the application range of the voltage-controlled voltage VC is effectively extended, and the high-frequency noise interference on the voltage-controlled voltage VC can be suppressed.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Modifications and variations can be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of the present invention. Therefore, the scope of the invention should be determined from the following claims.
Claims (9)
1. A voltage controlled oscillator circuit comprising:
the voltage-to-current module is used for converting the voltage-controlled voltage VC output by the PLL low-pass filter into current related to the voltage-controlled voltage VC;
the voltage-controlled oscillator is used for changing the frequency of an output signal under the control of the current generated by the voltage-to-current conversion module;
the voltage-to-current module comprises:
the first current mirror is used for generating a fixed source current bias I0 to be output outwards so as to adjust the controlled range of the voltage-controlled oscillator;
the voltage-current conversion unit is used for converting the voltage-controlled voltage VC into a linear sink current I1;
the second current mirror is used for converting the linear sinking current I1 into a source current I1 to be output outwards;
the third current mirror combines the fixed source current bias I0 and the source current I1 output by the first current mirror and the second current mirror to generate a sink current I2;
and the fourth current mirror is used for converting the sink current I2 generated by the third current mirror into a source current I2 and outputting the source current I2 to the voltage-controlled oscillator.
2. The voltage-controlled oscillator circuit as claimed in claim 1, wherein the first current mirror comprises a reference current source Iref0, a first PMOS transistor and a second PMOS transistor, the sources of the first PMOS transistor and the second PMOS transistor are connected to the power voltage, the gate and the drain of the first PMOS transistor are shorted and connected to one end of the reference current source Iref0 and the gate of the second PMOS transistor, the other end of the reference current source Iref0 is grounded, and the drain of the second PMOS transistor is connected to the second current mirror and the third current mirror.
3. A voltage controlled oscillator circuit as claimed in claim 2, wherein: the voltage and current conversion unit comprises a first NMOS tube and a first resistor, the drain electrode of the first NMOS tube is connected with the second current mirror, the grid electrode of the first NMOS tube is connected with the voltage-controlled voltage VC, the source electrode of the first NMOS tube is connected with one end of the first resistor to form a node VB, and the other end of the first resistor is grounded.
4. A voltage controlled oscillator circuit as claimed in claim 3, wherein: the second current mirror comprises a third PMOS tube and a fourth PMOS tube, the source electrodes of the third PMOS tube and the fourth PMOS tube are connected with power voltage, the grid electrode and the drain electrode of the third PMOS tube are in short circuit and are connected with the drain electrode of the first NMOS tube and the grid electrode of the fourth PMOS tube, and the drain electrode of the fourth PMOS tube is connected with the drain electrode of the second PMOS tube and the third current mirror.
5. A voltage controlled oscillator circuit as claimed in claim 4, wherein: the third current mirror comprises a second resistor, a second NMOS tube and a third NMOS tube, drain electrodes of the second PMOS tube and the fourth PMOS tube are connected with one end of the second resistor, a source electrode of the second NMOS tube and a source electrode of the third NMOS tube are grounded, a grid electrode and a drain electrode of the second NMOS tube are in short circuit and are connected with a grid electrode of the third NMOS tube, and a drain electrode of the third NMOS tube is connected with the fourth current mirror.
6. A voltage controlled oscillator circuit as claimed in claim 5, wherein: the fourth current mirror comprises a fifth PMOS tube and a sixth PMOS tube, the source electrodes of the fifth PMOS tube and the sixth PMOS tube are connected with power voltage, the grid electrode and the drain electrode of the fifth PMOS tube are in short circuit and are connected with the grid electrode of the sixth PMOS tube and the drain electrode of the third NMOS tube, and the drain electrode of the sixth PMOS tube is connected to the voltage-controlled oscillator.
7. A voltage controlled oscillator circuit as claimed in claim 1, wherein: the voltage-controlled oscillator is a current-driven ring oscillator.
8. A voltage controlled oscillator circuit as claimed in claim 7, wherein: the voltage-controlled oscillator comprises an odd number of inverters connected end to end, and the current output by the voltage-to-current module is connected to the current control end of each inverter.
9. A voltage controlled oscillator circuit as claimed in claim 6, wherein: the voltage-controlled oscillator comprises an odd number of inverters connected end to end, and the drain electrode of the sixth PMOS tube is connected to the current control end of each inverter.
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| CN201711394141.6A CN107979356B (en) | 2017-12-21 | 2017-12-21 | Voltage controlled oscillator circuit |
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| CN201711394141.6A CN107979356B (en) | 2017-12-21 | 2017-12-21 | Voltage controlled oscillator circuit |
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| CN108964659B (en) * | 2018-07-19 | 2022-04-05 | 重庆湃芯入微科技有限公司 | Stability compensation and impedance transformation circuit of oscillator frequency regulation loop |
| CN109714026B (en) * | 2019-01-22 | 2023-07-07 | 上海华虹宏力半导体制造有限公司 | Frequency oscillator with output frequency linearly changing along with power supply voltage |
| CN110572151B (en) * | 2019-09-12 | 2023-06-30 | 辰芯科技有限公司 | Phase-locked loop circuit |
| CN112752378B (en) * | 2019-10-29 | 2023-01-20 | 华润微集成电路(无锡)有限公司 | Silicon controlled rectifier dimming circuit |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JPH1084278A (en) * | 1996-09-10 | 1998-03-31 | Nec Corp | Pll circuit |
| US5831486A (en) * | 1997-09-04 | 1998-11-03 | Integrated Device Technology, Inc. | Extended range current controlled oscillator |
| US6621360B1 (en) * | 2002-01-22 | 2003-09-16 | Pmc-Sierra, Inc. | Extended frequency range voltage-controlled oscillator |
| US20070159264A1 (en) * | 2006-01-10 | 2007-07-12 | Samsung Electronics Co., Ltd. | Phase-locked loop with adaptive bandwidth |
| US7474130B1 (en) * | 2007-02-06 | 2009-01-06 | Iwatt Inc. | Compensation of voltage-to-current converter |
| JP2011205202A (en) * | 2010-03-24 | 2011-10-13 | Toshiba Corp | Voltage-current converter circuit and pll circuit having the same |
| CN102035547A (en) * | 2010-12-06 | 2011-04-27 | 上海集成电路研发中心有限公司 | Voltage-to-current converter |
| CN202663357U (en) * | 2012-07-06 | 2013-01-09 | 汉凌微电子（上海）有限公司 | Biasing circuit of voltage-controlled oscillator |
| CN103475366B (en) * | 2013-09-26 | 2016-11-16 | 昆山锐芯微电子有限公司 | Voltage controlled oscillator |
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