CN107968055A - 半导体装置的封装方法 - Google Patents

半导体装置的封装方法 Download PDF

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CN107968055A
CN107968055A CN201710131409.0A CN201710131409A CN107968055A CN 107968055 A CN107968055 A CN 107968055A CN 201710131409 A CN201710131409 A CN 201710131409A CN 107968055 A CN107968055 A CN 107968055A
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insulating layer
semiconductor device
packing
layer
metal
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CN107968055B (zh
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许晓凤
林平平
黎耀威
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Delta Electronics International Singapore Pte Ltd
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Abstract

半导体装置的封装方法包括步骤：提供第一绝缘层，其由预浸材叠层所构成；于第一绝缘层的第一表面形成金属保护层；于第一绝缘层上形成第一对位标识；依据第一对位标识，于第一绝缘层中形成容置腔；于第一绝缘层的第二表面形成第二对位标识；利用热分离胶带将载板贴附于第一绝缘层的第一表面；依据第二对位标识，将半导体装置设置于容置腔内，且以热分离胶带暂时固定半导体装置；于第一绝缘层的第二表面上方设置第二绝缘层，且将第二绝缘层进行压合及固化；移除载板及热分离胶带；以及于第二绝缘层上形成重布线层，其与该半导体装置电连接。

Description

半导体装置的封装方法
技术领域
本公开涉及一种封装方法，特别涉及一种电子组件的封装方法。
背景技术
近年来，电子装置设计朝向小尺寸、轻薄及易于携带的趋势发展。再者，随着电子工业技术的日益进步，电子装置的内部电路已逐渐朝向模块化发展，换言之，多个电子组件是整合在单一电子模块中。举例而言，电源模块(power module)为广泛使用的电子模块之一，电源模块可包括例如但不限于直流-直流转换器(DC to DC converter)、直流-交流转换器(DC to AC converter)或交流-直流转换器(AC to DC converter)。于多个电子组件(例如电容器、电阻器、电感器、变压器、二极管及晶体管)整合为电源模块之后，电源模块便可安装于主板或系统电路板上。
目前，嵌入式封装结构因具有例如较小覆盖区域(smaller footprint)、较扁平(lower profile)、较高电源密度及效能(higher power density and performance)、较佳热管理(better thermal management)、较低电源噪声(lower electrical noise)以及易于大规模生产制造等诸多优点而广泛地被应用。
然而传统嵌入式封装结构，例如美国专利证号US8461689所公开的嵌入式封装结构，为了使电子组件可精准地嵌埋于基板中，需于基板的其中的一表面上形成金属框，该金属框位于基板上用来供电子组件嵌埋的开口处的周缘，因此可利用金属框来控制激光烧灼的孔形。然而由上可知，由于传统嵌入式封装结构需额外于基板的表面上形成金属框，故导致传统嵌入式封装结构的生产成本较高。
另外，传统嵌入式封装结构在设置电子组件于基板的开口时，电子组件是通过导电胶(例如银胶)或非导电胶贴附于基板上，也造成生产成本提升。
因此，实有必要提供改良的电子组件的封装方法，以解决现有技术所面临的问题。
发明内容
本公开的目的在于提供一种半导体装置的封装方法，俾解决传统嵌入式封装结构生产成本较高的缺失。
为达上述目的，本公开提供一种电子组件的封装方法，包括步骤：提供一第一绝缘层，其由预浸材叠层所构成；于该第一绝缘层的一第一表面形成一金属保护层；于该第一绝缘层上形成一第一对位标识；依据该第一对位标识，于该第一绝缘层中形成一容置腔；于该第一绝缘层的一第二表面形成一第二对位标识；利用一热分离胶带将一载板贴附于该第一绝缘层的该第一表面；依据该第二对位标识，将该半导体装置设置于该容置腔内，且以该热分离胶带暂时固定该半导体装置；于该第一绝缘层的该第二表面上方设置半固化的一第二绝缘层，且将该第二绝缘层进行压合及固化；移除该载板及该热分离胶带；以及于该第二绝缘层上形成一重布线层，其与该半导体装置电连接。
附图说明
图1A至图1N显示本公开较佳实施例的电子组件的封装方法的结构流程图。
图2为本公开较佳实施例的电子组件的封装方法于图1G所示的步骤完成时，电子组件的半成品封装结构的俯视图。
附图标记说明：
1：第一绝缘层
10：预浸材片
11：第一表面
12：第二表面
2：金属保护层
3：第一对位标识
4：电子组件
40：导接端
5：容置腔
6：第二对位标识
7：热分离胶带
8：载板
9：第一胶带
13：第二绝缘层
14：第二胶带
15：第三绝缘层
16：通孔
17：导电金属层
18：第四绝缘层
19：导电图形
20：十字形对位标识
31：贯穿孔
A：半封装结构
B：封装结构
具体实施方式
体现本公开特征与优点的一些典型实施例将在后段的说明中详细叙述。应理解的是本公开能够在不同的实施方式上具有各种的变化，其皆不脱离本公开的范围，且其中的说明及图示在本质上是当作的对其进行说明用，而非架构于限制本公开。
本公开的封装方法实际上可封装一个电子组件或多个电子组件，而以下将示范性地说明本公开对于一个电子组件的封装方法。图1A至图1N是显示本公开较佳实施例的电子组件的封装方法的结构流程图，图2为使用本公开较佳实施例的电子组件的封装方法中的图1G所示的步骤完成时，多个电子组件的半成品封装结构的俯视图。本公开的电子组件的封装方法包括如下步骤。
首先，如图1A所示，将一第一绝缘层1进行压合及固化。于一些实施例中，第一绝缘层1可为但不限于由一预浸材(prepreg)叠层所构成，且预浸材叠层是由多个预浸材片10，例如图1A所示的两个预浸材片10堆栈设置而成，而每一预浸材片10可由玻璃布增强环氧树脂(glass cloth reinforced epoxy)或是任何其他具低热膨胀系数(coefficient ofthermal expansion,CTE)及高热传导系数的适当绝缘材料所构成。
接着，如图1B所示，于第一绝缘层1的一第一表面11进行溅镀处理，以形成一金属保护层2于第一表面11。于一些实施例中，金属保护层2的厚度较佳为小于1m，但不以此为限，可依实际需求调整厚度。另外，金属保护层2可由但不限于铜材质所构成。
然后，如图1C及图2所示，于第一绝缘层1上形成一第一对位标识3，且第一对位标识3包含多个基准通孔。在一实施例中，此步骤是利用激光钻孔方式于第一绝缘层1的一第二表面12形成贯穿第一绝缘层1及金属保护层2的四个基准通孔，以架构为用来供激光钻孔对位的标识而构成一坐标系统。在此步骤中，由于利用第一对位标识3的四个基准通孔来形成标识，以供进行激光钻孔的激光装置于初始运行时的对位，故激光装置便可利用第一对位标识3的四个基准通孔构成坐标系统，如此一来，在后续步骤中需进行激光钻孔时，激光装置便依据坐标系统来定位钻孔位置。而于一些实施例中，第一绝缘层1可为矩形结构(如图2所示)，第一对位标识3的四个基准通孔则邻设于于第一绝缘层1的四个角落处，然第一对位标识3的四个基准通孔的位置实际上可依第一绝缘层1的形状及实际需求而对应调整。在另一些实施例中，第一对位标识3亦可利用机械钻孔方式来形成，且包含具有不同设计形状及尺寸的开口，例如线形或十字形开口。
接着，如图1D所示，利用激光钻孔或机械钻孔方式并依据第一对位标识3所定义的坐标系统而形成贯穿第一绝缘层1及金属保护层2且用来供电子组件4(如图1G所示)设置的一容置腔5。于上述实施例中，容置腔5的容置空间大于电子组件4的体积。
然后，如图1E及图1F所示，在一实施例中，于激光钻孔或机械钻孔处理之后先进行一除渣处理，藉此去除容置腔5内的胶渣并使第一绝缘层1的第二表面12变粗糙。于此步骤中，由于第一绝缘层1的第一表面11上是存在金属保护层2，因此在除渣处理的过程中，金属保护层2可保护第一表面11不变粗糙。另外，于一些实施例中，当完成除渣处理后，更可移除金属保护层2。
然后，利用激光钻孔或机械钻孔方式并依据坐标系统而于第一绝缘层1的第二表面12上形成至少一第二对位标识6，其中第二对位标识6是位于容置腔5的周缘处(如图2所示)，以提升后续黏晶处理的对位精度。于本步骤中，实际上是从第一绝缘层1的第二表面12上利用激光钻孔或机械钻孔方式朝第一表面11的方向钻出凹槽，以利用凹槽来形成第二对位标识6。此外，于一些实施例中，第二对位标识6的个数可因应电子组件4的个数而调整，而较佳为一个电子组件4是对应两个第二对位标识6，且该两个第二对位标识6是邻近于对应容置腔5的两个相对角(如图2所示)。
接着，如图1G所示，利用一热分离胶带7将第一表面11贴附于一载板8上，并依据第二对位标识6而将电子组件4设置于容置腔5内，且电子组件4的一第一侧将与热分离胶带7接触，使热分离胶带7黏合电子组件4的第一侧而暂时固定电子组件4于热分离胶带7上。于一实施例中，电子组件4可包括至少一个导接端40，导接端40是设置于电子组件4的第二侧。另外，电子组件4包含一半导体装置，其可为主动组件或是被动组件，例如一功率开关(power switch)。又，电子组件4包含但不限于集成电路(Integrated Circuit，IC)芯片、整合性功率组件、金属氧化物半导体场效晶体管(MOSFET)、高电子迁移率晶体管(HEMT)、绝缘闸双极性晶体管(Insulated-gate bipolar transistor，IGBT)、二极管(Diode)、电容器、电阻器、电感器或保险丝等。电子组件4的导接端40的数目则依据电子组件4的种类及架构而定。
然后，如图1H所示，利用至少一第一胶带9将位于第一绝缘层1的第二表面12上的第一对位标识3的一侧开口封闭，并接续于第一绝缘层1的第二表面12上方设置半固化的一第二绝缘层13，其中第二绝缘层13是覆盖第一胶带9及第一绝缘层1。第二绝缘层13同样可为但不限于由包含多个预浸材片的预浸材(prepreg)叠层所构成。
接着，如图1I所示，压合及固化第二绝缘层13，且接续移除载板8及热分离胶带7。于此步骤中，当压合第二绝缘层13时，部分第二绝缘层13将填满容置腔5的剩余空间及填满第二对位标识6，此时填入容置腔5的部分第二绝缘层13可稳固地固定电子组件4。再者，因第一绝缘层1的第二表面12上的第一对位标识3的一侧开口是通过第一胶带9而封闭，故在压合第二绝缘层13的过程中，第二绝缘层13将被第一胶带9隔绝而无法进入第一对位标识3中。另外，于一些实施例中，当压合及固化第二绝缘层13后，还可移除第一胶带9。再者，当移除载板8及热分离胶带7后，还可利用至少一第二胶带14将位于第一绝缘层1的第一表面11上的第一对位标识3的另一侧开口封闭，且设置半固化的第三绝缘层15于第一绝缘层1的第一表面11上，并压合及固化第三绝缘层15。而当压合及固化第三绝缘层15后，则可接续移除第二胶带14。其中使用第二胶带14的目的与使用第一胶带9的目的相同，故于此不再赘述。应强调的是，此步骤可有多种修饰及变化，只要维持第二绝缘层的压合即可。在一些实施例中，第一胶带9及第二胶带14的移除亦可于第二绝缘层13与第三绝缘层15完成固化后再同时移除。于前述步骤之后，即可形成一半封装结构A，如图1J所示。当然，上述使用第二胶带14及第三绝缘层15的步骤并非为必要，可依实际需求而实施。而以下所述之后续步骤将先以使用第二胶带14及第三绝缘层15来进行说明。
最后，执行一重布线层处理，以于第一绝缘层1或第二绝缘层13上形成一重布线层，且重布线层与电子组件4电连接，如图1K至图1N所示，以完成电子组件4的封装。其中重布线层处理实际上包含如下步骤。首先，如图1K所示，利用激光钻孔或机械钻孔方式于第二绝缘层13中形成至少一个通孔(via)16，每一通孔16是对应于电子组件4的其中的一导接端40，且于前述半封装结构A中邻近电子组件4的区域形成至少一个贯穿孔(through-hole)31，其中贯穿孔31较佳但不限于由激光钻孔方式形成，例如亦可由机械钻孔方式形成。根据布线设计，贯穿孔31可由半封装结构A的任一侧进行钻孔而形成。在下述实施例中，贯穿孔31是由第三绝缘层15的表面进行钻孔而形成，且贯穿第一绝缘层1及第二绝缘层13。在一实施例中，另一组十字形对位标识20(如图2所示)还进一步提供做为后续形成图形的蚀刻处理中的掩模对位标识。
接着，如图1L所示，进行一溅镀处理，以于第二绝缘层13的部分表面、第三绝缘层15的部分表面、及贯穿孔31的壁面形成一导电金属层17，并于通孔16内部填满导电金属层17。由于通孔16是对应于电子组件4的导接端40，故于通孔16内的导电金属层17便与电子组件4的导接端40相导接。
然后，如图1M所示，部分形成一第四绝缘层18于前述半封装结构A的两个相对表面上，且分别暴露部分的导电金属层17。换言的，第四绝缘层18形成于导电金属层17的部分表面、第二绝缘层13的部分表面、及第三绝缘层15的部分表面，且填满于贯穿孔31内。于一实施例中，第四绝缘层18以光敏树脂为较佳。
最后，如图1N所示，溅镀至少一导电图形19于与导接端40相导接的部分导电金属层17上，藉此以形成电子组件的封装结构B。
当然，本公开的封装方法可封装多个电子组件4，多个电子组件于图1G所示的步骤完成后的半成品封装结构即如图2所示，而因应电子组件4的个数，通过对应调整容置腔5、第二对位标识6及通孔16的个数即可实现电子组件的封装，于此不再赘述。
综上所述，本公开提供一种封装至少一电子组件的方法，其中，由于本公开电子组件的封装方法是以激光钻孔方式先于第一绝缘层上形成第一对位标识，藉此形成供激光钻孔对位的标识，进而构成坐标系统，因此后续便可利用该坐标系统而于第一绝缘层上形成第二对位标识，以通过第二对位标识的对位而精准地将电子组件设置于容置腔内，故相较于传统嵌入式封装结构需于基板的表面上形成金属框来控制激光烧灼的孔形，以供电子组件定位设置，使用本公开的电子组件的封装方法所形成的封装结构便可因为无需使用金属框而减少生产成本。又，由于本公开的电子组件封装方法无须利用黏胶来将电子组件贴附于基板上，也因而降低了生产成本。此外，由于本公开的电子组件的封装方法是先将半固化的第一绝缘层进行压合及固化，再将电子组件设置于第一绝缘层的容置腔内，如此一来，在对已将电子组件设置于容置腔内的第一绝缘层进行后续相关的压合动作时，由于第一绝缘层已固化，故第一绝缘层可提供支撑力来抗衡压合动作时外力的影响而不会形变，使得电子组件不会如传统嵌入式封装结构发生偏移的现象，因此本公开的电子组件的封装方法具有较佳的封装效果。
本公开得由本领域技术人员任施匠思而为诸般修饰，然皆不脱如附权利要求所欲保护者。

Claims (15)

1.一种半导体装置的封装方法，包括步骤：
提供一第一绝缘层，其由预浸材叠层所构成；
于该第一绝缘层的一第一表面形成一金属保护层；
于该第一绝缘层上形成一第一对位标识；
依据该第一对位标识，于该第一绝缘层中形成一容置腔；
于该第一绝缘层的一第二表面形成一第二对位标识；
利用一热分离胶带将一载板贴附于该第一绝缘层的该第一表面；
依据该第二对位标识，将该半导体装置设置于该容置腔内，且以该热分离胶带暂时固定该半导体装置；
于该第一绝缘层的该第二表面上方设置半固化的一第二绝缘层，且将该第二绝缘层进行压合及固化；
移除该载板及该热分离胶带；以及
于该第二绝缘层上形成一重布线层，其与该半导体装置电连接。
2.如权利要求1所述的半导体装置的封装方法，其中该第一绝缘层将该预浸材叠层进行压合及固化而成。
3.如权利要求1所述的半导体装置的封装方法，其中该金属保护层的厚度小于1m。
4.如权利要求1所述的半导体装置的封装方法，其中该金属保护层为铜材质所构成。
5.如权利要求1所述的半导体装置的封装方法，其中该金属保护层以一溅镀处理形成。
6.如权利要求1所述的半导体装置的封装方法，其中该第一对位标识包含多个基准通孔。
7.如权利要求6所述的半导体装置的封装方法，其中该多个基准通孔包含四个基准通孔，且该四个基准通孔邻设于该第一绝缘层的四个角落处。
8.如权利要求6所述的半导体装置的封装方法，其中该多个基准通孔贯穿该第一绝缘层及该金属保护层。
9.如权利要求1所述的半导体装置的封装方法，其中该容置腔贯穿该第一绝缘层及该金属保护层。
10.如权利要求1所述的半导体装置的封装方法，其中该第二对位标识位于该容置腔的周缘处。
11.如权利要求1所述的半导体装置的封装方法，其中该第一对位标识、该容置腔及该第二对位标识利用激光钻孔或机械钻孔方式形成。
12.如权利要求1所述的半导体装置的封装方法，其中于形成该容置腔的步骤之后，进一步包括步骤：
进行一除渣处理，藉此去除该容置腔内的胶渣并使该第一绝缘层的该第二表面变粗糙；以及
移除该金属保护层。
13.如权利要求1所述的半导体装置的封装方法，其中于设置该第二绝缘层于该第一绝缘层的该第二表面上方的步骤之前，进一步包括步骤：
利用至少一第一胶带将位于该第一绝缘层的该第二表面上的该第一对位标识的一侧开口封闭。
14.如权利要求13所述的半导体装置的封装方法，其中于移除该载板及该热分离胶带的步骤之后，进一步包括步骤：
利用至少一第二胶带将位于该第一绝缘层的该第一表面上的该第一对位标识的另一侧开口封闭；
于该第一绝缘层的该第一表面上方设置半固化的一第三绝缘层，其中该第三绝缘层覆盖该第二胶带；
将该第三绝缘层进行压合及固化；以及
移除该第一胶带及该第二胶带，以形成一半封装结构。
15.如权利要求14所述的半导体装置的封装方法，其中该形成该重布线层的步骤包含步骤：
利用激光钻孔或机械钻孔方式于该第二绝缘层中形成至少一通孔，其中该通孔对应于该半导体装置的至少一导接端，且利用激光钻孔或机械钻孔方式于该半封装结构中邻近该半导体装置的区域形成至少一贯穿孔，其中该贯穿孔贯穿该第一绝缘层、该第二绝缘层及该第三绝缘层；
于该第二绝缘层的部分表面、该第三绝缘层的部分表面、及该贯穿孔的壁面形成一导电金属层，并于该通孔内部填满该导电金属层；
形成一第四绝缘层于该半封装结构的两相对表面，且暴露部分的该导电金属层；以及
形成至少一导电图形于与该半导体装置的该导接端相导接的部分该导电金属层上。
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