CN107919862A - Surface acoustic wave device air tightness wafer level packaging structure and process - Google Patents

Surface acoustic wave device air tightness wafer level packaging structure and process Download PDF

Info

Publication number
CN107919862A
CN107919862A CN201711459208.XA CN201711459208A CN107919862A CN 107919862 A CN107919862 A CN 107919862A CN 201711459208 A CN201711459208 A CN 201711459208A CN 107919862 A CN107919862 A CN 107919862A
Authority
CN
China
Prior art keywords
wafer
functional chip
bonding layer
chip
bonding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201711459208.XA
Other languages
Chinese (zh)
Other versions
CN107919862B (en
Inventor
米佳
朱勇
冷俊林
陶毅
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
China Electronics Technology Group Corp Chongqing Acoustic Optic Electronic Co ltd
Original Assignee
CETC 26 Research Institute
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CETC 26 Research Institute filed Critical CETC 26 Research Institute
Priority to CN201711459208.XA priority Critical patent/CN107919862B/en
Publication of CN107919862A publication Critical patent/CN107919862A/en
Application granted granted Critical
Publication of CN107919862B publication Critical patent/CN107919862B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02Details
    • H03H9/05Holders; Supports
    • H03H9/10Mounting in enclosures
    • H03H9/1064Mounting in enclosures for surface acoustic wave [SAW] devices

Landscapes

  • Physics & Mathematics (AREA)
  • Acoustics & Sound (AREA)
  • Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)

Abstract

The invention discloses an airtight wafer-level packaging structure and process for a surface acoustic wave device, wherein a circle of bonding layer metal is plated on the periphery of a working surface of a functional chip, a circle of bonding layer metal is plated on a position, corresponding to each chip bonding layer metal, on a capping wafer, the functional chip and the capping wafer are correspondingly combined together through gold-gold bonding or eutectic bonding, an external circuit wiring structure and an external electrode are arranged on the surface of the capping wafer, which is opposite to the working surface of the functional chip, an external solder ball is manufactured on the external electrode, and a through hole is formed in the capping wafer to electrically connect a circuit on the working surface of the functional chip sequentially through the through hole, the external electrode and the external solder ball.

Description

A kind of SAW device air-tightness wafer level packaging structure and technique
Technical field
The present invention relates to SAW device, and in particular to a kind of SAW device air-tightness wafer level packaging structure and Technique, belongs to sound table device packaging technique field.
Background technology
Surface acoustic wave(Surface Acoustic Wave, SAW)Device is a kind of special using surface acoustic wave effect and resonance There is the device of selection index system made of property to frequency.SAW device, especially SAW filter(Surface Acoustic Wave Filter, SAWF)With it is small, light-weight, uniformity is good, reliability level is high, can be real to signal When processing, the advantage such as analog/digital is compatible, electromagnetism interference performance is good, loss is low and frequency selectivity is good, be always to move to lead to The Primary Component of news and automotive electronics.With the continuous development of the field technologies such as mobile communication, emerging technology is applied to SAWF Increasingly higher demands are proposed, and the development trend of SAWF is miniaturization in the range of the world today.2001-2015 America and Europes, The SAWF volume-diminisheds of Japan are to the 1% of original size, so that the volume of mobile phone is substantially reduced, current village of Japan field The acoustic surface wave duplexer that company releases, size is only 1.8 × 1.4 × 0.6cm3, weight 15mg.
External SAW device experienced wafer-level package(Chip Scale Package, CSP)Afterwards, by 2011 Commercial wafer scale afterwards(Wafer level package, WLP)The SAW device of encapsulation starts volume production, and wafer-level packaging is to utilize crystalline substance Circle is packaged, and cuts into the device of single after the completion of encapsulation again.
The SAW device size of no pin ceramic shell and Wire Bonding Technology is used as 3.0 × 3.0mm2, it is thick Degree reaches 1.2mm, package area:Chip area >=2.The CSP SAW devices combined using ceramic substrate and flip chip technology Appearance and size narrows down to 1.1 × 0.9mm2, the thickness of device is 0.5mm, package area:Chip area≤1.5.The typical case of WLP Device dimensions shrink is to 0.8 × 0.6mm2, the thickness of device is less than 0.3mm, package area:Chip area ≈ 1, volume are only The 29% of CSP encapsulation.
Using wafer-level packaging(Wafer level package, WLP)SAW device is current minimum encapsulation shape Formula, the small-sized encapsulated are mainly non-airtight encapsulation.Widely used SAW filter mainly uses on mobile terminal Non-airtight encapsulates, and in automotive electronics, radar, military communication system, enemy and we's identification, electronic countermeasure, ranging, positioning, navigation Then need to use air-tight packaging device with the military equipment field such as remote measuring and controlling.And air-tight packaging is required in realization The atmosphere in portion is controllable, and internal moisture content is relatively low;The SAW device requirement of high-performance, high reliability has good at the same time Electromagnetic shielding capability and power bearing ability.But existing surface acoustic wave device structure is not air-tight packaging, internal atmosphere It is unable to control, can not be electromagnetically shielded.
It is that a kind of wafer-level packaging of non-airtight, the encapsulation will materials identical with function wafer in the prior art shown in Fig. 1 The cover wafer of material is bonded together by polymeric frame, and cavity is formed in sound table workspace.Since polymer cannot prevent water The diffusion of the atmosphere such as vapour, hermetic seal is can not achieve using polymeric frame as sealing material.In order to form firm bonding, polymerization Thing sealing frame is wider up to more than 50 μm, is formed external metallization and internal electrode mutually from the side of device using metal line Even.Since inner lead needs to guide to package outside, it is necessary to increase the size of encapsulation.
The content of the invention
For deficiencies of the prior art, it is an object of the invention to provide a kind of SAW device air-tightness Wafer level packaging structure and technique, the present invention use the material of homogeneity or are sealed with the material of function wafer similar thermal expansion coefficient Lid wafer, avoids because wafer or chip sliver caused by the thermal coefficient of expansion difference of different materials.This packaging technology can be real Existing high Chip Adhesion Strength, the wafer scale that thermal diffusivity is good, encapsulation internal atmosphere is controllable(WLP)The air-tightness envelope of SAW device Dress, has the characteristics that reliability is high.
To achieve these goals, the technical solution adopted by the present invention is as follows:
A kind of SAW device air-tightness wafer-level packaging technique, using the crystalline substance identical and identical cut type with function wafer material Circle or with the wafer of function wafer similar thermal expansion coefficient as cover wafer.
Specific encapsulation step is as follows:
1)Processing forms multi-disc functional chip on same function wafer, and the working face of all functions chip is towards identical, institute Functional chip is based on same function wafer and is connected to become entirety;In the one circle bonding of periphery plating of each functional chip working face Layer metal;
2)Then punched in cover wafer wherein in one side using laser boring technique, formed blind hole, the quantity of blind hole and Position with functional chip circuit depending on being connected and needing;
3)Then metal seed layer is coated with cover wafer, in favor of follow-up electroplating activity;
4)That face of blind hole is formed in cover wafer and carries out electroplating activity to fill metal in blind hole, then removes the envelope outside blind hole The metal layer at other positions of lid wafer;
5)A circle bonding layer metals are made respectively with every functional chip bonding layer metals correspondence position in cover wafer, at the same time Bonding layer metals are manufactured at each blind hole;
6)By step 1)Obtained all functions chip is placed in cover wafer as an entirety and makes the key on functional chip Corresponding with the cover wafer bonding layer metals of layer metal face one by one up and down is closed, then by the bonded layer on every functional chip Corresponding bonding layer metals are bonded together on metal and cover wafer;At the same time by the bonding layer metals at cover wafer blind hole with Corresponding electrode bonding, which is realized, on function wafer is electrically connected;Bonding process is completed in vacuum or inert gas, to avoid sky Vapor corrosion chip surface in gas;
7)The grinding and polishing cover wafer blind hole back side, to expose the metal in blind hole, while realizes cover wafer thinning;
8)External electrode and the external circuit structure needed are made at the cover wafer blind hole back side;
9)Function wafer is thinned in grinding.
In step 8)The external electrode surface of making makes external solder ball.
Cover wafer is identical with the bonding layer metals on function wafer, for gold or golden tin.
SAW device air-tightness wafer level packaging structure, including functional chip and cover wafer, in functional chip work The periphery for making face is coated with a circle bonding layer metals, and one is coated with respectively with every piece of chip bonding layer metal correspondence position in cover wafer Bonding layer metals are enclosed, functional chip is tied with the bonding layer metals in cover wafer by the way that gold-gold bonding or eutectic bonding are corresponding It is combined;In cover wafer external circuit wire structures and external electrode are equipped with backwards to that face of functional chip working face;In dispatch from foreign news agency Extremely upper making has external solder ball;Cover wafer be equipped with via hole with by functional chip working face circuit pass sequentially through via hole, Outer electrode and external solder ball are electrically connected;Bonding layer metals width in cover wafer and functional chip is 20-30 microns.
Conducting metal is filled with via hole, conducting metal has manufactured electrical connection bonding gold towards that face of functional chip Belong to, the electrode bonding connection corresponding with functional chip of electrical connection bond wire.
Compared with prior art, the present invention has the advantages that:
1st, in one circle bonding layer metals of functional chip working face periphery plating, in cover wafer with every piece of functional chip bonding layer metals Correspondence position also plates a circle bonding layer metals, and functional chip and capping are then made by way of gold-gold bonding or eutectic bonding Wafer is combined together, and can form the air-tight structure to play a protective role to chip operation face, relatively before polymeric frame Bonding encapsulation, air-tightness greatly improve, and Chip Adhesion Strength is high.
2nd, processing efficiency further improves.For the present invention by the way of gold-gold bonding or eutectic bonding, functional chip need not Cut into single chip, you can the function wafer that full wafer includes multi-plate chip is directly bonded with cover wafer, will not The bonding effect of every chip is reduced, greatly improves processing efficiency.
3rd, gold-gold bonding or eutectic bonding are carried out in the environment of vacuum or nitrogen charging, it can be achieved that to encapsulate internal atmosphere controllable.
4th, since wafer is thinned, the thickness of detector only 0.25mm after encapsulation, thermal resistance reduces, and thermal diffusivity is good.
Brief description of the drawings
Fig. 1-existing SAW device encapsulating structure schematic diagram.
Fig. 2-SAW device of the present invention encapsulating structure schematic diagram.
Embodiment
Below in conjunction with the drawings and specific embodiments, the present invention will be described in detail.
This packaging technology is applied to high reliability SAW device encapsulation technology field, specifically using wafer level packaging skill The functional chip of SAW device is bonded together by art with cover wafer, forms hermetic seal.
The surface acoustic wave device structure that this packaging technology is directed to is as shown in Fig. 2, as can be seen that the surface acoustic wave from figure Device includes functional chip 1 and cover wafer 2, and a circle bonding layer metals 3 are coated with the periphery of 1 working face of functional chip, capping Also it is coated with a circle bonding layer metals 3, functional chip 1 and capping on wafer 2 respectively with every piece of chip bonding layer metal correspondence position Wafer 2 is combined together by gold-gold bonding mode or eutectic bonding.Set in cover wafer 2 backwards to that face of chip operation face There are external circuit wire structures and the outer electrode for being electrically connected with pcb board.For convenience of electrical connection, further in external electrical Also being made on extremely has external solder ball 5.Cover wafer 2 is led equipped with via hole 4 with functional chip working face circuit is passed sequentially through Through hole 4, outer electrode and external solder ball 5 are electrically connected.The device so formed can be directly electrically connected by external solder ball and pcb board Connect.The present invention is combined together the wafer of functional chip and cover wafer by way of gold-gold bonding or eutectic bonding, Can form the air-tight structure to play a protective role to chip operation face, relatively before polymeric frame bonding encapsulation, air-tightness Greatly improve.
Polylith functional chip is bonded with same cover wafer, all functions chip is formed at same function wafer On, which is bonded and is connected at the same time as an entirety by all functions chip with cover wafer.The present invention by In by the way of gold-gold bonding or eutectic bonding, therefore functional chip need not cut into single chip, you can include full wafer The function wafer of multi-disc functional chip is directly bonded with cover wafer, will not reduce the bonding effect of every chip, greatly It is big to improve processing efficiency.
Based on above-mentioned new construction, the present invention proposes a kind of new SAW device air-tightness wafer-level packaging technique, Encapsulation step is as follows,
1)Processing forms multi-disc functional chip on same function wafer, and the working face of all functions chip is towards identical, institute Functional chip is based on same function wafer and is connected to become entirety;In the one circle bonding of periphery plating of each functional chip working face Layer metal;3-5 microns of bonding layer metals thickness, 20-30 microns of width.
2)Then punched in cover wafer wherein in one side using laser boring technique, form blind hole, the number of blind hole Amount and position with functional chip circuit depending on being connected and needing;
3)Then metal seed layer is coated with cover wafer, in favor of follow-up electroplating activity;
4)That face of blind hole is formed in cover wafer and carries out electroplating activity to fill metal in blind hole, then removes the envelope outside blind hole The metal layer at other positions of lid wafer;
5)Make a circle bonding layer metals respectively with every functional chip bonding layer metals correspondence position in cover wafer, and Bonding layer metals are made at blind hole at the same time, for being connected with function wafer bonding;3-5 microns of bonding layer metals thickness, width 20- 30 microns.Cover wafer is identical with the bonding layer metals on function wafer, for gold(Au)Or golden tin(AuSn)Deng.
6)By step 1)Obtained all functions chip is placed in cover wafer as an entirety and makes on functional chip Bonding layer metals bonding layer metals corresponding with cover wafer face one by one up and down, then by the key on every functional chip Corresponding bonding layer metals in layer metal and cover wafer are closed to be bonded together;At the same time by the bonded layer gold at cover wafer blind hole Belong to electrode bonding corresponding with function wafer and realize electrical connection;Bonding process is completed in vacuum or inert gas, to keep away Exempt from the vapor corrosion chip surface in air;
7)The grinding and polishing cover wafer blind hole back side, to expose the metal in blind hole;The present invention, which pre-sets blind hole and polishes again, to wear Thoroughly, cover wafer thinning is also realized while realizing and being electrically connected, and blind hole processing is got up easily;
8)External electrode and the external circuit structure needed are made at the cover wafer blind hole back side.As needed, can also be in dispatch from foreign news agency Pole surface makes soldered ball.
9)Function wafer is thinned in grinding.
This packaging technology using the wafer identical and identical cut type with function wafer material or with function wafer thermal expansion system Material similar in number is avoided after bonding caused by thermal expansion coefficient difference, the warpage of cover wafer and chip as cover wafer And sliver, and performance change.
After the completion of this packaging technology sound table function wafer manufacturing, using material identical with this function wafer and the piezoelectricity of cut type Wafer is as cover wafer, the making metal sealing frame in cover wafer and function wafer, and is directed at bonding, realizes sealing.Together When make via in cover wafer, carry out via metal to realize the connection of internal and external electrode.The present invention is made using metal frame For sealing frame, closed cavity is realized using golden gold bonding, so as to fulfill air-tight packaging truly and realizes crystalline substance Circle level encapsulation.Since metal sealing is efficient, metal width of frame can be reduced to 20~30 μm, and the size of device is small, and can be real The internal controllable hermetic seal of now encapsulation, meets the highly reliable requirement of device.
Cause that cover wafer and function wafer material are inconsistent, and cover wafer of the present invention can also if as reality Using glass material, the glass material has the function of the thermal coefficient of expansion identical or close with wafer.The present invention uses glass Glass does encapsulation wafer, instead of the other materials of thermal coefficient of expansion fixation, such as silicon materials, and the thermal coefficient of expansion due to glass is adding It is easy to by the change of component and adjustable, therefore can be readily available and function wafer material thermal coefficient of expansion when work Consistent or close glass material, and price is also inexpensive, so that when reducing or eliminate in post production process or using The thermal mismatching phenomenon of appearance, improves the reliability of device.
The present invention can substantially reduce the package dimension of device, and compared with other wafer-level packaging forms, this structure can To form hermetic seal well, and it is of low cost, the reliability of device can be greatly improved, and wafer bond techniques have been used, It can be produced in enormous quantities.
The above embodiment of the present invention is only example to illustrate the invention, and is not the implementation to the present invention The restriction of mode.For those of ordinary skill in the field, other can also be made not on the basis of the above description With the change and variation of form.Here all embodiments can not be exhaustive.It is every to belong to technical scheme Row of the changes and variations that derived from still in protection scope of the present invention.

Claims (8)

  1. A kind of 1. SAW device air-tightness wafer-level packaging technique, it is characterised in that:Using identical with function wafer material And the identical wafer of cut type or with the wafer of function wafer similar thermal expansion coefficient as cover wafer.
  2. 2. SAW device air-tightness wafer-level packaging technique according to claim 1, it is characterised in that:Specific encapsulation Step is as follows:
    1)Processing forms multi-disc functional chip on same function wafer, and the working face of all functions chip is towards identical, institute Functional chip is based on same function wafer and is connected to become entirety;In the one circle bonding of periphery plating of each functional chip working face Layer metal;
    2)Then punched in cover wafer wherein in one side using laser boring technique, formed blind hole, the quantity of blind hole and Position with functional chip circuit depending on being connected and needing;
    3)Then metal seed layer is coated with cover wafer, in favor of follow-up electroplating activity;
    4)That face of blind hole is formed in cover wafer and carries out electroplating activity to fill metal in blind hole, then removes the envelope outside blind hole The metal layer at other positions of lid wafer;
    5)A circle bonding layer metals are made respectively with every functional chip bonding layer metals correspondence position in cover wafer, at the same time Bonding layer metals are manufactured at each blind hole;
    6)By step 1)Obtained all functions chip is placed in cover wafer as an entirety and makes the key on functional chip Corresponding with the cover wafer bonding layer metals of layer metal face one by one up and down is closed, then by the bonded layer on every functional chip Corresponding bonding layer metals are bonded together on metal and cover wafer;At the same time by the bonding layer metals at cover wafer blind hole with Corresponding electrode bonding, which is realized, on function wafer is electrically connected;Bonding process is completed in vacuum or inert gas, to avoid sky Vapor corrosion chip surface in gas;
    7)The grinding and polishing cover wafer blind hole back side, to expose the metal in blind hole, while realizes cover wafer thinning;
    8)External electrode and the external circuit structure needed are made at the cover wafer blind hole back side;
    9)Function wafer is thinned in grinding.
  3. 3. SAW device air-tightness wafer-level packaging technique according to claim 2, it is characterised in that:In step 8) The external electrode surface of making makes external solder ball.
  4. 4. SAW device air-tightness wafer-level packaging technique according to claim 2, it is characterised in that:Cover wafer It is identical with the bonding layer metals on function wafer, for gold or golden tin.
  5. 5. SAW device air-tightness wafer level packaging structure, including functional chip and cover wafer, it is characterised in that:In work( The periphery in energy chip operation face is coated with a circle bonding layer metals, divides in cover wafer with every piece of chip bonding layer metal correspondence position A circle bonding layer metals are not coated with, and functional chip passes through gold-gold bonding or eutectic key with the bonding layer metals in cover wafer Correspondence is closed to be combined together;In cover wafer external circuit wire structures and dispatch from foreign news agency are equipped with backwards to that face of functional chip working face Pole;Being made on external electrode has external solder ball;Cover wafer is equipped with via hole so that functional chip working face circuit to be led to successively Via hole, outer electrode and external solder ball is crossed to be electrically connected;Bonding layer metals width in cover wafer and functional chip is 20-30 Micron.
  6. 6. SAW device air-tightness wafer level packaging structure according to claim 5, it is characterised in that:In via hole Interior to be filled with conducting metal, conducting metal has manufactured electrical connection bond wire, electrical connection bonding towards that face of functional chip Metal electrode bonding connection corresponding with functional chip.
  7. 7. SAW device air-tightness wafer level packaging structure according to claim 5, it is characterised in that:The capping Wafer is identical with the bonding layer metals on function wafer, is gold or golden tin.
  8. 8. SAW device air-tightness wafer level packaging structure according to claim 5, it is characterised in that:The capping Wafer is identical with function wafer material and cut type is identical.
CN201711459208.XA 2017-12-28 2017-12-28 Surface acoustic wave device airtight wafer-level packaging structure and process Active CN107919862B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201711459208.XA CN107919862B (en) 2017-12-28 2017-12-28 Surface acoustic wave device airtight wafer-level packaging structure and process

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201711459208.XA CN107919862B (en) 2017-12-28 2017-12-28 Surface acoustic wave device airtight wafer-level packaging structure and process

Publications (2)

Publication Number Publication Date
CN107919862A true CN107919862A (en) 2018-04-17
CN107919862B CN107919862B (en) 2024-08-06

Family

ID=61894320

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201711459208.XA Active CN107919862B (en) 2017-12-28 2017-12-28 Surface acoustic wave device airtight wafer-level packaging structure and process

Country Status (1)

Country Link
CN (1) CN107919862B (en)

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109004080A (en) * 2018-08-10 2018-12-14 付伟 With extension double cofferdam and the chip-packaging structure of scolding tin and preparation method thereof
CN109004083A (en) * 2018-08-10 2018-12-14 付伟 Chip-packaging structure and preparation method thereof with single cofferdam and scolding tin
CN109037429A (en) * 2018-08-10 2018-12-18 付伟 Encapsulating structure and preparation method thereof with double cofferdam and scolding tin
CN109286385A (en) * 2018-09-13 2019-01-29 中国电子科技集团公司第二十六研究所 Surface acoustic wave device wafer level packaging structure and packaging method thereof
CN110380703A (en) * 2019-08-13 2019-10-25 中电科技德清华莹电子有限公司 A kind of the full wafer wafer level packaging structure and technique of microelectronic device
CN110729979A (en) * 2019-09-30 2020-01-24 中国电子科技集团公司第二十六研究所 Wafer-level packaging method and structure of film bulk acoustic wave filter
CN111115555A (en) * 2019-12-20 2020-05-08 北京航天控制仪器研究所 Silicon groove structure for MEMS wafer-level eutectic bonding packaging and preparation method
CN111121843A (en) * 2019-12-18 2020-05-08 上海交通大学 Integrated packaging structure and packaging method of surface acoustic wave sensor
CN111342807A (en) * 2018-12-18 2020-06-26 天津大学 Filter and electronic device with increased via area
CN112652545A (en) * 2020-12-22 2021-04-13 北京航天微电科技有限公司 Packaging method and packaging device for surface acoustic wave filter
CN112769411A (en) * 2020-12-30 2021-05-07 广东省科学院半导体研究所 Wafer-level packaging method and device for surface acoustic wave chip
CN113783546A (en) * 2021-07-09 2021-12-10 无锡市好达电子股份有限公司 Wafer-level packaging acoustic surface device and preparation method thereof
CN113852360A (en) * 2021-11-30 2021-12-28 深圳新声半导体有限公司 Surface acoustic wave filter packaging method and packaging structure
WO2022028080A1 (en) * 2020-08-07 2022-02-10 展讯通信(上海)有限公司 Wafer-level surface acoustic wave filter and packaging method
CN114408857A (en) * 2022-03-28 2022-04-29 南京声息芯影科技有限公司 Ultrasonic transducer of CMUT-on-CMOS with active wafer bonding architecture and manufacturing method

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012209662A (en) * 2011-03-29 2012-10-25 Shin Etsu Chem Co Ltd Wafer level package material for surface acoustic wave device, surface acoustic wave device junction wafer using package material, and surface acoustic wave device cut from junction wafer
CN103337464A (en) * 2013-06-03 2013-10-02 中国电子科技集团公司第二十六研究所 Novel metal diffusion bonding technology
JP2014053644A (en) * 2013-12-11 2014-03-20 Hitachi High-Technologies Corp Plasma processing device and plasma processing method
CN105609904A (en) * 2015-12-29 2016-05-25 中国电子科技集团公司第二十六研究所 Hermetic package for chip-scale acoustic surface wave device and hermetic package method
CN207559959U (en) * 2017-12-28 2018-06-29 中国电子科技集团公司第二十六研究所 SAW device air-tightness wafer level packaging structure

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012209662A (en) * 2011-03-29 2012-10-25 Shin Etsu Chem Co Ltd Wafer level package material for surface acoustic wave device, surface acoustic wave device junction wafer using package material, and surface acoustic wave device cut from junction wafer
CN103337464A (en) * 2013-06-03 2013-10-02 中国电子科技集团公司第二十六研究所 Novel metal diffusion bonding technology
JP2014053644A (en) * 2013-12-11 2014-03-20 Hitachi High-Technologies Corp Plasma processing device and plasma processing method
CN105609904A (en) * 2015-12-29 2016-05-25 中国电子科技集团公司第二十六研究所 Hermetic package for chip-scale acoustic surface wave device and hermetic package method
CN207559959U (en) * 2017-12-28 2018-06-29 中国电子科技集团公司第二十六研究所 SAW device air-tightness wafer level packaging structure

Cited By (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109004083A (en) * 2018-08-10 2018-12-14 付伟 Chip-packaging structure and preparation method thereof with single cofferdam and scolding tin
CN109037429A (en) * 2018-08-10 2018-12-18 付伟 Encapsulating structure and preparation method thereof with double cofferdam and scolding tin
CN109004080A (en) * 2018-08-10 2018-12-14 付伟 With extension double cofferdam and the chip-packaging structure of scolding tin and preparation method thereof
CN109286385A (en) * 2018-09-13 2019-01-29 中国电子科技集团公司第二十六研究所 Surface acoustic wave device wafer level packaging structure and packaging method thereof
CN111342807B (en) * 2018-12-18 2023-12-15 天津大学 Filter with increased via area and electronic device
CN111342807A (en) * 2018-12-18 2020-06-26 天津大学 Filter and electronic device with increased via area
CN110380703A (en) * 2019-08-13 2019-10-25 中电科技德清华莹电子有限公司 A kind of the full wafer wafer level packaging structure and technique of microelectronic device
CN110729979B (en) * 2019-09-30 2022-09-09 中国电子科技集团公司第二十六研究所 Wafer-level packaging method and structure of film bulk acoustic wave filter
CN110729979A (en) * 2019-09-30 2020-01-24 中国电子科技集团公司第二十六研究所 Wafer-level packaging method and structure of film bulk acoustic wave filter
CN111121843B (en) * 2019-12-18 2021-03-02 上海交通大学 Integrated packaging structure and packaging method of surface acoustic wave sensor
CN111121843A (en) * 2019-12-18 2020-05-08 上海交通大学 Integrated packaging structure and packaging method of surface acoustic wave sensor
CN111115555A (en) * 2019-12-20 2020-05-08 北京航天控制仪器研究所 Silicon groove structure for MEMS wafer-level eutectic bonding packaging and preparation method
CN111115555B (en) * 2019-12-20 2023-08-29 北京航天控制仪器研究所 Silicon groove structure for MEMS wafer-level eutectic bonding packaging and preparation method
US11632095B2 (en) 2020-08-07 2023-04-18 Spreadtrum Communications (Shanghai) Co., Ltd. Wafer level surface acoustic wave filter and package method
WO2022028080A1 (en) * 2020-08-07 2022-02-10 展讯通信(上海)有限公司 Wafer-level surface acoustic wave filter and packaging method
CN112652545A (en) * 2020-12-22 2021-04-13 北京航天微电科技有限公司 Packaging method and packaging device for surface acoustic wave filter
CN112769411A (en) * 2020-12-30 2021-05-07 广东省科学院半导体研究所 Wafer-level packaging method and device for surface acoustic wave chip
CN113783546A (en) * 2021-07-09 2021-12-10 无锡市好达电子股份有限公司 Wafer-level packaging acoustic surface device and preparation method thereof
CN113852360A (en) * 2021-11-30 2021-12-28 深圳新声半导体有限公司 Surface acoustic wave filter packaging method and packaging structure
CN114408857B (en) * 2022-03-28 2022-09-06 南京声息芯影科技有限公司 Ultrasonic transducer of CMUT-on-CMOS with active wafer bonding architecture and manufacturing method
CN114408857A (en) * 2022-03-28 2022-04-29 南京声息芯影科技有限公司 Ultrasonic transducer of CMUT-on-CMOS with active wafer bonding architecture and manufacturing method

Also Published As

Publication number Publication date
CN107919862B (en) 2024-08-06

Similar Documents

Publication Publication Date Title
CN107919862A (en) Surface acoustic wave device air tightness wafer level packaging structure and process
US9691687B2 (en) Module and method of manufacturing a module
CN103022021B (en) Semiconductor device and manufacture method thereof
CN101878527B (en) Wafer level packaging using flip chip mounting
CN101018044B (en) Filter module providing function related to multi band and method thereof
KR100809693B1 (en) Vertical type stacked multi-chip package improving a reliability of a lower semiconductor chip and method for manufacturing the same
CN107786183A (en) Embedded RF filter packages structure and its manufacture method
CN207559959U (en) SAW device air-tightness wafer level packaging structure
JP2013517953A (en) Miniaturized electrical device including MEMS and ASIC and method for manufacturing the same
CN203503623U (en) Monolithic integrated MEMS chip based on conductive pole wafer level packaging
CN109286385A (en) Surface acoustic wave device wafer level packaging structure and packaging method thereof
CN105958963B (en) A kind of encapsulating structure and its manufacturing method
CN108011608A (en) Wafer-level packaging structure and packaging process applied to surface acoustic wave filter
US6713878B2 (en) Electronic element with a shielding
US7362038B1 (en) Surface acoustic wave (SAW) device package and method for packaging a SAW device
KR20110020548A (en) Semiconductor package and method for fabricating the same
CN108155287A (en) A kind of wafer scale SAWF encapsulating structures with resisting temperature impact effect
CN218385188U (en) Airtight wafer level chip packaging structure, module, circuit board and electronic equipment
CN104051432A (en) Electronic component package
CN211088262U (en) Electromagnetic shielding structure
KR101349544B1 (en) High frequency module
TW201705384A (en) Package structure and shielding member and method for fabricating the same
CN217721145U (en) Air tightness wafer level packaging structure of film bulk acoustic wave filter
CN219917143U (en) Radio frequency front end module packaging structure and electronic equipment
CN216871943U (en) Packaging structure of semiconductor device

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
TA01 Transfer of patent application right
TA01 Transfer of patent application right

Effective date of registration: 20220524

Address after: No.23 Xiyong Avenue, Shapingba District, Chongqing 401332

Applicant after: CHINA ELECTRONICS TECHNOLOGY GROUP CORPORATION CHONGQING ACOUSTIC-OPTIC-ELECTRONIC CO.,LTD.

Address before: 400060 Chongqing Nanping Nan'an District No. 14 Huayuan Road

Applicant before: CHINA ELECTRONICS TECHNOLOGY GROUP CORPORATION NO.26 Research Institute

CB02 Change of applicant information
CB02 Change of applicant information

Country or region after: China

Address after: No.23 Xiyong Avenue, Shapingba District, Chongqing 401332

Applicant after: CETC Chip Technology (Group) Co.,Ltd.

Address before: No.23 Xiyong Avenue, Shapingba District, Chongqing 401332

Applicant before: CHINA ELECTRONICS TECHNOLOGY GROUP CORPORATION CHONGQING ACOUSTIC-OPTIC-ELECTRONIC CO.,LTD.

Country or region before: China

GR01 Patent grant
GR01 Patent grant