TW201705384A - Package structure and shielding member and method for fabricating the same - Google Patents

Package structure and shielding member and method for fabricating the same Download PDF

Info

Publication number
TW201705384A
TW201705384A TW104123382A TW104123382A TW201705384A TW 201705384 A TW201705384 A TW 201705384A TW 104123382 A TW104123382 A TW 104123382A TW 104123382 A TW104123382 A TW 104123382A TW 201705384 A TW201705384 A TW 201705384A
Authority
TW
Taiwan
Prior art keywords
metal oxide
magnetic metal
oxide layer
electronic component
shield
Prior art date
Application number
TW104123382A
Other languages
Chinese (zh)
Other versions
TWI581380B (en
Inventor
許聰賢
鍾興隆
朱德芳
Original Assignee
矽品精密工業股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 矽品精密工業股份有限公司 filed Critical 矽品精密工業股份有限公司
Priority to TW104123382A priority Critical patent/TWI581380B/en
Priority to CN201510456892.0A priority patent/CN106373926B/en
Publication of TW201705384A publication Critical patent/TW201705384A/en
Application granted granted Critical
Publication of TWI581380B publication Critical patent/TWI581380B/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73253Bump and layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73257Bump and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Abstract

A package structure includes an electronic component, a shielding member engaged with the electronic component, and an encapsulant encapsulating the electronic component and the shield member. The shield member includes a magnetic metal oxide layer, and a protection layer formed on the magnetic metal oxide layer. Through the direct engagement of the shielding member with the electronic component, the shielding member shields the electronic component effectively, and prevents the electronic component from generating erroneous signals. The present invention further provides the shielding member and a method for fabricating the same.

Description

封裝結構及屏蔽件與其製法 Package structure and shielding member and its manufacturing method

本發明係有關一種封裝結構,尤指一種具屏蔽件之封裝結構及該屏蔽件與其製法。 The invention relates to a package structure, in particular to a package structure with a shield and a method for manufacturing the same.

隨著電子產業的蓬勃發展,電子產品也逐漸邁向多功能、高性能的趨勢。目前無線通訊技術已廣泛應用於各式各樣的消費性電子產品以利接收或發送各種無線訊號,而為提升電性品質,多種半導體產品具有屏蔽之功能,以防止電磁干擾(Electromagnetic Interference,簡稱EMI)產生。 With the rapid development of the electronics industry, electronic products are gradually moving towards multi-functional and high-performance trends. At present, wireless communication technology has been widely used in a variety of consumer electronic products to receive or transmit various wireless signals, and in order to improve electrical quality, a variety of semiconductor products have a shielding function to prevent electromagnetic interference (Electromagnetic Interference, referred to as EMI) is produced.

目前的電子產品均朝向小型化及高速化的目標發展,尤其是通訊產業的發展已普遍運用整合於各類電子產品,例如行動電話(Cell phone)、膝上型電腦(laptop)等。上述之電子產品需使用高頻的射頻晶片,且射頻晶片可能相鄰設置數位積體電路、數位訊號處理器(Digital Signal Processor,簡稱DSP)或基頻晶片(Base Band),因而互相造成電磁干擾的現象,故必需進行電磁屏蔽(Electromagnetic Shielding)處理。 The current electronic products are all oriented towards the goal of miniaturization and high speed. In particular, the development of the communication industry has been widely used in various electronic products, such as Cell phones and laptops. The above-mentioned electronic products need to use high-frequency RF chips, and the RF chips may be adjacent to a digital integrated circuit, a digital signal processor (DSP) or a baseband chip, thereby causing electromagnetic interference with each other. Therefore, it is necessary to perform electromagnetic shielding (Electromagnetic Shielding) processing.

如第1圖所示,習知射頻模組1係將複數電子元件11電性連接在一承載件10上,再以係如環氧樹脂之封裝材13包覆各該電子元件11,並於該封裝材13上罩設一金屬薄膜12。該射頻模組1藉由該金屬薄膜12保護該些電子元件11免受外界EMI影響。 As shown in FIG. 1 , the conventional RF module 1 electrically connects the plurality of electronic components 11 to a carrier 10 , and then encapsulates the electronic components 11 with a package 13 such as epoxy resin. The package material 13 is covered with a metal film 12. The RF module 1 protects the electronic components 11 from external EMI by the metal film 12.

惟,習知射頻模組1中,該金屬薄膜12製程時間冗長及成本極高。 However, in the conventional RF module 1, the metal film 12 has a long process time and a high cost.

再者,該金屬薄膜12係形成於該封裝材13之外面以達防止EMI之功效,亦即該金屬薄膜12與干擾源(即該電子元件11)間隔有該封裝材13,故當該電子元件11為低頻元件時,即使該金屬薄膜12覆蓋該封裝材13之上面與側面,該金屬薄膜12之屏蔽效果仍然不佳,導致該低頻之電子元件11之訊號容易發生錯誤。 Furthermore, the metal film 12 is formed on the outer surface of the package 13 to prevent EMI, that is, the metal film 12 is separated from the interference source (ie, the electronic component 11) by the package 13, so when the electron When the element 11 is a low frequency component, even if the metal film 12 covers the upper surface and the side surface of the package material 13, the shielding effect of the metal thin film 12 is still poor, and the signal of the low frequency electronic component 11 is prone to error.

因此,如何克服上述習知技術之種種問題,實已成目前亟欲解決的課題。 Therefore, how to overcome the various problems of the above-mentioned prior art has become a problem that is currently being solved.

鑑於上述習知技術之種種缺失,本發明係揭露一種封裝結構,係包括:電子元件;屏蔽件,係結合於該電子元件上,且該屏蔽件係包含磁性金屬氧化層與設於該磁性金屬氧化層上之保護層;以及封裝材,係覆蓋該電子元件與該屏蔽件。 In view of the above-mentioned various deficiencies of the prior art, the present invention discloses a package structure including: an electronic component; a shield member coupled to the electronic component, wherein the shield member comprises a magnetic metal oxide layer and is disposed on the magnetic metal a protective layer on the oxide layer; and an encapsulant covering the electronic component and the shield.

前述之封裝結構中,該電子元件係為主動元件或被動元件。 In the foregoing package structure, the electronic component is an active component or a passive component.

前述之封裝結構中,形成該磁性金屬氧化層之材質係 包含錳鋅鐵氧磁體或鎳鋅鐵氧磁體。 In the foregoing package structure, the material of the magnetic metal oxide layer is formed Contains manganese-zinc ferrite magnets or nickel-zinc ferrite magnets.

前述之封裝結構中,形成該保護層之材質係包含低溫共燒多層陶瓷、高溫共燒多層陶瓷、金屬或玻璃。 In the above package structure, the material forming the protective layer comprises a low temperature co-fired multilayer ceramic, a high temperature co-fired multilayer ceramic, a metal or a glass.

前述之封裝結構中,該磁性金屬氧化層之相對兩側設有該保護層;或者,該磁性金屬氧化層之其中一側設有該保護層。 In the foregoing package structure, the protective layer is disposed on opposite sides of the magnetic metal oxide layer; or the protective layer is disposed on one side of the magnetic metal oxide layer.

前述之封裝結構中,該屏蔽件係藉由一結合層結合於該電子元件上,使該結合層形成於該屏蔽件與該電子元件之間。 In the above package structure, the shielding member is bonded to the electronic component by a bonding layer, and the bonding layer is formed between the shielding component and the electronic component.

前述之封裝結構中,該屏蔽件係完全或部分遮蓋該電子元件。 In the aforementioned package structure, the shield completely or partially covers the electronic component.

前述之封裝結構中,該屏蔽件之部分表面係外露於該封裝材。 In the above package structure, a part of the surface of the shield is exposed to the package.

前述之封裝結構中,復包括承載件,係承載該電子元件並與該電子元件電性連接。 In the foregoing package structure, the carrier member is further included to carry the electronic component and is electrically connected to the electronic component.

本發明亦提供一種屏蔽件之製法,係包括:形成磁性金屬氧化層於一保護層上;以及壓合該磁性金屬氧化層與該保護層。 The invention also provides a method for manufacturing a shielding member, comprising: forming a magnetic metal oxide layer on a protective layer; and pressing the magnetic metal oxide layer and the protective layer.

前述之製法中,復包括於壓合前,堆疊結合層於該磁性金屬氧化層上,使該磁性金屬氧化層位於該保護層與該結合層之間。 In the above method, before the pressing, the bonding layer is stacked on the magnetic metal oxide layer such that the magnetic metal oxide layer is located between the protective layer and the bonding layer.

前述之製法中,該磁性金屬氧化層藉由塗膠印刷方式形成於該保護層上。 In the above method, the magnetic metal oxide layer is formed on the protective layer by means of offset printing.

前述之製法中,復包括於壓合後,進行燒結或固化製 程。 In the above-mentioned preparation method, the composite is included after pressing, and is sintered or cured. Cheng.

本發明復提供一種屏蔽件,係包括:磁性金屬氧化層;以及保護層,係形成於該磁性金屬氧化層之一表面上。 The present invention provides a shield comprising: a magnetic metal oxide layer; and a protective layer formed on a surface of the magnetic metal oxide layer.

前述之屏蔽件及其製法中,該磁性金屬氧化層之材質係包含錳鋅鐵氧磁體或鎳鋅鐵氧磁體。 In the above shielding member and the method of manufacturing the same, the material of the magnetic metal oxide layer comprises a manganese zinc ferrite magnet or a nickel zinc ferrite magnet.

前述之屏蔽件及其製法中,該保護層之材質係包含低溫共燒多層陶瓷、高溫共燒多層陶瓷、金屬或玻璃。 In the foregoing shielding member and the manufacturing method thereof, the material of the protective layer comprises a low-temperature co-fired multilayer ceramic, a high-temperature co-fired multilayer ceramic, a metal or a glass.

前述之屏蔽件及其製法中,復包括於壓合前,堆疊另一保護層於該磁性金屬氧化層上,使該磁性金屬氧化層位於該些保護層之間。例如,形成該另一保護層之材質係包含低溫共燒多層陶瓷、高溫共燒多層陶瓷、金屬或玻璃。 In the foregoing shielding member and the manufacturing method thereof, before the pressing, another protective layer is stacked on the magnetic metal oxide layer such that the magnetic metal oxide layer is located between the protective layers. For example, the material forming the other protective layer comprises a low temperature co-fired multilayer ceramic, a high temperature co-fired multilayer ceramic, a metal or a glass.

由上可知,本發明之封裝結構中,係藉由該屏蔽件直接結合於該電子元件上之設計,而非將屏蔽件設於封裝材外面之習知技術,故本發明之屏蔽件能有效對該電子元件產生屏蔽效果,以避免該電子元件之訊號發生錯誤。 As can be seen from the above, in the package structure of the present invention, the shield member is directly bonded to the electronic component, and the shield member can be effectively disposed on the outside of the package. The electronic component is shielded to avoid an error in the signal of the electronic component.

再者,藉由將該屏蔽件設於該封裝材內部,可避免習知於封裝材外形成金屬薄膜所導致製程時間長及成本高等之問題。 Moreover, by providing the shielding member inside the packaging material, problems such as long process time and high cost caused by forming a metal thin film outside the packaging material can be avoided.

1‧‧‧射頻模組 1‧‧‧RF Module

10、20‧‧‧承載件 10, 20‧‧‧ Carrying parts

11、21、21’‧‧‧電子元件 11, 21, 21' ‧ ‧ electronic components

12‧‧‧金屬薄膜 12‧‧‧Metal film

13、23、23’‧‧‧封裝材 13,23,23’‧‧‧Package

2,2’、3、3’‧‧‧封裝結構 2,2’, 3, 3’‧‧‧ package structure

21a‧‧‧上表面 21a‧‧‧Upper surface

21b‧‧‧下表面 21b‧‧‧ lower surface

210、210’‧‧‧導電元件 210, 210'‧‧‧ conductive elements

22、22’、32、32’‧‧‧屏蔽件 22, 22', 32, 32' ‧ ‧ shields

22a‧‧‧第一表面 22a‧‧‧ first surface

22b‧‧‧第二表面 22b‧‧‧ second surface

220‧‧‧磁性金屬氧化層 220‧‧‧Magnetic metal oxide layer

221、221’‧‧‧保護層 221, 221’ ‧ ‧ protective layer

24‧‧‧結合層 24‧‧‧Combination layer

S‧‧‧切割路徑 S‧‧‧ cutting path

第1圖係為習知射頻模組之剖面示意圖;第2圖係為本發明之封裝結構之第一實施例的剖面示意圖;其中,第2’及2”圖係為第2圖的其它實施例;第2A至2C圖係為本發明之封裝結構之屏蔽件的製法之立體示意圖;其中,第2C’圖係為第2C圖的局部剖面 示意圖;以及第3圖係為本發明之封裝結構之第二實施例的剖面示意圖;其中,第3’圖係為第3圖的另一實施例。 1 is a schematic cross-sectional view of a conventional radio frequency module; FIG. 2 is a cross-sectional view showing a first embodiment of the package structure of the present invention; wherein the 2' and 2" drawings are other implementations of FIG. 2A to 2C are perspective views of a method of manufacturing a shield of the package structure of the present invention; wherein the 2C' is a partial section of FIG. 2C BRIEF DESCRIPTION OF THE DRAWINGS Fig. 3 is a cross-sectional view showing a second embodiment of the package structure of the present invention; wherein the 3' is another embodiment of Fig. 3.

以下藉由特定的具體實施例說明本發明之實施方式,熟悉此技藝之人士可由本說明書所揭示之內容輕易地瞭解本發明之其他優點及功效。 The other embodiments of the present invention will be readily understood by those skilled in the art from this disclosure.

須知,本說明書所附圖式所繪示之結構、比例、大小等,均僅用以配合說明書所揭示之內容,以供熟悉此技藝之人士之瞭解與閱讀,並非用以限定本發明可實施之限定條件,故不具技術上之實質意義,任何結構之修飾、比例關係之改變或大小之調整,在不影響本發明所能產生之功效及所能達成之目的下,均應仍落在本發明所揭示之技術內容得能涵蓋之範圍內。同時,本說明書中所引用之如“上”、“下”、“第一”、“第二”、“兩”及“一”等之用語,亦僅為便於敘述之明瞭,而非用以限定本發明可實施之範圍,其相對關係之改變或調整,在無實質變更技術內容下,當亦視為本發明可實施之範疇。 It is to be understood that the structure, the proportions, the size, and the like of the present invention are intended to be used in conjunction with the disclosure of the specification, and are not intended to limit the invention. The conditions are limited, so it is not technically meaningful. Any modification of the structure, change of the proportional relationship or adjustment of the size should remain in this book without affecting the effects and the objectives that can be achieved by the present invention. The technical content disclosed in the invention can be covered. In the meantime, the terms "upper", "lower", "first", "second", "two" and "one" as used in this specification are also for convenience of description, not for The scope of the invention can be implemented, and the relative changes or adjustments of the invention are considered to be within the scope of the invention.

第2圖係為本發明之封裝結構2之第一實施例之剖面示意圖。於本實施例中,該封裝結構2係為系統級封裝(System in package,簡稱SiP)之射頻(Radio frequency,簡稱RF)模組。 2 is a schematic cross-sectional view showing a first embodiment of the package structure 2 of the present invention. In this embodiment, the package structure 2 is a system-in-package (SiP) radio frequency (RF) module.

如第2圖所示,該封裝結構2係包括:複數電子元件21,21’、結合於部分該電子元件21上之一屏蔽件22、以 及包覆該些電子元件21,21’與該屏蔽件22之封裝材23。 As shown in FIG. 2, the package structure 2 includes: a plurality of electronic components 21, 21', a shield 22 coupled to a portion of the electronic component 21, And encapsulating the electronic components 21, 21' and the package 23 of the shield 22.

於本實施例中,該封裝結構2之製法係先將一屏蔽件22結合於部分該電子元件21上,再以封裝材23包覆該些電子元件21,21’與該屏蔽件22。 In the present embodiment, the package structure 2 is formed by first bonding a shield member 22 to a portion of the electronic component 21, and then encapsulating the electronic components 21, 21' and the shield member 22 with a package member 23.

所述之電子元件21,21’係為如半導體晶片之主動元件、或如電阻、電容及電感之被動元件。 The electronic components 21, 21' are active components such as semiconductor wafers or passive components such as resistors, capacitors and inductors.

於本實施例中,部分該電子元件21係為低頻主動元件,且該低頻係指3兆赫(MHz)以下,而部分該電子元件21’係為被動元件。 In the present embodiment, part of the electronic component 21 is a low frequency active component, and the low frequency means 3 megahertz (MHz) or less, and part of the electronic component 21' is a passive component.

所述之屏蔽件22係具有相對之第一表面22a與第二表面22b,且該屏蔽件22之第一表面22a藉由一結合層24接觸結合於該電子元件21之上表面21a上,使該結合層24形成於該屏蔽件22之第一表面22a與該電子元件21之間。 The shielding member 22 has an opposite first surface 22a and a second surface 22b, and the first surface 22a of the shielding member 22 is contact-bonded to the upper surface 21a of the electronic component 21 by a bonding layer 24. The bonding layer 24 is formed between the first surface 22a of the shield 22 and the electronic component 21.

於本實施例中,該屏蔽件22係包含一磁性金屬氧化層220(magnetic metal oxide)與夾設該磁性金屬氧化層220之兩保護層221,221’。具體地,形成該磁性金屬氧化層220之材質係包含錳鋅(Mn-Zn)鐵氧磁體(ferrite)或鎳鋅(Ni-Zn)鐵氧磁體,且形成該保護層221,221’之材質係包含低溫共燒多層陶瓷(Low Temperature Co-fired Ceramic,簡稱LTCC)、高溫共燒多層陶瓷(High Temperature Co-fired Ceramic,簡稱HTCC)、金屬或玻璃。 In this embodiment, the shielding member 22 includes a magnetic metal oxide layer 220 and two protective layers 221, 221' sandwiching the magnetic metal oxide layer 220. Specifically, the material forming the magnetic metal oxide layer 220 includes a manganese zinc (Mn-Zn) ferrite or nickel-zinc (Ni-Zn) ferrite magnet, and the material forming the protective layer 221, 221' includes Low Temperature Co-fired Ceramic (LTCC), High Temperature Co-fired Ceramic (HTCC), metal or glass.

再者,該屏蔽件22係完全遮蓋該電子元件21,如第2圖所示。或者,該屏蔽件22’亦可部分遮蓋該電子元件 21,如第2’圖所示。 Furthermore, the shield 22 completely covers the electronic component 21 as shown in FIG. Alternatively, the shield 22' may partially cover the electronic component 21, as shown in Figure 2'.

又,形成該結合層24之材質係為環氧樹脂(epoxy)或黏膜(film)。 Further, the material forming the bonding layer 24 is an epoxy or a film.

所述之封裝材23未形成於該屏蔽件22之第一表面22a與該些電子元件21,21’之間。 The package material 23 is not formed between the first surface 22a of the shield member 22 and the electronic components 21, 21'.

於本實施例中,該屏蔽件22之第二表面22b未外露於該封裝材23。於其它實施例中,可藉由移除該封裝材23之部分材質,使該屏蔽件22之第二表面22b外露於該封裝材23’,如第2’圖所示。 In this embodiment, the second surface 22b of the shield 22 is not exposed to the package 23. In other embodiments, the second surface 22b of the shield 22 can be exposed to the package 23' by removing part of the material of the package 23, as shown in FIG.

另外,所述之封裝結構2復包括一承載件20,係供承載該些電子元件21,21’,如該電子元件21以其下表面21b結合至該承載件20上。例如,該承載件20係為電路板或陶瓷板,其表面形成有電性連接該些電子元件21,21’之線路層(圖略)。具體地,如第2圖所示之覆晶方式,該電子元件21以複數如導電凸塊之導電元件210電性連接該線路層。或者,如第2”圖所示之打線方式,該電子元件21以複數如銲線之導電元件210’電性連接該線路層。 In addition, the package structure 2 further includes a carrier 20 for carrying the electronic components 21, 21', such as the electronic component 21 being bonded to the carrier 20 with its lower surface 21b. For example, the carrier 20 is a circuit board or a ceramic board having a circuit layer (not shown) electrically connected to the electronic components 21, 21'. Specifically, as in the flip chip mode shown in FIG. 2, the electronic component 21 is electrically connected to the circuit layer by a plurality of conductive elements 210 such as conductive bumps. Alternatively, as shown in Fig. 2, the electronic component 21 is electrically connected to the wiring layer by a plurality of conductive elements 210' such as bonding wires.

再者,該承載件20亦可有內部線路層(圖略),且該承載件20可藉由複數銲球(圖略)外接如電路板之其它電子裝置(圖略)。然而,有關承載件20之種類繁多,並不限於圖示。 In addition, the carrier 20 can also have an internal circuit layer (not shown), and the carrier 20 can be externally connected to other electronic devices such as a circuit board by a plurality of solder balls (not shown). However, the variety of the carrier 20 is not limited to the illustration.

第2A至2C圖係為本發明之屏蔽件22的製法之立體示意圖。 2A to 2C are perspective views showing the manufacturing method of the shield member 22 of the present invention.

如第2A圖所示,藉由塗膠印刷(paste printing)方式 形成磁性金屬氧化層220於一保護層221上。 As shown in Figure 2A, by means of paste printing A magnetic metal oxide layer 220 is formed on a protective layer 221.

如第2B圖所示,堆疊另一保護層221’於該磁性金屬氧化層220上,使該磁性金屬氧化層220位於該些保護層221,221’之間。 As shown in FIG. 2B, another protective layer 221' is stacked on the magnetic metal oxide layer 220 such that the magnetic metal oxide layer 220 is located between the protective layers 221, 221'.

如第2C及2C’圖所示,壓合該磁性金屬氧化層220與該些保護層221,221’,使該屏蔽件22之結構平整,再以燒結(cofired)或固化(curing)方式,使該屏蔽件22之結構緊密結合。之後以切割(saw)或雷射劃線(laser scribing)方式沿如第2C圖所示之切割路徑S進行切單(singulation)製程,以獲取複數個屏蔽件22。 As shown in FIGS. 2C and 2C', the magnetic metal oxide layer 220 and the protective layers 221, 221' are pressed to planarize the shield 22, and then cofired or cured. The structure of the shield 22 is tightly coupled. Thereafter, a singulation process is performed along a cutting path S as shown in FIG. 2C in a saw or laser scribing manner to obtain a plurality of shields 22.

於另一實施例中,當進行第2B圖所示之製程時,亦可堆疊該結合層24於該磁性金屬氧化層220上,即以該結合層24取代該另一保護層221’,如第3圖所示,使該磁性金屬氧化層220位於該保護層221與該結合層24之間。因此,如第3圖所示之封裝結構3之第二實施例,其屏蔽件32僅於該磁性金屬氧化層220之上側具有該保護層221,且該保護層221可選擇性外露於該封裝材23’。 In another embodiment, when the process shown in FIG. 2B is performed, the bonding layer 24 may be stacked on the magnetic metal oxide layer 220, that is, the bonding layer 24 is substituted for the other protective layer 221', such as As shown in FIG. 3, the magnetic metal oxide layer 220 is placed between the protective layer 221 and the bonding layer 24. Therefore, in the second embodiment of the package structure 3 shown in FIG. 3, the shield member 32 has the protective layer 221 only on the upper side of the magnetic metal oxide layer 220, and the protective layer 221 is selectively exposed to the package. Material 23'.

另外,如第3’圖所示,該封裝結構3’之屏蔽件32’亦可僅於該磁性金屬氧化層220之下側具有該保護層221,但該磁性金屬氧化層220不會外露於該封裝材23。 In addition, as shown in FIG. 3', the shielding member 32' of the package structure 3' may have the protective layer 221 only on the lower side of the magnetic metal oxide layer 220, but the magnetic metal oxide layer 220 is not exposed. The package material 23.

本發明復提供一種屏蔽件22,32,係包括:一磁性金屬氧化層220、以及形成於該磁性金屬氧化層220之一表面上的一保護層221。 The present invention further provides a shield member 22, 32 comprising: a magnetic metal oxide layer 220, and a protective layer 221 formed on a surface of the magnetic metal oxide layer 220.

所述之磁性金屬氧化層220之材質係包含錳鋅鐵氧磁 體或鎳鋅鐵氧磁體。 The magnetic metal oxide layer 220 is made of manganese zinc ferrite. Body or nickel-zinc ferrite magnet.

所述之保護層221之材質係包含低溫共燒多層陶瓷、高溫共燒多層陶瓷、金屬或玻璃。 The material of the protective layer 221 is a low temperature co-fired multilayer ceramic, a high temperature co-fired multilayer ceramic, metal or glass.

於一實施例中,所述之屏蔽件22復包括另一保護層221’,係形成於該磁性金屬氧化層220之另一表面上,使該磁性金屬氧化層220位於該些保護層221,221’之間,且形成該另一保護層221’之材質係包含低溫共燒多層陶瓷、高溫共燒多層陶瓷、金屬或玻璃。 In one embodiment, the shielding member 22 further includes another protective layer 221' formed on the other surface of the magnetic metal oxide layer 220 such that the magnetic metal oxide layer 220 is located on the protective layers 221, 221' The material between the other protective layer 221' is formed by a low-temperature co-fired multilayer ceramic, a high-temperature co-fired multilayer ceramic, a metal or a glass.

綜上所述,本發明之封裝結構中,主要藉由該屏蔽件直接結合於該電子元件上之設計,使該屏蔽件設於該封裝材內部,而非將該屏蔽件設於該封裝材外面,故縮短屏蔽與干擾源距離,以最佳化低頻電磁場隔離效果,使該屏蔽件能有效對低頻之電子元件產生屏蔽效果,而避免該低頻之電子元件之訊號發生錯誤。 In summary, in the package structure of the present invention, the shielding member is directly disposed on the electronic component by the design of the shielding member directly disposed on the electronic component, instead of the shielding member being disposed on the packaging material. Outside, the distance between the shielding and the interference source is shortened to optimize the low-frequency electromagnetic field isolation effect, so that the shielding member can effectively shield the low-frequency electronic components, and the signal of the low-frequency electronic components is prevented from being wrong.

再者,由於該屏蔽件直接結合接觸於該低頻之電子元件上,可對該低頻之電子元件提供完整良好之低頻磁場屏蔽。 Moreover, since the shield is directly bonded to the low frequency electronic component, the low frequency electronic component can be provided with a complete good low frequency magnetic field shield.

又,該屏蔽件設於該封裝材內部,以避免習知於封裝材外形成金屬薄膜所導致製程時間長及成本高等之問題。 Moreover, the shielding member is disposed inside the packaging material to avoid the problems of long process time and high cost caused by the formation of a metal thin film outside the packaging material.

上述實施例係用以例示性說明本發明之原理及其功效,而非用於限制本發明。任何熟習此項技藝之人士均可在不違背本發明之精神及範疇下,對上述實施例進行修改。因此本發明之權利保護範圍,應如後述之申請專利範圍所列。 The above embodiments are intended to illustrate the principles of the invention and its effects, and are not intended to limit the invention. Any of the above-described embodiments may be modified by those skilled in the art without departing from the spirit and scope of the invention. Therefore, the scope of protection of the present invention should be as set forth in the appended claims.

2‧‧‧封裝結構 2‧‧‧Package structure

20‧‧‧承載件 20‧‧‧Carrier

21、21’‧‧‧電子元件 21, 21'‧‧‧ Electronic components

21a‧‧‧上表面 21a‧‧‧Upper surface

21b‧‧‧下表面 21b‧‧‧ lower surface

210‧‧‧導電元件 210‧‧‧Conductive components

22‧‧‧屏蔽件 22‧‧‧Shield

22a‧‧‧第一表面 22a‧‧‧ first surface

22b‧‧‧第二表面 22b‧‧‧ second surface

220‧‧‧磁性金屬氧化層 220‧‧‧Magnetic metal oxide layer

221、221’‧‧‧保護層 221, 221’ ‧ ‧ protective layer

23‧‧‧封裝材 23‧‧‧Package

24‧‧‧結合層 24‧‧‧Combination layer

Claims (23)

一種封裝結構,係包括:電子元件;屏蔽件,係結合於該電子元件上,且該屏蔽件係包含磁性金屬氧化層與設於該磁性金屬氧化層上之保護層;以及封裝材,係覆蓋該電子元件與該屏蔽件。 A package structure includes: an electronic component; a shield member coupled to the electronic component, wherein the shield member comprises a magnetic metal oxide layer and a protective layer disposed on the magnetic metal oxide layer; and the package material is covered The electronic component and the shield. 如申請專利範圍第1項所述之封裝結構,其中,該電子元件係為主動元件或被動元件。 The package structure of claim 1, wherein the electronic component is an active component or a passive component. 如申請專利範圍第1項所述之封裝結構,其中,形成該磁性金屬氧化層之材質係包含錳鋅鐵氧磁體或鎳鋅鐵氧磁體。 The package structure according to claim 1, wherein the material for forming the magnetic metal oxide layer comprises a manganese zinc ferrite magnet or a nickel zinc ferrite magnet. 如申請專利範圍第1項所述之封裝結構,其中,形成該保護層之材質係包含低溫共燒多層陶瓷、高溫共燒多層陶瓷、金屬或玻璃。 The package structure according to claim 1, wherein the material forming the protective layer comprises a low temperature co-fired multilayer ceramic, a high temperature co-fired multilayer ceramic, a metal or a glass. 如申請專利範圍第1項所述之封裝結構,其中,該磁性金屬氧化層之相對兩側設有該保護層。 The package structure according to claim 1, wherein the protective layer is provided on opposite sides of the magnetic metal oxide layer. 如申請專利範圍第1項所述之封裝結構,其中,該磁性金屬氧化層之其中一側設有該保護層。 The package structure of claim 1, wherein the protective layer is provided on one side of the magnetic metal oxide layer. 如申請專利範圍第1項所述之封裝結構,其中,該屏蔽件係藉由一結合層結合於該電子元件上,使該結合層形成於該屏蔽件與該電子元件之間。 The package structure of claim 1, wherein the shield is bonded to the electronic component by a bonding layer, and the bonding layer is formed between the shielding component and the electronic component. 如申請專利範圍第1項所述之封裝結構,其中,該屏蔽件係完全或部分遮蓋該電子元件。 The package structure of claim 1, wherein the shield completely or partially covers the electronic component. 如申請專利範圍第1項所述之封裝結構,其中,該屏蔽件之部分表面係外露於該封裝材。 The package structure of claim 1, wherein a part of the surface of the shield is exposed to the package. 如申請專利範圍第1項所述之封裝結構,復包括承載件,係承載該電子元件並與該電子元件電性連接。 The package structure as claimed in claim 1, further comprising a carrier that carries the electronic component and is electrically connected to the electronic component. 一種屏蔽件之製法,係包括:形成磁性金屬氧化層於一保護層上;以及壓合該磁性金屬氧化層與該保護層。 A method of fabricating a shield includes: forming a magnetic metal oxide layer on a protective layer; and pressing the magnetic metal oxide layer and the protective layer. 如申請專利範圍第11項所述之屏蔽件之製法,其中,形成該磁性金屬氧化層之材質係包含錳鋅鐵氧磁體或鎳鋅鐵氧磁體。 The method for manufacturing a shield according to claim 11, wherein the material for forming the magnetic metal oxide layer comprises a manganese zinc ferrite magnet or a nickel zinc ferrite magnet. 如申請專利範圍第11項所述之屏蔽件之製法,其中,形成該保護層之材質係包含低溫共燒多層陶瓷、高溫共燒多層陶瓷、金屬或玻璃。 The method for manufacturing a shield according to claim 11, wherein the material forming the protective layer comprises a low temperature co-fired multilayer ceramic, a high temperature co-fired multilayer ceramic, a metal or a glass. 如申請專利範圍第11項所述之屏蔽件之製法,其中,該磁性金屬氧化層藉由塗膠印刷方式形成於該保護層上。 The method of fabricating a shield according to claim 11, wherein the magnetic metal oxide layer is formed on the protective layer by a gluing printing method. 如申請專利範圍第11項所述之屏蔽件之製法,復包括於壓合後,進行燒結或固化製程。 The method for preparing the shield member according to claim 11 of the patent application is included in the sintering or curing process after the pressing. 如申請專利範圍第11項所述之屏蔽件之製法,復包括於壓合前,堆疊另一保護層於該磁性金屬氧化層上,使該磁性金屬氧化層位於該些保護層之間。 The method for manufacturing the shielding member according to claim 11, wherein before the pressing, another protective layer is stacked on the magnetic metal oxide layer such that the magnetic metal oxide layer is located between the protective layers. 如申請專利範圍第16項所述之屏蔽件之製法,其中,形成該另一保護層之材質係包含低溫共燒多層陶瓷、高溫共燒多層陶瓷、金屬或玻璃。 The method for manufacturing a shield according to claim 16, wherein the material forming the other protective layer comprises a low temperature co-fired multilayer ceramic, a high temperature co-fired multilayer ceramic, a metal or a glass. 如申請專利範圍第11項所述之屏蔽件之製法,復包括於壓合前,堆疊結合層於該磁性金屬氧化層上,使該磁性金屬氧化層位於該保護層與該結合層之間。 The method for manufacturing the shielding member according to claim 11, wherein before the pressing, the bonding layer is stacked on the magnetic metal oxide layer such that the magnetic metal oxide layer is located between the protective layer and the bonding layer. 一種屏蔽件,係包括:磁性金屬氧化層;以及保護層,係形成於該磁性金屬氧化層之一表面上。 A shielding member comprising: a magnetic metal oxide layer; and a protective layer formed on a surface of the magnetic metal oxide layer. 如申請專利範圍第19項所述之屏蔽件,其中,形成該磁性金屬氧化層之材質係包含錳鋅鐵氧磁體或鎳鋅鐵氧磁體。 The shielding member according to claim 19, wherein the material forming the magnetic metal oxide layer comprises a manganese zinc ferrite magnet or a nickel zinc ferrite magnet. 如申請專利範圍第19項所述之屏蔽件,其中,形成該保護層之材質係包含低溫共燒多層陶瓷、高溫共燒多層陶瓷、金屬或玻璃。 The shielding member according to claim 19, wherein the material forming the protective layer comprises a low temperature co-fired multilayer ceramic, a high temperature co-fired multilayer ceramic, a metal or a glass. 如申請專利範圍第19項所述之屏蔽件,復包括另一保護層,係形成於該磁性金屬氧化層之另一表面上,使該磁性金屬氧化層位於該些保護層之間。 The shielding member according to claim 19, further comprising another protective layer formed on the other surface of the magnetic metal oxide layer such that the magnetic metal oxide layer is located between the protective layers. 如申請專利範圍第22項所述之屏蔽件,其中,形成該另一保護層之材質係包含低溫共燒多層陶瓷、高溫共燒多層陶瓷、金屬或玻璃。 The shielding member according to claim 22, wherein the material forming the other protective layer comprises a low temperature co-fired multilayer ceramic, a high temperature co-fired multilayer ceramic, a metal or a glass.
TW104123382A 2015-07-20 2015-07-20 Package structure and shielding member and method for fabricating the same TWI581380B (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
TW104123382A TWI581380B (en) 2015-07-20 2015-07-20 Package structure and shielding member and method for fabricating the same
CN201510456892.0A CN106373926B (en) 2015-07-20 2015-07-30 Package structure, shielding member and method for fabricating the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW104123382A TWI581380B (en) 2015-07-20 2015-07-20 Package structure and shielding member and method for fabricating the same

Publications (2)

Publication Number Publication Date
TW201705384A true TW201705384A (en) 2017-02-01
TWI581380B TWI581380B (en) 2017-05-01

Family

ID=57880367

Family Applications (1)

Application Number Title Priority Date Filing Date
TW104123382A TWI581380B (en) 2015-07-20 2015-07-20 Package structure and shielding member and method for fabricating the same

Country Status (2)

Country Link
CN (1) CN106373926B (en)
TW (1) TWI581380B (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI641090B (en) * 2017-03-07 2018-11-11 矽品精密工業股份有限公司 Electronic package
TWI645518B (en) * 2017-02-16 2018-12-21 矽品精密工業股份有限公司 Package structure and the manufacture thereof

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4133637B2 (en) * 2003-07-11 2008-08-13 三井化学株式会社 Electromagnetic wave shielding sheet for semiconductor element adhesion and semiconductor device
US20080315374A1 (en) * 2007-06-25 2008-12-25 Sung Soo Kim Integrated circuit package-in-package system with magnetic film
US8378383B2 (en) * 2009-03-25 2013-02-19 Stats Chippac, Ltd. Semiconductor device and method of forming a shielding layer between stacked semiconductor die
TW201214653A (en) * 2010-09-23 2012-04-01 Siliconware Precision Industries Co Ltd Package structure capable of discharging static electricity and preventing electromagnetic wave interference
KR20130058292A (en) * 2011-11-25 2013-06-04 한국전자통신연구원 Apparatus for shielding electromagnetic wave
TW201351599A (en) * 2012-06-04 2013-12-16 矽品精密工業股份有限公司 Semiconductor package and fabrication method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI645518B (en) * 2017-02-16 2018-12-21 矽品精密工業股份有限公司 Package structure and the manufacture thereof
TWI641090B (en) * 2017-03-07 2018-11-11 矽品精密工業股份有限公司 Electronic package

Also Published As

Publication number Publication date
CN106373926A (en) 2017-02-01
TWI581380B (en) 2017-05-01
CN106373926B (en) 2020-11-03

Similar Documents

Publication Publication Date Title
US20230299462A1 (en) Semiconductor package including antenna substrate and manufacturing method thereof
CN108074878B (en) Composite magnetic sealing material and electronic circuit package using same
JP6469572B2 (en) Antenna-integrated radio module and method of manufacturing the module
TWI603456B (en) Electronic package structure and method for fabricating the same
US9743519B2 (en) High-frequency component and high-frequency module including the same
TWI462675B (en) Semiconductor device and manufacturing method thereof
TWI614870B (en) Package structure and a method for fabricating the same
US8536684B2 (en) Method of assembling shielded integrated circuit device
TWI438885B (en) Semiconductor package and fabrication method thereof
US20140035097A1 (en) Semiconductor package having an antenna and manufacturing method thereof
US20110127655A1 (en) Semiconductor device
TWI605564B (en) Package structure and method for fabricating the same
US20070053167A1 (en) Electronic circuit module and manufacturing method thereof
JP2003273571A (en) High-frequency module for shielding inter-element radio wave interference
TW201739031A (en) Electronic package and the manufacture thereof
WO2018224051A1 (en) Anti-electromagnetic interference radio frequency module and implementation method therefor
WO2022247294A1 (en) Chip package structure and manufacturing method, and electronic device
TW201545304A (en) Semiconductor package and method of manufacture
TW201312662A (en) Semiconductor package and fabrication method thereof
TWI581380B (en) Package structure and shielding member and method for fabricating the same
JP2009111010A (en) Semiconductor device and method of manufacturing the same
KR20140147613A (en) Wafer Level Semiconductor Package And Method for Manufacturing of The Same
US20160081234A1 (en) Package structure
TW201446089A (en) Semiconductor package and method of manufacture
JP2010258137A (en) High-frequency module and manufacturing method thereof