CN107918595A - Control device, the control device in particular for motor vehicles - Google Patents
Control device, the control device in particular for motor vehicles Download PDFInfo
- Publication number
- CN107918595A CN107918595A CN201710905695.1A CN201710905695A CN107918595A CN 107918595 A CN107918595 A CN 107918595A CN 201710905695 A CN201710905695 A CN 201710905695A CN 107918595 A CN107918595 A CN 107918595A
- Authority
- CN
- China
- Prior art keywords
- data
- control device
- control
- frame
- computing unit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000002093 peripheral effect Effects 0.000 claims abstract description 35
- 230000005540 biological transmission Effects 0.000 claims description 19
- 238000000034 method Methods 0.000 claims description 13
- 238000006243 chemical reaction Methods 0.000 claims 1
- 108010094028 Prothrombin Proteins 0.000 description 3
- 238000012512 characterization method Methods 0.000 description 3
- AGVAZMGAQJOSFJ-WZHZPDAFSA-M cobalt(2+);[(2r,3s,4r,5s)-5-(5,6-dimethylbenzimidazol-1-yl)-4-hydroxy-2-(hydroxymethyl)oxolan-3-yl] [(2r)-1-[3-[(1r,2r,3r,4z,7s,9z,12s,13s,14z,17s,18s,19r)-2,13,18-tris(2-amino-2-oxoethyl)-7,12,17-tris(3-amino-3-oxopropyl)-3,5,8,8,13,15,18,19-octamethyl-2 Chemical compound [Co+2].N#[C-].[N-]([C@@H]1[C@H](CC(N)=O)[C@@]2(C)CCC(=O)NC[C@@H](C)OP(O)(=O)O[C@H]3[C@H]([C@H](O[C@@H]3CO)N3C4=CC(C)=C(C)C=C4N=C3)O)\C2=C(C)/C([C@H](C\2(C)C)CCC(N)=O)=N/C/2=C\C([C@H]([C@@]/2(CC(N)=O)C)CCC(N)=O)=N\C\2=C(C)/C2=N[C@]1(C)[C@@](C)(CC(N)=O)[C@@H]2CCC(N)=O AGVAZMGAQJOSFJ-WZHZPDAFSA-M 0.000 description 3
- BTCSSZJGUNDROE-UHFFFAOYSA-N gamma-aminobutyric acid Chemical compound NCCCC(O)=O BTCSSZJGUNDROE-UHFFFAOYSA-N 0.000 description 3
- 238000002485 combustion reaction Methods 0.000 description 2
- 230000002349 favourable effect Effects 0.000 description 2
- 241000208340 Araliaceae Species 0.000 description 1
- 241001269238 Data Species 0.000 description 1
- 235000005035 Panax pseudoginseng ssp. pseudoginseng Nutrition 0.000 description 1
- 235000003140 Panax quinquefolius Nutrition 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000003745 diagnosis Methods 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 235000008434 ginseng Nutrition 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 238000005070 sampling Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
- G06F13/4291—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus using a clocked protocol
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/403—Bus networks with centralised control, e.g. polling
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
- G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B60—VEHICLES IN GENERAL
- B60R—VEHICLES, VEHICLE FITTINGS, OR VEHICLE PARTS, NOT OTHERWISE PROVIDED FOR
- B60R16/00—Electric or fluid circuits specially adapted for vehicles and not otherwise provided for; Arrangement of elements of electric or fluid circuits specially adapted for vehicles and not otherwise provided for
- B60R16/02—Electric or fluid circuits specially adapted for vehicles and not otherwise provided for; Arrangement of elements of electric or fluid circuits specially adapted for vehicles and not otherwise provided for electric constitutive elements
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
- G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/382—Information transfer, e.g. on bus using universal interface adapter
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L5/00—Arrangements affording multiple use of the transmission path
- H04L5/003—Arrangements for allocating sub-channels of the transmission path
- H04L5/0044—Arrangements for allocating sub-channels of the transmission path allocation of payload
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L5/00—Arrangements affording multiple use of the transmission path
- H04L5/003—Arrangements for allocating sub-channels of the transmission path
- H04L5/0053—Allocation of signaling, i.e. of overhead other than pilot signals
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Signal Processing (AREA)
- Computer Networks & Wireless Communication (AREA)
- Mechanical Engineering (AREA)
- Computer Hardware Design (AREA)
- Information Transfer Systems (AREA)
- Combined Controls Of Internal Combustion Engines (AREA)
Abstract
The present invention provides control device, the control device in particular for motor vehicles.The present invention relates to a kind of control device（10）, in particular for motor vehicles, wherein control device（10）Including computing unit（12）, the computing unit is configured to pass through universal serial bus（16）Periodically by data frame（17）It is transferred at least one peripheral cell that will be by means of control signal to manipulate（14）.Here, computing unit（12）It is configured to that the first data of the control signal will be characterized（22）It is inserted into each data frame（17）In.
Description
Technical field
The present invention relates to control device as described in the preamble according to claim 1 and according to patent right arranged side by side
It is required that the method.
Background technology
Become known for the control device of motor vehicles from the market, performed by means of the control device with high computing capability
Multiple complex control tasks.Here, especially need the swapping data in the different piece of control device.Gradual small-sized
During change or performance boost, the structure space available for electric wiring becomes shorter scarce and more expensive.Led from the specialty
The patent in domain discloses e.g. 10 2,005 042 493 A1 of DE.
The content of the invention
The problem of present invention is based on is by control device according to claim 1 and by according to power arranged side by side
Profit requires the method to solve.Scheme is advantageously improved to be illustrated in the dependent claims.For the present invention
Important feature can be found in the description that follows and in the accompanying drawings in addition, wherein the feature can not only individually but also
It is important for the present invention with different combinations, and this is not explicitly pointed out again.
The present invention relates to a kind of control device in particular for motor vehicles, the wherein control device includes calculating single
Member, the computing unit be configured to by universal serial bus periodically by data frame transfer to it is at least one will by means of control
Signal processed is come the peripheral cell that manipulates.Here, the computing unit is configured to that the first data of the control signal will be characterized
It is inserted into each data frame.
For example, data frame is generated in the case where using N bit string line shift registers.Here, N Bits Serial shift LDs
Device is periodically concurrently loaded the first data after N number of serial shift clock respectively, therefore first data are inserted
Enter into corresponding data frame." computing unit " current signature is, it includes all in order to form data frame and for number
According to the device needed for the serial transmission of frame.In wider range of understanding, computing unit is further included for producing at least in part
The device of one data.Equally, the mode that computing unit can include being used to be suitable for serial transmission produces the second data and one
Rise and be inserted into data frame, as will further be explained further below.In a kind of designing scheme, computing unit is at least in part
Be a part for processor core or be at least in part microcontroller a part.
The invention has the advantages that：First data are continuously according to the time grid of the data frame periodically formed
（Raster）Peripheral cell is transferred to, wherein occurring without interruption frame by frame during the transmission according to the present invention.Therefore, the first number
According to transmission without the time gap.Correspondingly, the shake of the transmission of the first data is characterized（Clock fluctuates or vibration）Advantageously
It can be minimized.Due to the shake being so minimized, therefore the first data can replace being had by means of corresponding be electrically connected
Sharp ground is jointly transmitted by means of universal serial bus, it is possible thereby to save circuit and therefore save on the layout area on circuit board.
In addition, the connection terminal at the integrated semiconductor circuit of control device（“pins（Pin）”）It can be saved or be used for it
Its purpose.
In a kind of designing scheme of control device, computing unit is configured to the second number in addition to the first data
According to being inserted at least a portion of data frame, wherein especially the second data include configuration data and/or control data and/or
Diagnostic data.Thus, the second data advantageously can be similarly transmitted together, wherein the transmission of the first data is absolutely not additional
Ground is delayed by, interrupts or impacted in other ways.The shake of the first data is not thus caused especially.In a kind of designing scheme
In, computing unit is further included for producing configuration data at least in part and/or controlling the device of data and/or diagnostic data.
Second data can for example include so-called " order " or appointing for peripheral cell should be transferred to by computing unit
Anticipate other data.Here, do not need forcibly continuously to transmit the second data.For example, the second data are only only temporarily（I.e. with
First data difference is not in each data frame）And/or only partially exist, and correspondingly need only to be passed at that time
It is defeated.
In addition, configuration data and/or control data and/or diagnostic data can have arbitrary structure itself.For example, this
A little data can be at least partly as parallel data, for example as byte presence.These data equally can be at least in part
Exist as multiple mono signals independent of each other.
In another designing scheme, 1 data bit of the first number N of each data frame is assigned to the first data, and
2 data bit of the second number N of data frame are temporarily, at least assigned to the second data, wherein preferably the first number N 1 is more than
Second number N 2.Thus, the first data are transmitted in each data frame, wherein making the first data advantageously relative to the second number
The factually transmission capacity of existing generally bigger.
Provided in a kind of designing scheme, computing unit is configured in the case of data frames different in time not
Number N 1 and/or number N 2 are measured together.For example,（It is defined in time）One group of data frame can have definite number
N1 and N2, and it is back to back（It is defined in time）One group of data frame can have number N 1 unlike this and/or
N2.In one embodiment, number N 1 and/or N2 even can be different to each data frame.Thus, by the position of data frame
The transmission capacity of number characterization can be advantageously dispatched in the first data and the second data for corresponding demand.
Provided in another designing scheme, peripheral cell is disposed in control device, and wherein peripheral cell especially has
There is at least one manipulation component for actuator.Therefore, computing unit can also advantageously be implemented to holding by universal serial bus
The control of the comparison time-critical of row device.For example, actuator can be the electromagnetic actuator of the atomizer for internal combustion engine.
In another designing scheme, at least one real-time control signal of the first data characterization, especially at least a passages through which vital energy circulates
The control signal of width modulation.For example, the control signal through pulsewidth modulation can be advantageously used for manipulating electromagnetic actuator.Calculate
Unit can be postponed the control signal with smaller jitter transfer to peripheral cell with smaller by universal serial bus
Corresponding manipulation component.
According to a kind of embodiment, such " real-time control signal " is characterized in that, the two of maximum substantially data frame
The delay and/or shake of a time cycle can also be tolerated.This also will further be explained below.
In a kind of preferred design, the second data do not include such live signal.Thus, the second data are advantageously
It can be serialized at least in part, as also will further be explained below.As such, it is advantageous to can be with a data frame one
Play the first additional data of transmission.
In another designing scheme, control device has at least one converter, and the converter is configured to from working as
2 the second data of the second number N are produced in preceding configuration data and/or control data and/or diagnostic data.Thus, number is configured
According to and/or control data and/or diagnostic data can before being inserted into data frame it is advantageously processed.Such as realize and be directed to
Second data are inserted into frame information or other additional informations.
In another designing scheme, converter is configured to parallel-to-series converter, wherein configuration data and/or control
Data and/or diagnostic data temporarily, at least separately or jointly have the position of 2 bigger of number N than the second data
It is wide.For example, configuration data and/or control data and/or diagnostic data（" data "）Can at least partly as byte and/or
Exist at least partly as multiple mono signals independent of each other.Then, above-mentioned data advantageously can at least in part by
Serialization.Correspondingly, the number N 2 of the second data can be reduced, and the number N 2 of the first data can be extended.One
In kind embodiment, number N 2 is 1, and thus above-mentioned data are directed to transmission to a certain extent it may be said that by " completely serially
Change ".
In another designing scheme, converter or parallel-to-series converter are configured to for the frame of serial transmission
Information and/or control information are inserted into the second data.Thus, configuration data and/or control data and/or diagnostic data are favourable
Ground can be correctly identified after the transmission, without additional synchrolock etc..
In another designing scheme, converter or parallel-to-series converter include UART interface（English：“Universal
Asynchronous Receiver Transmitter（Universal asynchronous receiver-transmitter）”）.Hereby it is achieved that particularly advantageously from configuration
The second data are produced in data and/or control data and/or diagnostic data.
In another designing scheme, universal serial bus is microsecond bus MSC（English：“Micro Second Channel（It is micro-
Second passage）”）.Thus, it is possibility to have the particular characteristics of microsecond bus are used for control device by profit ground.
In addition, the present invention relates to a kind of method for being used to run the control device in particular for motor vehicles, wherein controlling
Control equipment includes computing unit, and the computing unit is configured to by universal serial bus periodically by data frame transfer to extremely
A few peripheral cell that will be by means of control signal to manipulate.Here, computing unit will characterize the first of the control signal
Data are inserted into each data frame.The advantages of drawing with being had been described above above for control device according to the present invention is similar
Advantage.
In a kind of designing scheme of this method, the second data are inserted into number in addition to the first data by computing unit
According at least a portion of frame, wherein especially the second data include configuration data and/or control data and/or diagnostic data.
In another designing scheme of this method, configuration data and/or control data and/or diagnostic data are temporarily, at least
Separately or jointly there is the bit wide of 2 bigger of number N than the second data, wherein configuration data and/or control number
According to and/or diagnostic data 2 the second data of number N are transformed to according to the type of parallel-to-series converter.
The advantages of drawing for the designing scheme of this method and being had been described above above for the designing scheme of control device class
As advantage.
Brief description of the drawings
The exemplary embodiment of the present invention is then explained with reference to the drawings.In the accompanying drawings：
Fig. 1 shows the first embodiment party with the computing unit being connected to each other by universal serial bus and the control device of peripheral cell
Formula；
Fig. 2 shows the second embodiment party with the computing unit being connected to each other by universal serial bus and the control device of peripheral cell
Formula；And
Fig. 3 shows the flow chart of the method for running the control device according to Fig. 1 or 2.
Also it is used for the element and ginseng of function equivalent even if same reference numerals in different embodiments in all figures
Amount.
Embodiment
Fig. 1 shows the first embodiment of the control device 10 in particular for motor vehicles, and wherein control device 10 wraps
Include computing unit 12（The left side in Fig. 1）, the computing unit is configured to by universal serial bus 16 periodically by data frame
17 are transferred at least one peripheral cell 14 that will be by means of control signal to manipulate（The right in Fig. 1）.Here, computing unit 12
It is configured to the first data 22 for characterizing the control signal being inserted into each data frame 17.Currently, peripheral cell 14
It is disposed in control device 10, wherein peripheral cell 14 is especially used for actuator with least one（It is not shown）Manipulation
Component（It is not shown）.
Computing unit 12 includes the first equipment 18, is periodically transferred to data frame 17 outside with will pass through universal serial bus 16
Enclose unit 14.In short, the N number of data bit that can periodically convey of total number can be continuously transformed to data frame by equipment 18
Transmit to 17 parallel series.
Remaining element of control device 10 is not illustrated for simplicity together in Fig. 1.Control device 10 is correspondingly
Described by means of dotted line frame.In one embodiment, universal serial bus 16 is microsecond bus MSC（English：“Micro
Second Channel（Microsecond passage）”）.
Computing unit 12 is configured to that second data 24 are inserted into data frame 17 in addition to the first data 22 in addition
At least a portion in, wherein especially the second data 24 include configuration data and/or control data and/or diagnostic data.Match somebody with somebody
Put data and/or control data and/or diagnostic data is currently characterized by common reference numeral 28.
Here, 1 data bit of the first number N of each data frame 17 is assigned to the first data 22, and data frame 17
2 data bit of the second number N be temporarily, at least assigned to the second data 24, wherein the first number N 1 be preferably more than second
Number N 2.Exemplarily, the first number N 1 is equal to 12, and the second number N 2 is equal to 4.In one embodiment, the second number
Mesh N2 is 1.Correspondingly, number N 1 can for example be enhanced 3 so that every time（pro Zeit）It can be transmitted by universal serial bus 16
The first especially more data 22.
Currently, the first data 22 characterize at least one real-time control signal, especially at least a control through pulsewidth modulation
Signal processed.For example, the control signal through pulsewidth modulation can be respectively used to the driving stage for manipulating the atomizer of internal combustion engine.
Control device 10 has converter 26, and the converter is configured to from current configuration data and/or control
Data and/or diagnostic data（Reference numeral 28）Middle generation 2 the second data 24 of the second number N.
In Fig. 1, converter 26 is configured to parallel-to-series converter 26, wherein configuration data and/or control data
And/or diagnostic data temporarily, at least separately or jointly has the position of 2 bigger of number N than the second data 24
It is wide.The bit wide is illustratively 8 in Fig. 1.Addedly, converter 26 is configured to for the frame information of serial transmission
30a and/or control information 30b is inserted into the second data 24.Frame information 30a and control information 30b are pellucidly passed by equipment 18
It is defeated, that is to say, that equipment 18 and 20 does not analyze these information and do not change these information yet.
With the first equipment 18 of computing unit 12 accordingly in peripheral cell 14 there are the second equipment 20, so as to by
Number N data bit is established in the form of parallel again in the data frame 17 periodically transmitted by universal serial bus 16.Here,
Peripheral cell 14 is communicated information to by computing unit 12, thus in 22 He of the first and second data included in data frame 17
24 can inerrably and clearly be reproduced in peripheral cell 14 again.
For example, these information are transmitted in mode bit, the mode bit is addedly inserted into data frame 17.One
In kind preferred embodiment, these information are transmitted by additional circuit, and wherein data frame 17 preferably only includes first
With the second data 22 and 24, to this referring to Fig. 2.
For example, universal serial bus 16 can include one, two, three or more electric line or printing circuit board conducting wire.Institute
The number of need or used circuit especially may rely on the degree of the coding of the serial data of data frame 17.For example, can
It can need clock signal 36, data-signal 42 and alternatively synchronizing signal.To this referring now to Fig. 2.
When data-signal 42 includes clock, the data of data frame 17 and synchronizing information or frame information in the form of being encoded
When, or even it is sufficient that single circuit may be for universal serial bus 16.In addition, additional position is needed if necessary, these positions
Addedly it is inserted in data frame 17.But such additional position is not illustrated together in Fig. 1.
With the parallel-to-series converter 26 of computing unit 12 accordingly serial-to-parallel is disposed with peripheral cell 14
Converter 32.Serial-to parallel converter 32 can be in the case where using frame information 30a and/or control information 30b from being resumed
The second data 24' in inerrably and clearly determine original configuration data and/or control data and/or diagnostic data again
（Reference numeral 28'）.First data 22' is resumed inerrably and clearly equally by means of the second equipment 20.
Fig. 2 shows the second embodiment of control device 10.With Fig. 1 similarly, show that calculating is single in left area
Member 12 and shows peripheral cell 14 in right area.Shown in the region of centre of the universal serial bus 16 below Fig. 2
Go out.
In the embodiment of Fig. 2, universal serial bus 16 is so-called " microsecond bus "（English：MSC, Micro Second
Channel（Microsecond passage））.
Clock generator 34 is disposed with computing unit 12, the clock generator is produced to the member shown in Fig. 2
The clock signal 36 that multiple element in part is timed.Clock signal 36 is especially formed posts for the displacement of the first equipment 18
The serial shift clock of storage 18a.Data frame 17 is periodically produced in the case where using shift register 18a for passing
It is defeated by peripheral cell 14.
In addition, clock signal 36 is divided by means of Clock dividers 38 with factor I.The factor I is current
In example for 16 and corresponding to serial shift register 18a digit.Thus, the clock signal 40 after frequency dividing, this point are drawn
Clock signal after frequency is especially realized concurrently receives serial shift register 18a by the first and second data 22 and 24
In.
The universal serial bus 16 of the embodiment of Fig. 2 is currently included the clock signal 36 of clock generator 34 and by clock
The clock signal 40 and the data-signal 42 that is characterized by data frame 17 that frequency divider 38 divides, data-signal phase bit by bit
Include the first data 22 and the second data 24 after ground.Therefore current data frame 17 has 16 digit.Clock signal after frequency dividing
40 characterize synchronizing information at the same time, clearly recover the first data in the equipment 20 of peripheral cell 14 by means of the synchronizing information
22 and second data 24.
In addition, show 5 blocks 44a, 44b, 44c, 44d and 44e, described piece of common real estate altogether in computing unit 12
Raw or 6 real-time control signals of characterization.Currently, the real-time control signal of block 44a, 44b and 44c is by 3 controls through pulsewidth modulation
Signal processed characterizes, and the real-time control signal of block 44d and 44e by should be transferred to peripheral cell 14 altogether 3 patrol
Signal is collected to characterize.
In fig. 2 in top left region, the block marked using reference numeral 28 characterizes corresponding configuration data and/or control number
According to and/or diagnostic data, the configuration data and/or control data and/or diagnostic data can concurrently be inserted in it
Under discribed parallel-to-series converter 26 shift register 26a in.The process passes through vertical block arrow in fig. 2
Symbolically to show.Shift register 26a exemplarily has 16 positions position, and the bit length of wherein shift register 26a can
It is previously given with the bit length of the shift register 18a independently of the first equipment 18.In addition, above-mentioned 16 positions position is included
Through frame information 30a as described in Figure 1 and/or control information 30b.
Clock signal 40 after frequency dividing is fed to shift register 26a as serial shift clock.Thus, shift LD
The clock frequency of device 26a is currently the 1/16 of the shift register 18a of the first equipment 18（wird das Schieberegister
26a vorliegend sechzehnmal langsamer getaktet als das Schieberegister 18a der
ersten Einrichtung 18）.
In the embodiment of Fig. 2, configuration data and/or control data and/or diagnostic data are using shift register
1 Bits Serial form is transformed into the case of 26a.Second number N 2 of the second data 24（Referring to Fig. 1）It is correspondingly 1.Currently,
On the data frame 17 to be transmitted, the second data 14 are inserted into the string of the first equipment 18 before the first data 22 in time
In line shift register 18a.Alternatively, however, the second data 24 can be inserted into any position position in shift register 18a
Put place.
Computing unit 12 is substantially by three signal transmissions to peripheral cell 14：First, data-signal 42 is periodically
The data frame 17 of generation.Second, clock signal 36.3rd, the clock signal 40 after frequency dividing.
Due to the synchronization realized by the clock signal 40 after frequency dividing, data frame 17 only wraps in the embodiment of Fig. 2
Include data, i.e. the first and second data 22 and 24.Therefore, frame information etc. need not be transmitted together in data frame 17.
With the first equipment 18 similarly, the second equipment of peripheral cell 14 also includes shift register 20a, the shift LD
Device equally has the digit of 16.In the case of using shift register 20a, the first and second data 22 and 24 can be from number
Inerrably and clearly it is resumed according in frame 17.
In addition, peripheral cell 14 includes serial-to parallel converter 32（Upper right in fig. 2）, by means of the serial-to-parallel
Second data 24' can be resolved into original configuration data and/or control data and/or diagnostic data again by converter（It is attached
Icon remembers 28'）.For this reason, the second data 24' can be from shift register 20a in the position position similar with shift register 18a
Place is read, and is serially written in the shift register 32a of serial-to parallel converter 32.
Delay between the first original data 22 and the first data 22' being resumed is especially small, and currently shows
The maximum time span for corresponding roughly to two data frames 17 in example property ground.First data 22 are characterized as so-called " control in real time by this
Therefore signal processed ", the real-time control signal can also be used for the control signal of relative time key.
The possible Part I of delay is characterized by the parallel reception in the first data 22 to shift register 18a.And
Row is received and periodically carried out by means of the clock signal 40 after frequency dividing, it follows that a kind of " sampling ".Correspondingly, delay
The time span of first possible part highest substantially data frame 17.
The possible Part II of delay is serially removed by data-signal 42 from shift register 18a（In fig. 2 to
It is right）To characterize.After the substantially time span of data frame 17, all positions of data-signal 42 are all to the right from shift register
It is moved out of, and is correspondingly moved into the shift register 20a of peripheral cell 14 in 18a.
The possible Part III of delay to parallel in shift register 18a by receiving and/or from shift register 20a
In deliver parallel to characterize.The part of delay is smaller, and the maximum substantially clock signal 36 of clock generator 34
One or two time cycle.
The frequency of clock signal 36 is, for example, 40MHz.It can be readily appreciated that the frequency can also have any other value.
Equally, shift register used in difference（Multiple reference numerals）The bit length shown in fig 1 and 2 be merely exemplary
, and can equally have any other value.Equally, the signal or information of the first data 22 and the second data 24 are characterized respectively
Outfit shown in fig 1 and 2（Belegung mit）It is merely exemplary, and arbitrarily can also differently comes
Implement.
The operation of the element shown in fig. 2 of control device 10 preferably so carries out：Clock generator 34 is continuous
Ground is that the serial shift clock of shift register 18a and 20a produce clock signal 36.Meanwhile clock signal 36 is in clock division
By 16 frequency dividings in device 38.Clock signal 40 after frequency dividing formed for parallel-to-series converter 26 shift register 26a and
Shift clock for the shift register 32a of serial-to parallel converter 32.
In addition, the clock signal 40 after frequency dividing be used to perform first and second every 16 clocks step of clock signal 36
Parallel reception in data 22 and 24 to shift register 18a.Meanwhile the content of shift register 26a is serially further（To
It is right）It is shifted 1.Equally, the clock signal 40 after frequency dividing be used to concurrently read every 16 clocks step of clock signal 36
Go out the currently position present in shift register 20a and clock signal 36 back to back 16 clocks step in concurrently into
Row storage.For this reason, shift register 20a has corresponding parallel register, this in the accompanying drawings for simplicity not together by
Show.
Other Clock dividers unshowned in the accompanying drawings by the clock signal 40 after frequency dividing again with factor Ⅱ into
Row frequency dividing, to be produced for the shift register 26a of parallel-to-series converter 26（It is unshowned）Loaded in parallel clock.As
The size that factor I characterizes the shift register 18a of the first equipment 18 is the same, and factor Ⅱ correspondingly characterizes shift register
The size of 26a.Currently, therefore factor Ⅱ is also 16.
By this way, every clock signal 36 256 clock step row configuration datas and/or control data and/or
Parallel reception in diagnostic data to shift register 26a.In peripheral cell 14, serial-to parallel converter 32 correspondingly with
Opposite mode works.Second data 24' is read and is gone here and there from shift register 20a according to the clock signal 40 after frequency dividing
It is written to capablely in shift register 32a.
It is used for the loading clock of the shift register 26a of parallel-to-series converter 26（Or similar clock, this when
Clock is preferably generated in peripheral cell 14 in the case where using frame information 30a and/or control information 30b）It is used to work as
Preceding 256 clocks step every clock signal 36 realizes the data parallel that will be currently respectively included in shift register 32a
Ground, which is handed to, to be disposed in block 28'（It is unshowned）Parallel register.By this way, configuration data and/or control number
According to and/or diagnostic data be resumed, and the possibility being provided in peripheral cell 14 is further handled.
As being capable of recognition, especially the first data 22 are continuously according to the time net of the data frame 17 periodically formed
Lattice（Raster）Peripheral cell 14 is transferred to, wherein occurring without interruption frame by frame during the transmission according to the present invention.Therefore, especially
It is the transmission of the first data 22 without time gap.In a similar way, as long as being currently respectively present the second data 24, this
A little second data are just also transmitted in the case of the delay and/or interruption not added, because in principle in the data frame
Not only the first data 22 but also possible second data 24 are transmitted in each in 17.
In a kind of embodiment of control device 10, parallel-to-series converter 26 and serial-to parallel converter 32 are distinguished
Including UART interface, English：“Universal Asynchronous Receiver Transmitter（Universal asynchronous receiving-transmitting
Machine）”.
Because the frame of UART interface（“frame”）Started respectively with start bit " 0 ", therefore receiver UART interface can be with
Synchronization and identify that frame starts.If currently should not by means of UART interface transmission configuration data and/or control data and/
Or diagnostic data, then preferably wherein " 1 " position can be transmitted.Thus, it can also use and appoint instead of UART interface frame format
The other frame formats of meaning or bit sequence, wherein corresponding frame begins through " 0 " position to provide.If standard UART interfaces（8 bit strings
Row length）If too short, this is, for example, favourable.
As long as transmission capacity is too small for the second data 24 in an application situation, number N 2 and value 1（Fig. 2）Differently
For example, 2 or 4 are extended, referring to Fig. 1.According to corresponding number N 2, walked using each clock of the clock signal 40 after frequency dividing
Serial shift 1,2 or 4 in shift register 26a and 32a.
Fig. 3 shows the flow chart of the method for running the control device 10 in particular for motor vehicles, wherein controlling
Equipment 10 includes computing unit 12, and the computing unit is configured to periodically pass data frame 17 by universal serial bus 16
It is defeated by least one peripheral cell 14 that will be by means of control signal to manipulate.Here, computing unit 12 will characterize the control
First data 22 of signal are inserted into each data frame 17.Therefore, the insertion of the first data 22 can with strict periodicity simultaneously
And carry out un-interrupted in this sense.This is shown by block 100 in figure 3.
In back to back piece 110, second data 24 are inserted into number in addition to the first data 22 by computing unit 12
In at least a portion according to frame 17, wherein especially the second data 24 include configuration data and/or control data and/or diagnosis number
According to.
Here, configuration data and/or control data and/or diagnostic data are temporarily, at least separately or jointly
The bit wide of 2 bigger of number N with than the second data 24, wherein configuration data and/or control data and/or diagnostic data according to
The type of parallel-to-series converter 26 is transformed to 2 the second data 24 of number N.This is shown by back to back piece 120.
In back to back piece 130, data frame 17 is serially transferred to peripheral cell 14.In back to back piece 140,
First data 22' is concurrently read and is stored from the shift register 20a of the second equipment 20.Meanwhile the second data 24'
Current Bits Serial be written in the shift register 32a of serial-to parallel converter 32.
In back to back piece 150, configuration data and/or control data and/or diagnostic data are become by means of serial-to-parallel
Parallel operation 32 is resumed from the second data 24'.Afterwards, method is cyclically continued when block 100 starts.
The step of described in block 120 and 150, should symbolically understand in following scope：Parallel-to-serial becomes
Parallel operation 26 and serial-to parallel converter 32 are run and correspondingly in part with the clock signal 36 divided by the factor 256
With the slower work period, as being described above.
It can be readily appreciated that as exemplarily by means of the control device 10 shown in Fig. 1 and Fig. 2 it is described,
One and second data 22 and 24 quilt advantageously other can also be applied for almost arbitrary by the transmission of universal serial bus 16
Perform.
Claims (13)
- A kind of 1. control device（10）, in particular for motor vehicles, wherein the control device（10）Including computing unit （12）, the computing unit is configured to pass through universal serial bus（16）Periodically by data frame（17）It is transferred at least one Peripheral cell that will be by means of control signal to manipulate（14）, it is characterised in that the computing unit（12）Being configured to will Characterize the first data of the control signal（22）It is inserted into each data frame（17）In.
- 2. control device according to claim 1（10）, wherein the computing unit（12）It is configured to except described First data（22）Outside by the second data（24）It is inserted into the data frame（17）At least a portion in, wherein especially institute State the second data（24）Including configuration data and/or control data and/or diagnostic data.
- 3. control device according to claim 2（10）, wherein each data frame（17）The first number（N1）Data Position is assigned to first data（22）, and the data frame（17）The second number（N2）Data bit temporarily, at least by Distribute to second data（24）, wherein preferably described first number（N1）More than second number（N2）.
- 4. the control device according to claims 1 to 3（10）, wherein the peripheral cell（14）It is disposed in the control Equipment（10）In, wherein the peripheral cell（14）Especially there is at least one manipulation component for actuator.
- 5. the control device according to one of Claims 1-4（10）, wherein first data（22）Characterize at least one Real-time control signal, especially at least a control signal through pulsewidth modulation（44a, 44b, 44c）.
- 6. the control device according to one of claim 2 to 5（10）, wherein the control device（10）With at least one Converter（26）, the converter be configured to from current configuration data and/or control data and/or diagnostic data in produce Raw second number（N2）The second data（24）.
- 7. control device according to claim 6（10）, wherein the converter（26）It is configured to parallel-to-serial conversion Device（26）, and wherein described configuration data and/or the control data and/or the diagnostic data are temporarily, at least single respectively Solely or jointly have than second data（24）Number（N2）The bit wide of bigger.
- 8. the control device according to claim 6 or 7（10）, wherein the converter（26）It is configured to that string will be directed to The frame information of row transmission（30a）And/or control information（30b）It is inserted into second data（24）In.
- 9. the control device according to one of claim 6 to 8（10）, wherein the converter（26）Including UART interface （English：“Universal Asynchronous Receiver Transmitter”）.
- 10. at least one control device in preceding claims（10）, wherein the universal serial bus（16）It is Microsecond bus MSC（English：“Micro Second Channel”）.
- 11. a kind of be used to run the control device in particular for motor vehicles（10）Method, wherein the control device （10）Including computing unit（12）, the computing unit is configured to pass through universal serial bus（16）Periodically by data frame （17）It is transferred at least one peripheral cell that will be by means of control signal to manipulate（14）, it is characterised in that it is described to calculate list Member（12）The first data of the control signal will be characterized（22）It is inserted into each data frame（17）In.
- 12. according to the method for claim 11, wherein by the computing unit（12）Except first data（22）It It is outer by the second data（24）It is inserted into the data frame（17）At least a portion in, wherein especially described second data（24） Including configuration data and/or control data and/or diagnostic data.
- 13. the method according to claim 11, wherein the configuration data and/or control data and/or diagnostic data are extremely It is few temporarily separately or jointly to have than second data（24）Number（N2）The bit wide of bigger, and its Described in configuration data and/or control data and/or diagnostic data according to parallel-to-series converter（26）Type be transformed to The number（N2）The second data（24）.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE102016219347.3A DE102016219347A1 (en) | 2016-10-06 | 2016-10-06 | Control device, in particular control device for a motor vehicle |
| DE102016219347.3 | 2016-10-06 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN107918595A true CN107918595A (en) | 2018-04-17 |
| CN107918595B CN107918595B (en) | 2024-03-08 |
Family
ID=61695559
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710905695.1A Active CN107918595B (en) | 2016-10-06 | 2017-09-29 | Control device, in particular for a motor vehicle |
Country Status (3)
| Country | Link |
|---|---|
| KR (1) | KR102371270B1 (en) |
| CN (1) | CN107918595B (en) |
| DE (1) | DE102016219347A1 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116760914A (en) * | 2023-08-23 | 2023-09-15 | 北京紫光芯能科技有限公司 | Communication method, communication equipment and communication system |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109531569B (en) * | 2018-12-05 | 2021-08-31 | 北京爱其科技有限公司 | Robot based on interface supporting interconnection of different electronic parts |
| KR102244026B1 (en) * | 2019-10-01 | 2021-04-26 | 주식회사대성엘텍 | Image processing apparatus and image processing method |
| CN112918403B (en) * | 2021-02-08 | 2022-11-08 | 南京信息职业技术学院 | New energy automobile system combined control equipment |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1348590A (en) * | 1999-12-21 | 2002-05-08 | 皇家菲利浦电子有限公司 | Embedding first digital information signal into a second digital information signal for transmission via a transmission medium |
| CN102263634A (en) * | 2010-05-27 | 2011-11-30 | 罗伯特·博世有限公司 | Peripheral unit, control unit for the exchange of data with a peripheral unit, and method for data exchange |
| CN104426647A (en) * | 2013-08-30 | 2015-03-18 | 约翰内斯·海德汉博士有限公司 | Method and apparatus for synchronising a control unit and at least one associated peripheral unit |
| CN105765550A (en) * | 2013-11-14 | 2016-07-13 | 高通股份有限公司 | System and method of sending data via additional secondary data lines on a bus |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR950009402B1 (en) * | 1992-09-24 | 1995-08-22 | 쌍용자동차주식회사 | Multiple communication control system in motor application |
| US20030167345A1 (en) * | 2002-02-25 | 2003-09-04 | Knight Alexander N. | Communications bridge between a vehicle information network and a remote system |
| KR100514007B1 (en) * | 2004-04-30 | 2005-09-08 | 에이치케이이카 주식회사 | Vehicle information processing device which is connected to obd connector of vehicle |
| DE102005042493A1 (en) | 2005-09-07 | 2007-03-08 | Robert Bosch Gmbh | Control unit with computing device and I / O module that communicate with each other via a serial multi-wire bus |
| DE102013210077A1 (en) * | 2013-05-29 | 2014-12-04 | Robert Bosch Gmbh | Method for providing a generic interface and microcontroller with generic interface |
-
2016
- 2016-10-06 DE DE102016219347.3A patent/DE102016219347A1/en active Pending
-
2017
- 2017-09-29 KR KR1020170127596A patent/KR102371270B1/en active IP Right Grant
- 2017-09-29 CN CN201710905695.1A patent/CN107918595B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1348590A (en) * | 1999-12-21 | 2002-05-08 | 皇家菲利浦电子有限公司 | Embedding first digital information signal into a second digital information signal for transmission via a transmission medium |
| CN102263634A (en) * | 2010-05-27 | 2011-11-30 | 罗伯特·博世有限公司 | Peripheral unit, control unit for the exchange of data with a peripheral unit, and method for data exchange |
| US20110296065A1 (en) * | 2010-05-27 | 2011-12-01 | Dirk Daecke | Control unit for the exchange of data with a peripheral unit, peripheral unit, and method for data exchange |
| CN104426647A (en) * | 2013-08-30 | 2015-03-18 | 约翰内斯·海德汉博士有限公司 | Method and apparatus for synchronising a control unit and at least one associated peripheral unit |
| CN105765550A (en) * | 2013-11-14 | 2016-07-13 | 高通股份有限公司 | System and method of sending data via additional secondary data lines on a bus |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116760914A (en) * | 2023-08-23 | 2023-09-15 | 北京紫光芯能科技有限公司 | Communication method, communication equipment and communication system |
| CN116760914B (en) * | 2023-08-23 | 2023-11-17 | 北京紫光芯能科技有限公司 | Communication method, communication equipment and communication system |
Also Published As
| Publication number | Publication date |
|---|---|
| KR102371270B1 (en) | 2022-03-07 |
| KR20180038388A (en) | 2018-04-16 |
| CN107918595B (en) | 2024-03-08 |
| DE102016219347A1 (en) | 2018-04-12 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN107918595A (en) | Control device, the control device in particular for motor vehicles | |
| CN103222234B (en) | There is the scalable interconnection module of flexible channels binding | |
| CN205335890U (en) | Battery management system and have its electric automobile | |
| CN105323009A (en) | Method and apparatus for signal edge boosting | |
| CN1333560C (en) | High-performance optical fibre CAN communication system for strong electromagnetism interference environment | |
| CN110162340B (en) | ID configuration method of series circuit, series circuit and related equipment | |
| CN109684255A (en) | A kind of FPGA pin multiplexing circuit and control method | |
| CN101588273A (en) | Virtual test bus circuit for network-on-chip system and test method thereof | |
| CN1062400C (en) | Synchronizing circuit arrangement | |
| CN101848559A (en) | Realization system for information transmission and smart card | |
| CN109688623A (en) | Wireless frame structure and its configuration method and configuration device and physical channel structure | |
| JP3716967B2 (en) | High level synthesis apparatus, high level synthesis method, and recording medium used therefor | |
| CN203911825U (en) | Air conditioner and stepping motor drive circuit thereof | |
| CN114363109A (en) | Pulse width modulation single-wire bus communication method based on edge synchronization | |
| US20050097253A1 (en) | Method for data transimission between an input-output card with an add-on memory card and a host system | |
| JP2013125315A (en) | Bus system and information processor | |
| CN219085413U (en) | Embedded ATE equipment of PC | |
| US8028213B2 (en) | Data transformation method and related device for a testing system | |
| CN102033835B (en) | For the method that communicates between microcontroller and final stage assembly and final stage assembly | |
| CN104866401B (en) | Signal acquiring method and device in piece | |
| CN101833524B (en) | Starting signal transmitting system and starting signal transmitting method | |
| JP2007149475A (en) | Live line insertion/extraction system | |
| WO2008056468A1 (en) | Semiconductor integrated circuit and layout technique thereof | |
| US7653770B2 (en) | Time multiplexed bidirectional bus | |
| CN109062844A (en) | A kind of CCID protocol equipment data transmission method and device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |