CN107910371B - Method for improving direct-write charge accumulation of electron beam on surface of GaN HEMT - Google Patents

Method for improving direct-write charge accumulation of electron beam on surface of GaN HEMT Download PDF

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CN107910371B
CN107910371B CN201710861928.2A CN201710861928A CN107910371B CN 107910371 B CN107910371 B CN 107910371B CN 201710861928 A CN201710861928 A CN 201710861928A CN 107910371 B CN107910371 B CN 107910371B
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electron beam
metal
gate
gan hemt
germanium
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CN107910371A (en
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吴少兵
高建峰
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CETC 55 Research Institute
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/778Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7782Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET
    • H01L29/7783Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET using III-V semiconductor material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42372Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66431Unipolar field-effect transistors with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT

Abstract

The invention relates to a method for improving electron beam direct-writing charge accumulation on the surface of a GaN HEMT, which is characterized by comprising the following process steps: (1) preparing a component; (2) preparing nanometer thin-layer metal germanium; (3) an electron beam direct write gate; (4) removing the nano thin metal germanium for the first time; (5) etching a gate dielectric, and evaporating and stripping gate metal; (6) and removing the nano thin metal germanium for the second time. The invention has the advantages that: 1. metal germanium is used as a bottom conducting layer, so that the consistency is good, and the thickness is accurate and controllable; the electron beam glue coated on the surface of the conductive film has good adhesion and is easy to remove. 2. The metal germanium can have very good conductive property below 10nm, and has excellent effect of improving electron beam charge accumulation on the surface of the GaN HEMT.

Description

Method for improving direct-write charge accumulation of electron beam on surface of GaN HEMT
Technical Field
The invention relates to a method for improving direct-write charge accumulation of electron beams on the surface of a GaN HEMT, belonging to the technical field of manufacturing processes of semiconductor devices and integrated circuits.
Background
In the manufacturing process of modern semiconductor devices, with the progress of technology, the size of the devices is smaller and smaller, and the integration level is higher and higher. The third-generation semiconductor GaN has wide application prospect in the high-frequency field of microwave and millimeter wave chips. The millimeter wave GaN HEMT device has the advantages of high working voltage, output power of more than watt level, high power density, working frequency of 100GHz and the like. GaN HEMT devices, particularly AlGaN/GaN HEMT structures, have poor surface conductivity. Furthermore, before the gate is fabricated, a layer of dense SiN dielectric is generally required to be grown on the surface to protect the source and drain metals and simultaneously reduce the surface defects as much as possible. When a GaN HEMT device with a small gate length is prepared, an electron beam direct writing process is often adopted. Due to the problem that the conductivity of a dense medium on the surface and the GaN HEMT is poor, the electron beam direct writing has the charge accumulation problem, and the charge accumulation problem can cause the direct writing overlay deviation and even the situation that the direct writing cannot be carried out due to the fact that a mark cannot be found.
Generally, the problem of charge accumulation during electron beam direct writing is solved by applying a layer of conductive paste. However, the conductive paste often causes process variations, such as paste baking temperature, exposure dose, and developing time of each layer of electron beam paste, and some process variations may cause the desired direct writing effect to be incomplete. In addition, the grid of the GaN HEMT is generally formed in one step by adopting electron beams, namely, multiple layers of electron beam glue are needed. Adhesion needs to be ensured among the multiple layers of glue, and the conductive glue cannot be coated frequently. Meanwhile, the baking temperature of the conductive adhesive is not necessarily matched with that of the electron beam adhesive, so that the use of the conductive adhesive is limited. In addition, the conductive capability of the conductive paste is insufficient to solve the charge accumulation during high-dose direct writing.
And a layer of metal material is prepared on the surface of the GaN, so that the problem of conductivity can be improved. The prepared metal material has good adhesion to electron beam glue, is easy to remove and does not influence the normal process of electron beams. One method is to prepare a further layer of metal, such as aluminum metal, on the sample coated with the e-beam glue. However, this method also brings about a great change in the process, including the need to consider the removal of the aluminum metal during development, and the problems of adhesion between the upper layer of glue and the aluminum metal, chemical reaction, etc. during the application of multiple layers of glue. In addition, the metal aluminum generally needs to be removed by acid, and the acid solution can also have corrosion effect on other metals of the device, such as source and drain metals. Metal germanium is widely used in semiconductor devices, such as one of ohmic metals as a GaAs material. The metal germanium is generally prepared by an electron beam evaporation process, and has the advantages of smooth surface, good consistency and accurate and controllable thickness. The electron beam glue coated on the surface of the film has good adhesiveness. After direct writing and gate metal stripping, the material is easier to remove, and is a better material for improving electron beam direct writing charge accumulation. And the metal germanium is prepared before the electron beam glue is coated, so that the problems of process variation and compatibility are avoided.
In summary, when the electron beam direct writing process is used to fabricate the GaN HEMT device, the direct writing problem is caused by charge accumulation due to poor surface conductivity. The method of coating the conductive adhesive brings about the change of the direct writing process, and the use method is limited, and the conductive capability is not good as that of the metal material. Therefore, the invention develops a method for improving the charge accumulation problem in electron beam direct writing of the GaN HEMT. Can effectively solve the problems of direct writing overlay, adhesion and the like.
Disclosure of Invention
The invention provides a method for solving charge accumulation of an electron beam on the surface of a GaN HEMT, aiming at solving the charge accumulation problem in the process of electron beam direct writing and effectively solving the problems of direct writing overlay, adhesion and the like.
The technical solution of the invention is as follows: the method for improving the direct-writing charge accumulation of the electron beam on the surface of the GaN HEMT is characterized in that a layer of nano thin-layer metal germanium is prepared on the surface of the GaN HEMT to be used as a conducting layer when a GaN HEMT device is prepared.
The method comprises the following process steps:
(1) preparing a component;
(2) preparing nanometer thin-layer metal germanium;
(3) an electron beam direct write gate;
(4) removing the nano thin metal germanium for the first time;
(5) etching a gate dielectric, and evaporating and stripping gate metal;
(6) and removing the nano thin metal germanium for the second time.
The invention has the advantages that:
1. the metal germanium is used as a bottom conducting layer, the metal germanium prepared by the electron beam evaporation process is smooth in surface, good in consistency and accurate and controllable in thickness; the electron beam glue coated on the surface of the gate metal has good adhesiveness, and is easy to remove after direct writing and gate metal stripping;
2. the adopted conductive bottom layer metal germanium has good conductive property below 10nm, and has no process compatibility problem with the subsequent electron beam process, and the effect of improving the electron beam charge accumulation on the surface of the GaN HEMT is obviously better than that of the conductive adhesive.
Drawings
FIG. 1 is a schematic diagram of the structure of ohmic contacts and growth protection dielectric fabricated on a GaN epitaxial layer.
FIG. 2 is a schematic cross-sectional view of growing nano-thin metal germanium.
FIG. 3 is a schematic cross-sectional view of an electron beam resist coating and direct write development.
Fig. 4 is a schematic diagram of removing a nano-thin metal germanium layer under a gate pin in the first step.
Fig. 5 is a schematic diagram of the gate metal after evaporation and stripping.
FIG. 6 is a schematic diagram of the second step of removing the nano-thin metal germanium and growing the gate passivation dielectric.
In the figure, 101 is a SiC substrate, 102 is an epitaxial channel and a barrier layer, 103 is a source and drain electrode, 104 is a source and drain protective SiN medium, 201 is metal germanium, 302 is electron beam glue, 502 is gate metal, and 602 is a gate metal passivation medium.
Detailed Description
A method for improving direct-writing charge accumulation of electron beams on the surface of a GaN HEMT (high Electron mobility transistor) is characterized in that a layer of nano thin-layer metal germanium is prepared on the surface of the GaN HEMT to serve as a conducting layer when a GaN HEMT device is prepared.
The GaN HEMT device comprises a GaN epitaxial material, a source-drain structure, a source-drain protection medium, a gate metal, a gate passivation medium and a capacitor upper and lower electrode metal.
The method for improving electron beam direct-writing charge accumulation on the surface of the GaN HEMT comprises the following process steps:
(1) preparation of the element: on the GaN HEMT epitaxial material, a source-drain pattern is obtained by adopting photoetching; preparing a source-drain metal system by processes of electron beam evaporation, stripping, alloying and the like; preparing a layer of protective medium SiN by adopting an enhanced plasma chemical vapor deposition method or a coupled induction chemical vapor deposition method, wherein the thickness of the SiN is 40 nm-200 nm; sequentially preparing resistance metal and capacitor lower electrode metal by ultraviolet photoetching, evaporation and sputtering processes;
(2) preparing nanometer thin-layer metal germanium: the nano thin-layer metal germanium is prepared by adopting an electron beam evaporation process or a sputtering process, and the thickness is 0-10 nm;
(3) electron beam direct write gate: preparing a grid by adopting an electron beam direct writing process, wherein the prepared grid is a T-shaped grid or a Y-shaped grid, and grid metal is coated with not less than 2 layers of electron beam glue in the electron beam direct writing process and is directly written for not less than 2 times;
(4) removing the nano thin metal germanium for the first time: removing by hydrogen peroxide corrosion or fluorine-containing plasma, wherein the removed part is the part after the grid feet are developed; and before etching, oxygen plasma gluing is carried out to improve the surface wettability. The etching time is 20-60 s;
(5) etching of a gate dielectric, and evaporating and stripping of gate metal: firstly, carrying out gate dielectric etching, barrier layer surface grooving and surface treatment processes on a GaN HEMT epitaxial material; then preparing gate metal by electron beam evaporation; soaking the grid metal in acetone until the metal on the surface of the electron beam adhesive falls off naturally; then soaking the mixture for 5-10 min by respectively adopting NMP solution, acetone solution and alcohol solution; finally, taking out and drying;
(6) and (3) removing the nano thin metal germanium for the second time: removing by using hydrogen peroxide, wherein the removed part is the whole part except the other parts under the gate metal; the etching time is 1-60 s.
The technical scheme of the invention is further described in the following with the accompanying drawings.
Comparing with the attached figure 1, source and drain metals are prepared on the GaN HEMT epitaxial material of the SiC substrate, a compact medium is grown, and a resistance layer and a capacitor lower electrode layer are prepared.
Comparing with fig. 2, a thin layer of metal germanium 201 is evaporated on the surface by electron beam evaporation process as a conductive layer, and the thickness of the metal germanium layer is less than or equal to 10 nm.
Comparing with FIG. 3, coating electron beam glue 302, performing electron beam direct writing, and developing to obtain the required pattern.
Comparing with fig. 4, the pattern obtained by electron beam direct writing is treated by hydrogen peroxide solution or fluorine plasma, so that the metal germanium exposed at the bottom of the gate is removed.
Comparing with fig. 5, the gate dielectric on the surface of the sample wafer is etched to remove the SiN dielectric at the gate foot portion, then the gate metal 502 is prepared by adopting an electron beam evaporation process, and the gate metal is stripped after being evaporated.
Compared with the attached figure 6, the surface of the whole wafer is corroded by hydrogen peroxide, and the gate metal and the SiN medium cannot be corroded by the hydrogen peroxide, so that the surface of the active region and the source and drain metal cannot be damaged in the process of removing the metal germanium; and growing a gate metal passivation medium 602 on the surface of the sample from which the germanium is removed, and then performing medium opening, capacitor upper electrode preparation and the like to complete the preparation of the GaN HEMT device.
Example 1
The method for improving electron beam direct-write charge accumulation on the surface of the GaN HEMT comprises the following steps:
1) and photoetching the HEMT epitaxial material of the GaN substrate to obtain a source-drain pattern, preparing a source-drain metal system by processes of electron beam evaporation, stripping, alloy and the like, and then growing a layer of protective medium SiN, wherein the SiN can be prepared by plasma enhanced chemical vapor deposition and has the thickness of 40 nm. Sequentially preparing resistance metal and capacitor lower electrode metal by processes such as ultraviolet photoetching, evaporation or sputtering;
2) and preparing a layer of metal germanium with the thickness of 5nm by adopting an electron beam evaporation process. Coating electron beam glue, baking and direct writing, wherein the GaN small gate length is prepared by adopting an electron beam one-step forming method, multiple layers of glue are required to be coated and direct writing is carried out for multiple times, and the bottom layer of nano thin-layer metal germanium has the effect of eliminating charge accumulation in multiple direct writing;
3) and (4) corroding and removing the metal at the bottom of the grid foot by using hydrogen peroxide on the developed sample. In order to ensure complete corrosion, oxygen plasma gluing is carried out before corrosion so as to improve the surface wettability; corroding for 20 seconds to ensure that the bottom is completely corroded and has certain lateral corrosion, wherein the purpose of the lateral corrosion is to ensure that the subsequent gate metal cannot be connected with metal germanium;
4) carrying out processes such as gate dielectric etching, barrier layer surface grooving, surface treatment and the like on the corroded sample, and then preparing gate metal by electron beam evaporation; soaking the grid metal by acetone to enable the surface metal with the electron beam glue to fall off naturally, then soaking by respectively adopting NMP solution, acetone solution and alcohol solution for 5min, and finally taking out and drying; the surface of the sample wafer after being dried is covered with nano thin metal germanium except the bottom of the grid;
5) and (3) corroding and removing the metal germanium by using hydrogen peroxide or a mixed solution of hydrogen peroxide and water. Determining the complete corrosion of germanium according to the corrosion rate of the hydrogen peroxide solution, and corroding for 30 s; hydrogen peroxide has no corrosion effect on the surface of the GaN, the gate metal and the SiN medium, so that the problems of surface damage and process compatibility are not caused;
6) and performing dielectric passivation on the gate structure after the metal germanium is corroded. And then, the GaN HEMT device is prepared by opening a dielectric, preparing an electrode on the capacitor and the like.
Example 2
1) On HEMT epitaxial material of GaN substrate, photoetching is adopted to obtain source and drain patterns, then electron beam evaporation, stripping and alloying are carried out to prepare source and drain metal system, then a layer of protective medium SiN is grown, the SiN can be prepared by coupling inductance chemical vapor deposition method, and the thickness is 200 nm. Sequentially preparing resistance metal and capacitor lower electrode metal by processes such as ultraviolet photoetching, evaporation or sputtering;
2) a layer of metal germanium with the thickness of 10nm is prepared by adopting an electron beam sputtering process. Coating electron beam glue, baking and direct writing, wherein the preparation of the GaN small gate length generally adopts an electron beam one-step forming method, multiple layers of glue are required to be coated and direct writing is carried out for multiple times, and the bottom layer of nano thin-layer metal germanium has the function of eliminating charge accumulation in multiple direct writing;
3) and (4) corroding and removing the metal at the bottom of the grid foot by using hydrogen peroxide on the developed sample. In order to ensure complete corrosion, oxygen plasma gluing is carried out before corrosion so as to improve the surface wettability; corroding for 1 minute to ensure that the bottom is completely corroded and has certain lateral corrosion, wherein the purpose of the lateral corrosion is to ensure that the subsequent gate metal cannot be connected with metal germanium;
4) carrying out processes such as gate dielectric etching, barrier layer surface grooving, surface treatment and the like on the corroded sample, and then preparing gate metal by electron beam evaporation; soaking the grid metal by acetone to enable the surface metal with the electron beam glue to fall off naturally, then soaking by respectively adopting NMP solution, acetone solution and alcohol solution for 10min, and finally taking out and drying; the surface of the sample wafer after being dried is covered with nano thin metal germanium except the bottom of the grid;
5) and (3) corroding and removing the metal germanium by using hydrogen peroxide or a mixed solution of hydrogen peroxide and water. Determining the complete corrosion of the germanium according to the corrosion rate of the hydrogen peroxide solution, and corroding for 1 minute; hydrogen peroxide has no corrosion effect on the surface of the GaN, the gate metal and the SiN medium, so that the problems of surface damage and process compatibility are not caused;
6) performing dielectric passivation on the gate structure after the metal germanium is corroded; and then, the GaN HEMT device is prepared by opening a dielectric, preparing an electrode on the capacitor and the like.

Claims (4)

1. A method for improving electron beam direct-writing charge accumulation on the surface of a GaN HEMT is characterized by comprising the following process steps:
(1) preparing a component;
(2) preparing nanometer thin-layer metal germanium; the nanometer thin-layer metal germanium is prepared by adopting an electron beam evaporation process or a sputtering process, and the thickness is less than 10 nm;
(3) an electron beam direct write gate;
(4) removing the nano thin metal germanium for the first time: removing by hydrogen peroxide corrosion or fluorine-containing plasma, wherein the removed part is the part after the grid feet are developed; before corrosion, oxygen plasma gluing is carried out to improve the surface wettability; the etching time is 20-60 s;
(5) etching a gate dielectric, and evaporating and stripping gate metal;
(6) and (3) removing the nano thin metal germanium for the second time: removing by using hydrogen peroxide corrosion, wherein the removed part is the other part under the gate metal; the etching time is 1-60 s.
2. The method for improving electron beam direct-write charge accumulation on the surface of the GaN HEMT according to claim 1, wherein the preparation of the element in the step (1): obtaining a source-drain pattern on the GaN HEMT epitaxial material through photoetching; preparing a source-drain metal system by electron beam evaporation, stripping and alloying processes; preparing a layer of protective medium SiN by using an enhanced plasma chemical vapor deposition method or a coupled induction chemical vapor deposition method, wherein the thickness of the SiN is 40 nm-200 nm; the resistance metal and the capacitor lower electrode metal are sequentially prepared by ultraviolet photoetching, evaporation and sputtering processes.
3. The method according to claim 1, wherein the step (3) of electron beam direct writing gate: the grid is prepared by adopting an electron beam direct writing process, the prepared grid is a T-shaped grid or a Y-shaped grid, and grid metal is coated with not less than 2 layers of electron beam glue in the electron beam direct writing process and is directly written for not less than 2 times.
4. The method for improving electron beam direct-write charge accumulation on the surface of the GaN HEMT according to claim 1, wherein the etching of the gate dielectric, the evaporation and the stripping of the gate metal in the step (5): firstly, carrying out gate dielectric etching, barrier layer surface grooving and surface treatment processes on a GaN HEMT epitaxial material; then preparing gate metal by electron beam evaporation; soaking the grid metal in acetone until the metal on the surface of the electron beam adhesive falls off naturally; then soaking the mixture for 5-10 min by respectively adopting NMP solution, acetone solution and alcohol solution; and finally taking out and drying.
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