CN107845614A - A kind of integrated circuit module structure and preparation method thereof - Google Patents
A kind of integrated circuit module structure and preparation method thereof Download PDFInfo
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- CN107845614A CN107845614A CN201711278627.3A CN201711278627A CN107845614A CN 107845614 A CN107845614 A CN 107845614A CN 201711278627 A CN201711278627 A CN 201711278627A CN 107845614 A CN107845614 A CN 107845614A
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- 238000002360 preparation method Methods 0.000 title claims abstract description 18
- 238000004806 packaging method and process Methods 0.000 claims abstract description 66
- 230000004888 barrier function Effects 0.000 claims abstract description 53
- 230000007704 transition Effects 0.000 claims description 24
- 239000003292 glue Substances 0.000 claims description 23
- 230000015572 biosynthetic process Effects 0.000 claims description 13
- 239000003989 dielectric material Substances 0.000 claims description 12
- 239000002184 metal Substances 0.000 claims description 11
- 229910052751 metal Inorganic materials 0.000 claims description 11
- 239000000463 material Substances 0.000 claims description 10
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 8
- 229910052802 copper Inorganic materials 0.000 claims description 8
- 239000010949 copper Substances 0.000 claims description 8
- 238000005516 engineering process Methods 0.000 claims description 8
- 230000008021 deposition Effects 0.000 claims description 5
- 238000009413 insulation Methods 0.000 claims description 4
- 239000012212 insulator Substances 0.000 claims description 3
- 238000000926 separation method Methods 0.000 claims description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 2
- 239000010931 gold Substances 0.000 claims description 2
- 229910052737 gold Inorganic materials 0.000 claims description 2
- 230000009467 reduction Effects 0.000 abstract description 6
- 238000000034 method Methods 0.000 description 8
- 238000000151 deposition Methods 0.000 description 5
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 3
- 230000005611 electricity Effects 0.000 description 3
- 229910052760 oxygen Inorganic materials 0.000 description 3
- 239000001301 oxygen Substances 0.000 description 3
- 238000007789 sealing Methods 0.000 description 3
- 238000005476 soldering Methods 0.000 description 3
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 3
- 230000009471 action Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000000227 grinding Methods 0.000 description 2
- 239000007769 metal material Substances 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 238000003486 chemical etching Methods 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- 238000003384 imaging method Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 238000012827 research and development Methods 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/561—Batch processing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
The embodiments of the invention provide a kind of integrated circuit module structure and preparation method thereof, the integrated circuit module structure includes：Integrated device, at least one interface being connected with partial function circuit is provided with the first face of integrated device；Plastic packaging layer, plastic packaging layer expose the first face of integrated device；Layer is rerouted, reroutes layer at least one layer, every layer reroutes layer and includes at least one metallic pattern, and metallic pattern is corresponding with interface to be connected, wherein, metallic pattern itself forms remaining functional circuit, or metallic pattern is directly connected to remaining functional circuit；Insulating barrier, include at least one layer close to the side in the first face, insulating barrier positioned at integrated device and plastic packaging layer, cover one layer of rewiring layer per layer insulating, insulating layer exposing goes out the part of metallic pattern to form pad.In the embodiment of the present invention, the access of soldered ball is avoided, realizes reduction dead resistance, improves the quality factor inductively or capacitively of integrated device, optimizes the purpose of integrated device performance.
Description
Technical field
The present embodiments relate to integrated circuit module technology, more particularly to a kind of integrated circuit module structure and its making
Method.
Background technology
Growing with electronic product, the research and development of all kinds of components all develop towards the direction more than integrated, function,
Therefore, the requirement to the integrated circuit module structure of integrated device is also increasingly improving.
At this stage, when integrated device is assembled in system in package (SIP, System in Package) module, it is necessary to
Pad and the soldered ball connected with pad are set in integrated circuit module structure, so as to IC-components/chip and other collection
Connected between circuit devcie/chip.The dead resistance of soldered ball is probably in 30m Ω or so, in the encapsulation of traditional digit chip
During the influence of dead resistance of soldered ball can ignore, but in radio frequency module or frequency applications, the dead resistance of soldered ball
Quality factor inductively or capacitively in integrated device can be greatly reduced, influence the performance of integrated device.
The content of the invention
The present invention provides a kind of integrated circuit module structure and preparation method thereof, to realize reduction dead resistance, improves collection
Quality factor into device inductively or capacitively, optimize the performance of integrated device.
In a first aspect, the embodiments of the invention provide a kind of integrated circuit module structure, including：
Integrated device, partial function circuit is provided with the integrated device, and the integrated device includes relative first
Face and the second face, at least one interface being connected with the functional circuit is provided with first face；
Plastic packaging layer, the plastic packaging layer expose the first face of the integrated device；
Layer is rerouted, the rewiring layer is at least one layer of, and every layer of layer that reroutes includes at least one metallic pattern, institute
Metallic pattern connection corresponding with the interface is stated, wherein,
The metallic pattern itself forms remaining functional circuit, or the metallic pattern is directly connected to remaining work(
Can circuit；
Insulating barrier, positioned at the integrated device and the plastic packaging layer close to the side in first face, the insulating barrier bag
At least one layer is included, every layer of insulating barrier covers one layer of rewiring layer, and the insulating layer exposing goes out the metallic pattern
A part is to form pad.
Optionally, the metallic pattern covers and contacts the interface corresponding to it, and the area of the metallic pattern is more than
The area of the interface corresponding to it.
Optionally, the number of the integrated device is more than one, and the interfaces of multiple integrated devices passes through described
Metallic pattern connects.
Optionally, the rewiring layer includes multilayer, and each layer is rerouted between layer by insulator separation, is realized respectively by through hole
Reroute the electrical connection between layer.
Second aspect, the embodiment of the present invention additionally provide a kind of preparation method of integrated circuit module structure, including：
Support plate is provided, transition glue is formed on the support plate；
Integrated device is set on the transition glue, partial function circuit is provided with the integrated device, it is described integrated
Device includes relative the first face and the second face, and be connected with the functional circuit at least one is provided with first face and is connect
Mouthful, second face contacts with the transition glue；
Plastic packaging layer is formed on the transition glue, the plastic packaging layer coats the integrated device；
The plastic packaging layer is thinned, the plastic packaging layer is exposed the interface；
At least one layer of rewiring layer is formed on the plastic packaging layer, every layer of layer that reroutes includes at least one metal figure
Shape, metallic pattern connection corresponding with the interface, wherein, the metallic pattern itself forms remaining functional circuit, or
Metallic pattern described in person is directly connected to remaining functional circuit；
At least one layer of insulating barrier is formed on the plastic packaging layer and the rewiring layer, every layer of insulating barrier covers one layer
The rewiring layer, the insulating layer exposing go out a part for the metallic pattern.
Optionally, after the insulating barrier is formed, in addition to：Remove the support plate and the transition glue.
Optionally, the metallic pattern, the metal figure of formation are formed on the plastic packaging layer using rewiring technology
Shape covers and contacts the interface corresponding to it, and the area of the metallic pattern of formation is more than the face of the interface corresponding to it
Product.
Optionally, the material of the metallic pattern is copper.
Optionally, at least one layer of insulating barrier, every layer of insulating barrier are formed on the plastic packaging layer and the rewiring layer
One layer of rewiring layer is covered, including：Multilayer is formed on the plastic packaging layer and reroutes layer, each layer is described to reroute between layer
It is mutually isolated by insulating barrier, and the electrical connection between each rewiring layer is realized by through hole.
Optionally, at least one layer of insulating barrier, the insulating layer exposing are formed on the plastic packaging layer and the rewiring layer
Go out a part for the metallic pattern, including：
Deposition forms at least one layer of dielectric materials layer, the dielectric of formation on the plastic packaging layer and the rewiring layer
Material layer covers the metallic pattern and the integrated device；
The dielectric materials layer is etched to expose a part for the metallic pattern.
Integrated circuit module structure provided in an embodiment of the present invention and preparation method thereof, by the interface of integrated device
The metallic pattern for corresponding to connection therewith is set, realizes remaining functional circuit, or realize the direct electricity with remaining functional circuit
Connection, without using intermediate materials such as soldering ball, copper posts, is greatly reduced dead resistance, solves in the prior art due to soldered ball
Deng dead resistance caused by quality factor in integrated device inductively or capacitively be greatly reduced the problem of, avoid connecing for soldered ball
Enter, realize reduction dead resistance, improve the quality factor inductively or capacitively of integrated device, optimize the mesh of integrated device performance
's.
Brief description of the drawings
The present invention is described in further detail with reference to the accompanying drawings and examples.It is understood that this place is retouched
The specific embodiment stated is used only for explaining the present invention, rather than limitation of the invention.It also should be noted that in order to just
Part related to the present invention rather than entire infrastructure are illustrate only in description, accompanying drawing.
Fig. 1 is a kind of structural representation for integrated circuit module structure that the embodiment of the present invention one provides；
Fig. 2 is the structural representation for another integrated circuit module structure that the embodiment of the present invention one provides；
Fig. 3 is the structural representation for another integrated circuit module structure that the embodiment of the present invention one provides；
Fig. 4 is a kind of preparation method flow chart for integrated circuit module structure that the embodiment of the present invention two provides；
Fig. 5 is structure chart corresponding to a kind of preparation method for integrated circuit module structure that the embodiment of the present invention two provides.
Embodiment
The present invention is described in further detail with reference to the accompanying drawings and examples.It is understood that this place is retouched
The specific embodiment stated is used only for explaining the present invention, rather than limitation of the invention.It also should be noted that in order to just
Part related to the present invention rather than entire infrastructure are illustrate only in description, accompanying drawing.
Embodiment one
Fig. 1 is a kind of structural representation for integrated circuit module structure that the embodiment of the present invention one provides., should referring to Fig. 1
Integrated circuit module structure, including：Integrated device 1, partial function circuit 101 is provided with integrated device 1, integrated device includes
Relative the first face 11 and the second face 12, at least one interface being connected with partial function circuit 101 is provided with the first face 11
102；The plastic packaging layer 2 of integrated device 1 is encapsulated, plastic packaging layer 2 exposes the first face 11 of integrated device 1；Layer is rerouted, reroutes layer
At least one layer, every layer reroutes layer and includes at least one metallic pattern 31, and metallic pattern 31 is corresponding with interface 102 to be connected, wherein,
Metallic pattern 31 itself forms remaining functional circuit, or metallic pattern 31 is directly connected to remaining functional circuit；Insulation
Layer 4, include at least one layer close to the side in the first face 11, insulating barrier 4 positioned at integrated device 1 and plastic packaging layer 2, per layer insulating 4
One layer of rewiring layer of covering, insulating barrier 4 expose the part of metallic pattern 31 to form pad.
It should be noted that integrated device 1 is chip, but it is not limited only to chip or surface mount device,
Can also the two structure or other structures for being formed when being used in combination.
The metallic pattern 31 of connection corresponding with interface 102 itself can form remaining functional circuit, and in integrated device 1
Partial function circuit 101 form complete functional circuit, exemplarily, metallic pattern 31 itself can form remaining function
Circuit (other structures such as inductance), complete function is combined to form with the partial function circuit 101 (such as electric capacity) in integrated device
Certain function (such as realizing filter action) of circuit realiration, or, metallic pattern 31 can be needed in partial function circuit 101 with
The remaining functional circuit of another part of external circuit connection, for example, metallic pattern 31 is a metal polar plate, with partial function
Circuit 101 combines, and forms complete electric capacity to form complete functional circuit, realizes certain specific function；Metallic pattern 31
Can be directly connected to remaining functional circuit, exemplarily, partial function circuit 101 (such as electric capacity) in integrated device 1 with
Remaining functional circuit (such as inductance) outside integrated device 1 combines to form complete functional circuit to realize certain function (strictly according to the facts
Existing filter action), metallic pattern 31 directly can be connected with remaining functional circuit (such as inductance), so that two parts function is electric
Road forms complete functional circuit.Metallic pattern 31 is remaining functional circuit or is directly connected with remaining functional circuit
To reduce the resistance of dead resistance in integrated circuit module structure.
In order to avoid the erosion of water oxygen, integrated device 1 is protected, plastic packaging layer 2 can be used to encapsulate integrated device 1, wherein, it is
Interface 102 is set to be connected with rerouting the metallic pattern 31 in layer, first face 11 of the integrated device 1 where interface 102 is not
Covered by plastic packaging layer 2.In order that the dead resistance resistance for rerouting the metallic pattern 31 in layer is smaller, metallic pattern 31 can be
The high metal material of the electrical conductivity such as copper is made.
Insulating barrier 4 can be formed close to the side in the first face 11 in integrated device 1 and plastic packaging layer 2 by the way of deposition,
The insulating barrier 4 of deposition is not easy to separate with integrated device 1, plastic packaging layer 2 and rewiring layer, can replace base of the prior art
Plate, therefore the integrated circuit module structure need not introduce the soldered ball of welding integrated device 1 and substrate, avoid soldered ball, copper post
Deng the access of intermediate materials, its dead resistance is eliminated in radio frequency module or frequency applications to the electric capacity or electricity of integrated device 1
Feel the influence of quality factor.Insulating barrier 4 is thinner compared to substrate thickness of the prior art simultaneously, and precision is higher, makes integrated electricity
Road modular structure is more compact, and the integrated level of whole system can be made higher.In addition, insulating barrier 4 and integrated device 1, plastic packaging layer 2
Certain plastic packaging effect can also be played by being brought into close contact with rewiring layer, protect integrated device 1 not weather.In order that this is integrated
Circuit module structure can be connected with other integrated circuit module structure, printed circuit board (PCB) or other structures, and insulating barrier 4 can be with
A part for metallic pattern 31 is exposed to form pad, and integrated circuit module structure and external electrical are realized by the pad of formation
Road connects.
It should be noted that insulating barrier and rewiring layer may each be one layer or multilayer.Fig. 2 is of the invention real
The structural representation of another integrated circuit module structure of the offer of example one is provided.Referring to Fig. 2, optionally, layer is rerouted including more
Layer, each layer are isolated between rerouting layer by insulating barrier 4, and the electrical connection between each rewiring layer is realized by through hole 41.
Wherein, when reroute layer be multilayer when, insulating barrier 4 also can be multilayer, by insulating barrier 4 by each layer rewiring layer every
Leave, occur situations such as to avoid short circuit.It is understood that ensure the metallic pattern 31 and integrated device of one layer of rewiring layer
1 interface 102 is contacted, but insulating barrier 4 and the rewiring respective number of plies of layer are not limited.Can be between layer be rerouted
Opened hole 41 on insulating barrier 4, to realize that each layer reroutes the electrical connection between the metallic pattern 31 of layer.
Integrated circuit module structure provided in an embodiment of the present invention, by being provided with the first face 11 of integrated device 1
At least one interface 102 being connected with partial function circuit 101, plastic packaging layer 2 expose the first face 11 of integrated device 1, passed through
The connection corresponding with interface 102 of metallic pattern 31 on layer is rerouted, and in integrated device 1 and plastic packaging layer 2 close to the first face 11
Side forms insulating barrier 4, and insulating barrier 4 exposes a part for metallic pattern 31 to form pad, without using soldering ball, copper post
Deng intermediate materials, solve due to the quality factor in integrated device caused by the dead resistance of soldered ball etc. inductively or capacitively significantly
The problem of reduction, the access of soldered ball is avoided, realize reduction dead resistance, improve the quality inductively or capacitively of integrated device
Factor, optimize the purpose of integrated device performance.
Optionally, metallic pattern 31 covers and contacts its corresponding interface 102, and the area of metallic pattern 31 is corresponding more than it
Interface 102 area.
Wherein, in order to ensure the corresponding interface 102 of metallic pattern 31 can be connected effectively, formed with external circuit logical
Road, metallic pattern 31 can be completely covered or part covers corresponding interface 102.Actually should in view of metallic pattern 31
Can also there is the dead resistance of very little in, therefore, in order to further reduce dead resistance resistance in metallic pattern 31, avoid it
Reduce the quality factor inductively or capacitively of integrated device 1 in radio frequency module or frequency applications, can suitably expand metal figure
The area of shape 31, optionally, the area of metallic pattern 31 can be more than the area of its corresponding interface 102.
Fig. 3 is the structural representation for another integrated circuit module structure that the embodiment of the present invention one provides.Referring to Fig. 3,
Optionally, the number of integrated device 1 is more than one, and the interface 102 of multiple integrated devices 1 is connected by metallic pattern 31.
It is understood that needing to set more than one integrated device 1 in the integrated circuit module structure in part, can set
The integrated device 1 that multiple function phases are same or function is different, to reach the effect that function is more, integrated level is high.When integrated device 1
Number is more than one, and when needing to be connected with each other between integrated device 1, the interface 102 of multiple integrated devices 1 can pass through metal figure
Shape 31 connects.Wherein, when all integrated devices 1 are required to connect together, the sufficiently large metal of an area can be passed through
Figure 31 is connected；When having special annexation between each integrated device 1, several independent metallic patterns can also be passed through
31 are attached respectively.
Because insulating barrier 4 can expose the part of metallic pattern 31 to form pad, the pad of formation is used for and outside
Other integrated circuit module structure, printed circuit board (PCB) or other structures are connected, in order to avoid rerouting each gold on layer
The pad formed in category figure 31 occurs with occurring situations such as unnecessary short circuit in other structures connection procedure, optionally, absolutely
Edge layer 4 is dielectric materials layer.
Embodiment two
Fig. 4 is a kind of preparation method flow chart for integrated circuit module structure that the embodiment of the present invention two provides.Fig. 5 is this
Structure chart corresponding to a kind of preparation method for integrated circuit module structure that inventive embodiments two provide., should referring to Fig. 4 and Fig. 5
The preparation method of integrated circuit module structure includes：
S10：Support plate 5 is provided, transition glue 6 is formed on support plate 5.
S20：Integrated device 1 is set on transition glue 6, is provided with functional circuit 101 on integrated device 1, integrated device 1 wraps
Relative the first face 11 and the second face 12 are included, be connected with partial function circuit 101 at least one is provided with the first face 11 and is connect
Mouth 102, the second face 12 contacts with transition glue 6.
Wherein, in integrated circuit module configuration process is made, support plate 5 provides platform for making.Transition is formed on support plate 5
Glue 6, so as to which integrated device 1 can be fixedly installed on transition glue 6, prevent integrated device 1 from occurring in subsequent fabrication process partially
Move or tilt.Wherein, it will be provided with integrated device 1 and be placed on far with the first face 11 of the connecting interface 102 of partial function circuit 101
From the side of transition glue 6, the second face 12 of integrated device 1 is contacted with transition glue 6.
S30：Plastic packaging layer 2 is formed on transition glue, plastic packaging layer 2 coats integrated device 1.
In order to prevent that integrated device 1 from being corroded by water oxygen, the performance of integrated device 1 is influenceed, integrated device 1 is moulded
Envelope.Because integrated device 1 is arranged on transition glue 6, plastic packaging layer 2 is formed on transition glue 6, plastic packaging layer is coated integrated device 1,
Ensure the sealing of integrated device 1.
S40：Plastic packaging layer 2 is thinned, plastic packaging layer 2 is exposed outgoing interface 102.
Because integrated device 1 needs to be attached with external circuit, so that its work well of partial function circuit 101.Phase
The plastic packaging layer 2 of the side of first face 11, example where the interface 102 being connected in integrated device 1 with partial function circuit 101 should be thinned
Such as plastic packaging layer 2 is set to expose outgoing interface 102 by grinding plastic packaging layer 2.
In order to expose outgoing interface 102, it is necessary to plastic packaging layer 2 be thinned, wherein it is possible to which plastic packaging layer 2 is thinned using various ways.Show
Example property, can polish plastic packaging layer 2, plastic packaging layer 2 is exposed the first face 11 of the integrated device 1 at the place of outgoing interface 102.It can manage
Solution, in order that interface 102 is exposed, it can also use other modes that plastic packaging layer 2, such as chemical etching, wet method is thinned
The modes such as grinding.
S50：At least one layer of rewiring layer is formed on plastic packaging layer 2, every layer of layer that reroutes includes at least one metal
Figure 31, the connection corresponding with interface 102 of metallic pattern 31, wherein, the metallic pattern 31 itself forms remaining functional circuit,
Or the metallic pattern 31 is directly connected to remaining functional circuit.
It is connected in order to facilitate interface 102 with outside other structures, connection corresponding with interface 102 is formed on plastic packaging layer 2
Metallic pattern 31, such as by deposited metal layer, metallic pattern 31 is formed by techniques such as exposure imagings, metallic pattern 31
Number is at least one.Wherein in order to reduce the dead resistance resistance in integrated circuit module structure as far as possible, metallic pattern 31
Material uses the metal of high conductivity, on the premise of the normal work of metallic pattern 31 is ensured, can make the area of metallic pattern 31
It is as big as possible.
S60：In plastic packaging layer 2 and formation insulating barrier 4 on layer is rerouted, one layer of rewiring layer, insulation are covered per layer insulating 4
Layer 4 exposes a part for metallic pattern 31.
Because the area of metallic pattern 31 is larger, and the interface 102 of integrated device 1 is outside plastic packaging layer 2.In the collection
When being connected into circuit module structure with external circuit, in order to avoid occurring between metallic pattern 31 or interface 102 and external circuit
Situations such as unnecessary short circuit, occurs, and insulating barrier 4 is formed on the basis of plastic packaging layer 2 and metallic pattern 31, and insulate being formed
During layer 4, control insulating barrier 4 exposes a part for metallic pattern 31.A part for exposed metallic pattern 31 forms pad, uses
In realizing the connection between the integrated circuit module structure and external circuit.It should be noted that insulating barrier 4 can pass through deposition
Mode formed, be respectively provided with good cohesive between insulating barrier 4 and integrated device 1, metallic pattern 31 and plastic packaging layer 2, because
This, on the one hand, insulating barrier 4 can play a certain degree of sealing function, protect integrated device 1 not corroded by water oxygen, the opposing party
Face, can also avoid passing through ball bond insulating barrier 4 and integrated device 1 or metallic pattern 31, in integrated circuit module structure not
Need to access the larger soldered ball of dead resistance again.
It should be noted that insulating barrier 4 and rewiring layer may each be one layer or multilayer.Exemplarily, moulding
Multilayer is formed on sealing 2 and reroutes layer, each layer is isolated between rerouting layer by insulating barrier 4, realizes that each layer reroutes by through hole 41
Electrical connection between layer.
When it is multilayer to reroute layer, insulating barrier 4 also can be multilayer, be kept apart each layer rewiring layer by insulating barrier 4,
The generation of situations such as to avoid short circuit.Metallic pattern 31 can be exposed in opened hole 41 on the insulating barrier 4 between rerouting layer
A part, to realize that each layer reroutes the electrical connection between the metallic pattern 31 of layer.
It can be deposited on plastic packaging layer 2 and form dielectric materials layer, the dielectric materials layer covering metallic pattern 31 and collection of formation
Into device 1；Etch dielectric materials layer is to expose a part for metallic pattern 31.
Wherein, in order that the cohesive between insulating barrier 4 and plastic packaging layer 2 is preferable, the insulating properties of insulating barrier 4 are ensured, can
The dielectric materials layer of good insulation preformance is formed in a manner of using depositing.The dielectric materials layer covering metallic pattern 31 and collection of formation
Into device 1, the generation for situations such as integrated device 1 can be protected not weather and avoid unnecessary short circuit.In order that metal figure
Shape 31 can be connected with external circuit, and one of metallic pattern 31 can be exposed using the method for etch dielectric materials layer
Point.
The preparation method of integrated circuit module structure provided in an embodiment of the present invention, without using in soldering ball, copper post etc.
Between material, dead resistance is greatly reduced, solves electric capacity in integrated device 1 caused by the dead resistance of soldered ball etc. in the prior art
Or the quality factor of inductance the problem of being greatly reduced, the appearance of soldered ball is avoided, realizes reduction dead resistance, improves integrator
The quality factor inductively or capacitively of part 1, optimize the purpose of the performance of integrated device 1.
Optionally, after the insulating barrier 4 is formed, in addition to S70：Remove support plate 5 and transition glue 6.
Because support plate 5 is only to provide platform for making during integrated circuit module structure is made, transition glue 6 is simply
Fixed integrated device 1, the two can't be encapsulated in integrated circuit module structure, therefore after form insulating barrier 4, Ke Yitong
Cross the modes such as high temperature and remove transition glue 6.After transition glue 6 is removed, support plate 5 can come off naturally.Support plate 5 can recycle,
For the making of next group integrated circuit module structure, therefore, the system of integrated circuit module structure provided in an embodiment of the present invention
Making method can be with cost-effective.
Optionally, metallic pattern 31 can be formed on plastic packaging layer using rewiring technology, the metallic pattern 31 of formation covers
Cover and contact its corresponding interface 102, the area of the metallic pattern 31 of formation is more than the area of its corresponding interface 102.
Due to the original design in line contacts position can be changed using rewiring technology, increase the extra price of original design
Value, the spacing of line contacts position can be increased, there is provided larger projection area, reduce answering between insulating barrier 4 and integrated device 1
Power, increase the reliability of integrated device 1.It is therefore possible to use the technology of rewiring is in the plastic packaging layer 2 that interface 102 is exposed
Upper formation metallic pattern 31.In order that metallic pattern 31 and interface 102 can be connected effectively, metallic pattern 31 can be covered partly
Or interface 102 is completely covered.In order to reduce the resistance of the dead resistance in integrated circuit module structure, and ensure metallic pattern
31 and interface 102 effectively contact, the area of metallic pattern 31 can be more than the area of its corresponding interface 102.
In view of can also have dead resistance in metallic pattern 31, in order to reduce the resistance of its dead resistance, metallic pattern
31 material can select the high metal material of electrical conductivity, and optionally, the material of metallic pattern 31 can be copper.
Pay attention to, above are only presently preferred embodiments of the present invention and institute's application technology principle.It will be appreciated by those skilled in the art that
The invention is not restricted to specific embodiment described here, can carry out for a person skilled in the art various obvious changes,
Readjust and substitute without departing from protection scope of the present invention.Therefore, although being carried out by above example to the present invention
It is described in further detail, but the present invention is not limited only to above example, without departing from the inventive concept, also
Other more equivalent embodiments can be included, and the scope of the present invention is determined by scope of the appended claims.
Claims (10)
- A kind of 1. integrated circuit module structure, it is characterised in that including：Integrated device, is provided with partial function circuit on the integrated device, the integrated device include the first relative face and Second face, at least one interface being connected with the partial function circuit is provided with first face；Plastic packaging layer, the plastic packaging layer expose the first face of the integrated device；Layer is rerouted, the rewiring layer is at least one layer of, and every layer of layer that reroutes includes at least one metallic pattern, the gold Belong to figure connection corresponding with the interface, wherein, the metallic pattern itself forms remaining functional circuit, or the metal Figure is directly connected to remaining functional circuit；Insulating barrier, include extremely close to the side in first face, the insulating barrier positioned at the integrated device and the plastic packaging layer Few one layer, every layer of insulating barrier covers one layer of rewiring layer, and the insulating layer exposing goes out one of the metallic pattern Divide to form pad.
- 2. integrated circuit module structure according to claim 1, it is characterised in that the metallic pattern covers and contacts it The corresponding interface, the area of the metallic pattern are more than the area of the interface corresponding to it.
- 3. integrated circuit module structure according to claim 1, it is characterised in that the number of the integrated device is more than one Individual, the interface of multiple integrated devices is connected by the metallic pattern.
- 4. integrated circuit module structure according to claim 1, it is characterised in that the rewiring layer includes multilayer, respectively By insulator separation between layer rewiring layer, the electrical connection between each rewiring layer is realized by through hole.
- A kind of 5. preparation method of integrated circuit module structure, it is characterised in that including：Support plate is provided, transition glue is formed on the support plate；Integrated device or/and surface mount device, the integrated device or/and surface mount device are set on the transition glue On be provided with partial function circuit, the integrated device or/and surface mount device include relative the first face and the second face, institute At least one interface for being provided with the first face and being connected with the partial function circuit is stated, second face is glued with the transition Touch；Plastic packaging layer is formed on the transition glue, the plastic packaging layer coats the integrated device or/and surface mount device；The plastic packaging layer is thinned, the plastic packaging layer is exposed the interface；At least one layer of rewiring layer is formed on the plastic packaging layer, every layer of layer that reroutes includes at least one metallic pattern, Metallic pattern connection corresponding with the interface, wherein, the metallic pattern itself forms remaining functional circuit, Huo Zhesuo State metallic pattern and be directly connected to remaining functional circuit；At least one layer of insulating barrier is formed on the plastic packaging layer and the rewiring layer, every layer of insulating barrier is covered described in one layer Layer is rerouted, the insulating layer exposing goes out a part for the metallic pattern.
- 6. the preparation method of integrated circuit module structure according to claim 5, it is characterised in that forming the insulation After layer, in addition to：Remove the support plate and the transition glue.
- 7. the preparation method of integrated circuit module structure according to claim 5, it is characterised in that using rewiring technology The metallic pattern is formed on the plastic packaging layer, the metallic pattern of formation covers and contacts the interface corresponding to it, The area of the metallic pattern formed is more than the area of the interface corresponding to it.
- 8. the preparation method of integrated circuit module structure according to claim 7, it is characterised in that the metallic pattern Material is copper.
- 9. the preparation method of integrated circuit module structure according to claim 5, it is characterised in that in the plastic packaging layer and At least one layer of insulating barrier is formed on the rewiring layer, every layer of insulating barrier covers one layer of rewiring layer, including：Multilayer is formed on the plastic packaging layer and reroutes layer, each layer is described to reroute between layer by insulator separation, real by through hole Now respectively reroute the electrical connection between layer.
- 10. the preparation method of integrated circuit module structure according to claim 5, it is characterised in that in the plastic packaging layer At least one layer of insulating barrier is formed with the rewiring layer, the insulating layer exposing goes out a part for the metallic pattern, including：Deposition forms at least one layer of dielectric materials layer, the dielectric material of formation on the plastic packaging layer and the rewiring layer Layer covers the metallic pattern and the integrated device；The dielectric materials layer is etched to expose a part for the metallic pattern.
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711278627.3A CN107845614A (en) | 2017-12-06 | 2017-12-06 | A kind of integrated circuit module structure and preparation method thereof |
| US16/763,899 US20210375814A1 (en) | 2017-12-06 | 2018-05-22 | Integrated circuit module structure and method for manufacturing same |
| JP2020542483A JP7130047B2 (en) | 2017-12-06 | 2018-05-22 | Integrated circuit module structure and fabrication method thereof |
| PCT/CN2018/087885 WO2019109600A1 (en) | 2017-12-06 | 2018-05-22 | Integrated circuit module structure and method for manufacturing same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN201711278627.3A CN107845614A (en) | 2017-12-06 | 2017-12-06 | A kind of integrated circuit module structure and preparation method thereof |
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| CN107845614A true CN107845614A (en) | 2018-03-27 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2019109600A1 (en) * | 2017-12-06 | 2019-06-13 | 安徽云塔电子科技有限公司 | Integrated circuit module structure and method for manufacturing same |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20080303136A1 (en) * | 2007-06-08 | 2008-12-11 | Nec Corporation | Semiconductor device and method for manufacturing same |
| CN106169459A (en) * | 2015-05-21 | 2016-11-30 | 联发科技股份有限公司 | Semiconductor package and forming method thereof |
| CN207489849U (en) * | 2017-12-06 | 2018-06-12 | 安徽云塔电子科技有限公司 | A kind of integrated circuit module structure |
-
2017
- 2017-12-06 CN CN201711278627.3A patent/CN107845614A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20080303136A1 (en) * | 2007-06-08 | 2008-12-11 | Nec Corporation | Semiconductor device and method for manufacturing same |
| CN106169459A (en) * | 2015-05-21 | 2016-11-30 | 联发科技股份有限公司 | Semiconductor package and forming method thereof |
| CN207489849U (en) * | 2017-12-06 | 2018-06-12 | 安徽云塔电子科技有限公司 | A kind of integrated circuit module structure |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2019109600A1 (en) * | 2017-12-06 | 2019-06-13 | 安徽云塔电子科技有限公司 | Integrated circuit module structure and method for manufacturing same |
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