CN104409369B - Package assembling manufacturing method - Google Patents
Package assembling manufacturing method Download PDFInfo
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- CN104409369B CN104409369B CN201410603661.3A CN201410603661A CN104409369B CN 104409369 B CN104409369 B CN 104409369B CN 201410603661 A CN201410603661 A CN 201410603661A CN 104409369 B CN104409369 B CN 104409369B
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- lead
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- lead frame
- substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- Lead Frames For Integrated Circuits (AREA)
Abstract
Disclose a kind of method for manufacturing package assembling, comprising: lead frame is formed on substrate, the lead frame includes a plurality of leads of first surface exposure；The electronic component that many levels are installed on lead frame, so that the electronic component of at least one level is electrically connected with the first surface of at least one set of lead in a plurality of leads；And at least part of removal substrate, so that the second surface exposure opposite with first surface of a plurality of leads is used for external connection.This method can be improved the yield of package assembling, reduce cost and improve package quality without overturning semiconductor structure in the fabrication process.
Description
Technical field
The present invention relates to semiconductor packages, more particularly to package assembling manufacturing method.
Background technique
With the increase of the demand of the miniaturization of electronic component, lightweight and multifunction, to semiconductor packaging density
Requirement it is higher and higher, with achieve the effect that reduce package dimension.Therefore, using lead frame and include multiple semiconductor elements
Package assembling have become new hot spot.In this package assembling, the configuration and attaching method thereof of multiple semiconductor elements
There is vital influence on the size of package assembling and performance.
The multilayer encapsulation component stacked has been proposed, plurality of semiconductor element is stacked on the same lead frame.
It can be directly anchored on lead frame by solder positioned at undermost semiconductor element.Semiconductor element positioned at upper layer can be with
It is fixed on by adhesive layer on the top surface of following one layer of semiconductor element.Then, partly the leading upper layer by bonding line
Body tube core is electrically connected on lead frame.The semiconductor element integrated in a package assembling not only can be IC chip
(such as power device chip of Switching Power Supply and control chip etc.) is also possible to discrete component (such as power plant, capacitor and resistance
Deng).
Relative to planar package component, the multilayer encapsulation component of stacking can reduce chip area footprints, to reduce envelope
Size is filled, while there is shorter delay time and smaller noise.Therefore, it is used to form the technique of multilayer encapsulation component increasingly
The concern of people.
However, stacked multilayer semiconductor element causes packaging technology to complicate on lead frame, such as in packaging technology,
It needs to overturn lead frame, to reduce the yield of package assembling, cost is caused to improve.In addition, carrying lead in packaging technology
A part of region of the substrate of frame etches through.The thickness of substrate must be sufficiently large, the mechanical support effect needed for could providing.
As a result, the size of package assembling is difficult to minimize.
Therefore, it is desirable to advanced optimize the manufacturing method of package assembling to reduce process complexity.
Summary of the invention
In view of this, the purpose of the present invention is to provide a kind of manufacturing method of package assembling, to solve multilayer encapsulation group
The problem of manufacturing process complication of part causes cost to improve.
According to the present invention, a kind of method manufacturing package assembling is provided, comprising: lead frame is formed on substrate, it is described to draw
Wire frame includes a plurality of leads of first surface exposure；The electronic component of many levels is installed on lead frame, so that at least one
The electronic component of level is electrically connected with the first surface of at least one set of lead in a plurality of leads；And removal substrate is extremely
Few a part, so that the second surface exposure opposite with first surface of a plurality of leads is used for external connection.
Preferably, in institute's method, formed lead frame the step of include: that a plurality of leads is formed on package substrate；And
Table top is formed on at least another group of lead in a plurality of leads, the surface of the table top is higher than the first surface, and
And the apparent height of the table top formed on the different group leads in at least another group of lead is different, wherein multiple installing
In the step of electronic component of level, the electronic component of at least another level with it is described at least another in a plurality of leads
The first surface electrical connection of group lead.
Preferably, it in institute's method, is separated between a plurality of leads by groove, in the step of forming a plurality of leads and shape
It further include that groove is filled using encapsulating compound between the step of table top.
Preferably, in institute's method, formed a plurality of leads the step of include: that metal layer is formed on substrate；And via
Metal layer pattern is melted into a plurality of leads by etching by the mask comprising lead pattern.
Preferably, in institute's method, formed a plurality of leads the step of include: via the mask comprising lead complementary patterns,
The a plurality of leads is formed by the exposed surface coating metal material in substrate.
Preferably, in institute's method, the step of forming a plurality of leads includes: to be formed on substrate comprising lead complementary patterns
Mask；And the surface layer of substrate is patterned to a plurality of leads by etching.
Preferably, in institute's method, formed a plurality of leads the step of include: to be patterned to the surface layer of substrate by punching press
The a plurality of leads.
It preferably, include: to draw from neighbouring in the step of installing the electronic component of many levels on lead frame in institute's method
The first level of wire frame starts, and level installs electronic component one by one；And after the electronic component of installation structure at all levels, use
Encapsulating compound at least partly covers lead frame and electronic component, wherein the electronic component of the first level and at least one set of lead
In one group of lead first surface electrical connection, the respective sets in the electronic component of subsequent level and at least another group of lead
Lead table top electrical connection.
It preferably, include: to draw from neighbouring in the step of installing the electronic component of many levels on lead frame in institute's method
The first level of wire frame starts, and level is installed electronic component and at least partly covered the electronics of corresponding level using encapsulating compound one by one
Element, wherein after the electronic component for installing a level and before installing the electronic component of next level, using encapsulation
Material at least partly covers the lead and electronic component of one level, and the electronic component of the first level draws at least one set
The first surface of one group of lead in line is electrically connected, and the electronic component of subsequent level is corresponding in at least another group of lead
The table top electrical connection of the lead of group.
It preferably, further include smooth described one before the electronic component for installing next level in institute's method
The encapsulating compound of a level is with the first surface of the lead of exposure next level.
Preferably, in institute's method, in the step of installing the electronic component of many levels, at least one level
The first surface of electronic component and at least one set of lead in a plurality of leads formed it is welding flux interconnected and it is described at least
The surface of the electronic component of another level and the table top forms welding flux interconnected.
It preferably, further include forming weight cloth between the step of filling groove using encapsulating compound and the step of forming table top
Line layer, wherein the rewiring layer includes a plurality of conductor lines, and a plurality of conductor lines are laterally extended and including relative to each other
First surface and second surface, wherein the first surface of a plurality of conductor lines contacts the first surface of a plurality of leads.
Preferably, in institute's method, in the step of installing the electronic component of many levels, at least one level
Electronic component and the second surface of at least one set of conductor lines of a plurality of conductor lines form welding flux interconnected and described at least another
The surface of the electronic component of one level and the table top forms welding flux interconnected.
Method according to the claims, in the step of installing the electronic component of many levels on lead frame and removal base
Between the step of plate, further includes: in the surface additional heat sink of encapsulating compound.
Method according to the claims, before the surface additional heat sink of encapsulating compound, further includes: by grind come
The thickness of smooth envelope encapsulating compound and the top layer for reducing encapsulating compound.
In the method for above-mentioned manufacture multilayer encapsulation component according to the present invention, the first surface of lead is opposite with substrate,
Second surface is in contact with substrate.In the manufacturing process of package assembling, the first surface of lead is placed upward always, without
Overturn semiconductor structure.In addition, substrate provides mechanical support effect in almost entire packaging technology, until having used second
Encapsulating compound encapsulates lead frame and electronic component, just removes substrate.In final package assembling, the first surface of lead provide with
The interconnecting area of electronic component inside encapsulating structure, second surface provide and external circuit (such as printed circuit board, i.e. PCB)
Contact zone.
Due to being not necessarily to overturn semiconductor structure in the above-mentioned methods, the yield of encapsulation can be effectively improved, is reduced
Packaging cost.
In packaging technology, substrate keeps complete and does not etch through, to the last the step of just etching remove.Substrate is several
Mechanically supportive in entire encapsulation process is preferable, is conducive to the quality for improving encapsulation.Even if the thickness due to substrate reduces,
Enough mechanical support effects can be also provided, therefore be conducive to the miniaturization of package assembling.
Detailed description of the invention
By referring to the drawings to the description of the embodiment of the present invention, above-mentioned and other purposes of the invention, feature and
Advantage will be apparent from, in the accompanying drawings:
Fig. 1 a to 1g shows the sectional view that each step of method of multilayer encapsulation component is manufactured according to the prior art；
Fig. 2 a to 2g shows each step of the first embodiment of the method for multilayer encapsulation component constructed in accordance
Sectional view；
Fig. 3 a and 3b show a part of step of the second embodiment of the method for multilayer encapsulation component constructed in accordance
Sectional view；
Fig. 4 a to 4d shows a part of step of the method 3rd embodiment of multilayer encapsulation component constructed in accordance
Sectional view；And
Fig. 5 a to 5e shows a part of step of the method fourth embodiment of multilayer encapsulation component constructed in accordance
Sectional view.
Specific embodiment
The various embodiments that the present invention will be described in more detail that hereinafter reference will be made to the drawings.In various figures, identical element
It is indicated using same or similar appended drawing reference.For the sake of clarity, the various pieces in attached drawing are not necessarily to scale.For
For the sake of concise, the encapsulating structure obtained after several steps can be described in a width figure.
It should be appreciated that being known as being located at another layer, another region when by one layer, a region when describing encapsulating structure
When " above " or " top ", can refer to above another layer, another region, or its with another layer, another
Also comprising other layers or region between region.Also, if device overturn, this layer, region will be located at another layer,
Another region " following " or " lower section ".If in order to describe located immediately at another layer, another region above scenario, herein
Will using " directly existing ... above " or " ... abut above and therewith " form of presentation.
Many specific details of the invention, such as structure, material, size, the processing work of encapsulation is described hereinafter
Skill and technology, to be more clearly understood that the disclosure.But it just as the skilled person will understand, can not press
The disclosure is realized according to these specific details.
In this application, term " semiconductor structure " refers to entire half formed in each step of manufacturing semiconductor devices
The general designation of conductor structure, including all layers formed or region.Term " electronic component " is not limited to semiconductor element, should
It is interpreted as the encapsulated object of broad sense, including semiconductor element and discrete component (such as resistor, capacitor, inductor, two poles
Pipe, transistor) etc..
Fig. 1 a to 1g shows the sectional view that each step of method of multilayer encapsulation component is manufactured according to the prior art.The party
Method includes the electronic component for forming lead frame on substrate and stacking many levels on lead frame.
This method for example starts from including the folded of substrate 101 (such as iron-nickel alloy) and metal layer (such as Cu) thereon
Layer, wherein substrate 101 is used as supporting layer, and finally will partially remove as sacrificial layer.For example, by using the first mask, pass through
Etching metal layer is patterned into stripped lead 102, as shown in Figure 1a.In etching, etchant is relative to lower layer
Substrate 101 be optionally removed the expose portion of metal layer.The first mask is removed after the etching.
The first surface and substrate 101 for the lead 102 that above-mentioned steps are formed are opposite, and second surface is connected with substrate 101
Touching.
Then, using the exposed surface of the first encapsulating compound 103 (such as epoxy resin) covering lead 102 and substrate 101, such as
Shown in Fig. 1 b.The thickness of encapsulating compound 103 is at least enough to fill the groove between adjacent lead 102.Such as it is put down by grinding
Whole encapsulating compound 103, so that the first surface of lead 102 exposes again, as illustrated in figure 1 c.For example, by using the second mask, using choosing
The etchant of selecting property removes substrate 101 relative to lead 102 and encapsulating compound 103 in the installation region of substrate 101, thus shape
At the opening of the second surface of exposed leads 102, as shown in Figure 1 d.First surface and second surface are relative to each other.Substrate 101
Non- etching part provides mechanical support effect in an etching step.After the second surface of exposed leads 102, by semiconductor junction
Structure is spun upside down.For example, by using third mask, whole second surfaces of a part of lead are blocked, and blocks and draws positioned at the part
At least part second surface of another part lead of line periphery.Pass through the exposed surface in another part lead 102
Plating (such as plating, chemical plating etc.) metal material identical with the composition metal of lead, forms table top 104, as shown in fig. le.
A part of lead 102 being blocked is used as first group of lead, forms another part lead 102 of table top as the
Two groups of leads.Third mask is removed after plating, to form the lead frame including two groups of leads 102 on the substrate 101
110。
In lead frame 110, the second surface of lead 102 is placed upward.Second table of first group of lead in lead 102
Face directly exposes, for providing interconnecting area.Table top 104, the table top are formed on the second surface of second group of lead in lead 102
104 for providing interconnecting area.
First electronic component 120 is placed on lead frame 110.The internal circuit of first electronic component 120 is via conduction
Channel etc. is electrically connected to conductive bump 106.The solder ball 105 for being attached to 106 end of conductive bump and first group in lead 102 draw
The interconnecting area of line is in contact.Reflux technique is executed, so that the fusing of solder ball 105 forms solder 105, by the first electronic component 120
It is fixed on lead frame 110.Then, the second electronic component 130 is placed on lead frame 110.Reflux technique is executed again, benefit
Second electronic component 130 is fixed on second group of lead of lead frame 110 with solder 107, as shown in Figure 1 g.Then, it uses
Second encapsulating compound 140 (such as epoxy resin) encapsulates lead frame 110, electronic component 120,130, to form package assembling 100.
In the above-mentioned method for manufacturing multilayer encapsulation component according to the prior art, the first surface and substrate 101 of lead 102
Relatively, second surface is contacted with substrate 101.The first surface of lead 102 is initially placed upward.In the step shown in Fig. 1 e,
Semiconductor structure overturning.Draw this is because the mechanical strength through overetched substrate 101 is not enough to support in subsequent technique
Wire frame 110.By overturning, the first surface of lead 102 is placed downward, to utilize lead 102 itself in subsequent steps
First surface provide mechanical support effect.
In final package assembling 100, the first surface of lead 102 is placed downward, for providing and external circuit
Contact zone, second surface are placed upward, for providing the interconnecting area with the electronic component inside encapsulating structure.
Due to needing to overturn semiconductor structure in the above-mentioned methods, operating process is complex, and is unfavorable for improving
The yield of packaging, so that the cost of encapsulation cannot be effectively reduced.
Fig. 2 a to 2g shows each step of the first embodiment of the method for multilayer encapsulation component constructed in accordance
Sectional view.This method includes the electronic component for forming lead frame on substrate and stacking many levels on lead frame.
This method for example starts from including the folded of substrate 201 (such as iron-nickel alloy) and metal layer (such as Cu) thereon
Layer, wherein substrate 201 is used as supporting layer, and finally will partially remove as sacrificial layer.For example, by using including lead pattern
The first mask, by etch metal layer be patterned into stripped lead 202, as shown in Figure 2 a.In etching, erosion
Carve the expose portion that agent is optionally removed metal layer relative to the substrate 201 of lower layer.The first mask is removed after the etching.
The first surface and substrate 202 for the lead 202 that above-mentioned steps are formed are opposite, and second surface is connected with substrate 202
Touching.
Then, using the exposed surface of the first encapsulating compound 203 (such as epoxy resin) covering lead 202 and substrate 201, such as
Shown in Fig. 2 b.The thickness of encapsulating compound 203 is at least enough to fill the groove between adjacent lead 202.Such as it is put down by grinding
Whole encapsulating compound 203, so that the first surface of lead 202 exposes again, as shown in Figure 2 c.For example, by using the second mask, one is blocked
Whole first surfaces of part lead, and block at least part positioned at another part lead of the part lead periphery
One surface.By exposed surface plating in another part lead 202 metal material identical with the composition metal of lead,
Table top 204 is formed, as shown in Figure 2 d.A part of lead 202 being blocked is used as first group of lead, forms the institute of table top
It states another part lead 202 and is used as second group of lead.The second mask is removed after plating, to form packet on substrate 201
Include the lead frame 210 of two groups of leads 202.
In the step of forming table top 204, since the opening of the second mask is difficult accurately to be aligned with lead 202,
The area of usual second mask is slightly less than the sectional area (sectional area with opening parallel direction) of lead 202.As a result, table top 204
Surface area be slightly less than the surface area of lead 202, to ensure that table top 204 is formed in completely on the surface of lead 202, and can avoid
Table top 204 is formed to be connected to two connected leads 202.
In lead frame 210, the first surface of lead 202 is placed upward.First table of first group of lead in lead 202
Face directly exposes, for providing interconnecting area.Table top 204, the table top are formed on the first surface of second group of lead in lead 202
204 for providing interconnecting area.
First electronic component 220 is placed on lead frame 210.The internal circuit of first electronic component 220 is via conduction
Channel etc. is electrically connected to conductive bump 206.The solder ball 205 for being attached to 206 end of conductive bump and first group in lead 202 draw
The interconnecting area of line is in contact.Reflux technique is executed, so that the fusing of solder ball 205 forms solder 205, by the first electronic component 220
It is fixed on lead frame 210.Then, the second electronic component 230 is placed on lead frame 210.Reflux technique is executed again, benefit
Second electronic component 230 is fixed on solder 207 on the table top 204 of second group of lead of lead frame 210, as shown in Figure 2 e.
Then, lead frame 210, electronic component 220,230 are encapsulated using the second encapsulating compound 240 (such as epoxy resin), as shown in figure 2f.
Such as in the case of mask is not used, using the etchant of selectivity, substrate is removed relative to lead 202 and encapsulating compound 203
201, so that the second surface of exposed leads 202 is formed, as shown in Figure 2 g, to form package assembling 200.
First electronic component 220 is, for example, the chip comprising power device, such as comprising in Switching Power Supply power stage circuit
Main power tube chip, may also include the control circuit of Switching Power Supply in the chip, it is whole to may also comprise synchronizing for Switching Power Supply
Flow tube.Second electronic component 230 is for example including the inductance in Switching Power Supply, or the discrete components such as capacitor or resistance.
In a preferred embodiment, the step shown in Fig. 2 f is formed after the second encapsulating compound 240, can be second
Additional heat sink on the surface of encapsulating compound 240.Such as by grinding come smooth the second encapsulating compound of envelope 240, and reduce the second envelope
The thickness of the top layer of charging 240, to reduce encapsulation volume and improve heat dissipation efficiency.Step shown in Fig. 2 g is then proceeded to, is gone
Except substrate 210.
In an alternative embodiment, start from (such as the iron of substrate 201 in the step of forming lead 202 on substrate 201
Nickel alloy), wherein substrate 201 is used as supporting layer, and finally will partially remove as sacrificial layer.It is covered for example, by using first
Mould, first mask include lead complementary patterns, i.e. the opening of mask corresponds to the pattern of lead.First mask blocks substrate
201 a part of surface.By the exposed surface coating metal material (such as Cu) in the substrate 201, formed stripped
Lead 202, as shown in Figure 2 a.The first mask is removed after plating.Then, the step of continuing to execute Fig. 2 b to Fig. 2 g, with shape
At package assembling 200.
In another alternative embodiment, on substrate 201 formed lead 202 the step of start from substrate 201 (such as
Iron-nickel alloy).Such as by half-etching and/or Sheet Metal Forming Technology, lead 202 is formed on the surface of substrate 201, such as Fig. 2 a institute
Show.Optionally, encapsulating compound 203 is filled in the groove between adjacent lead 202.Then, continue to execute Fig. 2 d's to Fig. 2 g
Step, to form package assembling 200.
Fig. 3 a and 3b show a part of step of the second embodiment of the method for multilayer encapsulation component constructed in accordance
Sectional view.In method according to the second embodiment, lead frame 310 is formed first, in accordance with step shown in Fig. 2 a to 2d.Draw
Wire frame 310 is located on substrate 301, first group of lead including not formed table top and second group of lead for forming table top 304.First
The surface of group lead directly provides interconnecting area, and the table top 304 of second group of lead provides interconnecting area.
It is different from the first embodiment in, method according to the second embodiment continues to execute step shown in Fig. 3 a and 3b
Suddenly.
First electronic component 320 is placed on lead frame 310.The internal circuit of first electronic component 320 is via conduction
Channel etc. is electrically connected to conductive bump 306.The solder ball 305 for being attached to 306 end of conductive bump and first group in lead 302 draw
The interconnecting area of line is in contact.Reflux technique is executed, so that the fusing of solder ball 305 forms solder 305, by the first electronic component 320
It is fixed on lead frame 310.Then, lead frame 310, electronic component are encapsulated using the second encapsulating compound 340 (such as epoxy resin)
320.Such as by grinding come smooth the second encapsulating compound of envelope 340, with the table top 304 of second group of lead 302 of exposure.Then, by
Two electronic components 330 are placed on the second encapsulating compound 340.Reflux technique is executed again, using solder 307 by the second electronic component
330 are fixed on the table top 304 of second group of lead of lead frame 310.Then, using (such as the asphalt mixtures modified by epoxy resin of third encapsulating compound 350
Rouge) encapsulating lead frame 310, electronic component 320,330, as shown in Figure 3a.Such as in the case of mask is not used, using selection
Property etchant, remove substrate 301 relative to lead 302 and encapsulating compound 303, to form the second surface of exposed leads 302,
As shown in Figure 3b, to form package assembling 300.
Fig. 4 a to 4d shows a part of step of the 3rd embodiment of the method for multilayer encapsulation component constructed in accordance
Sectional view.In method according to the third embodiment, lead is formed on substrate 401 first, in accordance with step shown in Fig. 2 a
402.The first surface and substrate 401 of lead 402 are opposite, and second surface is in contact with substrate 401.
It is different from the first embodiment in, method according to the third embodiment continues to execute step shown in Fig. 4 a to 4d
Suddenly.
Then, for example, by using the first mask, whole first surfaces of a part of lead are blocked, and are blocked positioned at the part
At least part first surface of another part lead of lead periphery.Pass through the exposure table in another part lead 402
Face plating metal material identical with the composition metal of lead, forms table top 404, as shown in fig. 4 a.Described one be blocked
Part lead 402 is used as first group of lead, and another part lead 402 for forming table top is used as second group of lead.In plating
The first mask is removed later, to form the lead frame 410 including two groups of leads 402 on substrate 401.
In lead frame 410, the first surface of lead 402 is placed upward.First table of first group of lead in lead 402
Face directly exposes, for providing interconnecting area.Table top 404, the table top are formed on the first surface of second group of lead in lead 402
404 for providing interconnecting area.
First electronic component 420 is placed on lead frame 410.The internal circuit of first electronic component 420 is via conduction
Channel etc. is electrically connected to conductive bump 406.The solder ball 405 for being attached to 406 end of conductive bump and first group in lead 402 draw
The interconnecting area of line is in contact.Reflux technique is executed, so that the fusing of solder ball 405 forms solder 405, by the first electronic component 420
It is fixed on lead frame 410.Then, the second electronic component 430 is placed on lead frame 410.Reflux technique is executed again, benefit
Second electronic component 430 is fixed on solder 407 on the table top 404 of second group of lead of lead frame 410, as shown in Figure 4 b.
Then, lead frame 410, electronic component 420,430 are encapsulated using encapsulating compound 440 (such as epoxy resin), as illustrated in fig. 4 c.Such as
In the case of mask is not used, using the etchant of selectivity, substrate 401 is removed relative to lead 402 and encapsulating compound 403,
To form the second surface of exposed leads 402, as shown in figure 4d, to form package assembling 400.
Compared with the method for first embodiment, method according to the third embodiment eliminates the groove between lead 402
The step of interior filling encapsulating compound, the ditch being filled with while encapsulating compound 440 encapsulates lead frame and electronic component between lead 402
Slot further simplifies packaging technology.And since disposable encapsulating compound forms, there is improved reliability.
Fig. 5 a to 5e shows a part of step of the fourth embodiment of the method for multilayer encapsulation component constructed in accordance
Sectional view.In the method according to fourth embodiment, is formed and drawn on substrate 501 first, in accordance with step shown in Fig. 2 a to 2c
Line 502.The first surface and substrate 501 of lead 502 are opposite, and second surface is in contact with substrate 501.Between lead 502
The first encapsulating compound 503 (such as epoxy resin) is filled in groove.
Be different from the first embodiment in, according to the method for fourth embodiment continue to execute Fig. 5 a to 5e shown in step
Suddenly.
By known plating or depositing operation, conductor layer is formed on the surface in semiconductor structure.Shikishima plating process example
In this way selected from one of plating and chemical plating.Depositing operation is, for example, to be selected from electron beam evaporation (EBM), chemical vapor deposition
(CVD), one of atomic layer deposition (ALD), sputtering.
For example, by using the first mask comprising rerouting pattern, rewiring layer is patterned by etched conductors layer
(RDL) 508, as shown in Figure 5 a.In etching, etchant relative to the lead 502 of lower layer and the first encapsulating compound 503 selectively
Remove the expose portion of conductor layer.The first mask is removed after the etching.Reroute the top table that layer 508 includes contact lead-wire 502
The a plurality of conductor lines in face, are laterally extended conductive path,.
Then, for example, by using the second mask, the whole first surfaces for rerouting a part of conductor lines of layer 508 are blocked, with
And block at least part first surface of another part conductor lines for rerouting layer 508 positioned at the part lead periphery.It is logical
Cross the exposed surface plating metal material identical with the composition metal of lead in another part conductor lines for rerouting layer 508
Material forms table top 504, as shown in Figure 5 b.As a result, non-shape on the rewiring layer 508 of first group of wire contacts in lead 502
At table top, table top is formed on the rewiring layer 508 of second group of wire contacts.The second mask is removed after plating, thus
The lead frame 510 including two groups of leads 502 is formed on substrate 501.
In lead frame 510, the first surface of lead 502 is placed upward.First table of first group of lead in lead 502
Face directly exposes, for providing interconnecting area.Table top 504, the table top are formed on the first surface of second group of lead in lead 502
504 for providing interconnecting area.
First electronic component 520 is placed on lead frame 510.The internal circuit of first electronic component 520 is via conduction
Channel etc. is electrically connected to conductive bump 506.One be attached in the solder ball 505 and rewiring layer 508 of 506 end of conductive bump
Part conductor lines are in contact, to be electrically connected with first group of lead in lead 502.Reflux technique is executed, so that solder ball 505 is molten
Change forms solder 505, and the first electronic component 520 is fixed on lead frame 510.Then, the second electronic component 530 is placed on
On lead frame 510.Reflux technique is executed again, second electronic component 530 is fixed on table top 504 using solder 507, is such as schemed
Shown in 5c.Then, lead frame 510, electronic component 520,530 are encapsulated using encapsulating compound 540 (such as epoxy resin), such as Fig. 5 c institute
Show.Such as in the case of mask is not used, using the etchant of selectivity, base is removed relative to lead 502 and encapsulating compound 503
Plate 501, so that the second surface of exposed leads 502 is formed, as fig 5d, to form package assembling 500.
Compared with the method for first embodiment, weight is provided in the top of lead frame 510 according to the method for fourth embodiment
Wiring layer 508.Rerouting layer 508 and can allowing on chip needs connected electrode terminal to connect relatively far apart and again, thus
Without being connected in chip exterior, external disturbance is reduced.And it, can also when upper one layer of electronic component needs are connected with next layer of chip
It is realized by rerouting layer 508.Such as one end of the inductance in Switching Power Supply needs to be connected with the end LX, then it can be by rerouting layer
508 layers of realization.
In each embodiment of the method for above-mentioned manufacture multilayer encapsulation component according to the present invention, the first surface of lead
Opposite with substrate, second surface is in contact with substrate.In the manufacturing process of package assembling, the first surface of lead is put upward always
It sets, without overturning semiconductor structure.
In packaging technology, substrate keeps complete and does not etch through, to the last the step of just etching remove.Substrate is several
Mechanically supportive in entire encapsulation process is preferable, is conducive to the quality for improving encapsulation.Even if the thickness due to substrate reduces,
Enough mechanical support effects can be also provided, therefore be conducive to the miniaturization of package assembling.
In final package assembling, the first surface of lead provides the interconnection with the electronic component inside encapsulating structure
Area, second surface provide the contact zone with external circuit (such as printed circuit board, i.e. PCB).
Due to being not necessarily to overturn semiconductor structure in the above-mentioned methods, the yield of encapsulation can be effectively improved, is reduced
Packaging cost.Also, mechanically supportive of the substrate almost in entire encapsulation process is preferable, is conducive to the quality for improving encapsulation.
It should be noted that herein, relational terms such as first and second and the like are used merely to a reality
Body or operation are distinguished with another entity or operation, are deposited without necessarily requiring or implying between these entities or operation
In any actual relationship or order or sequence.Moreover, the terms "include", "comprise" or its any other variant are intended to
Non-exclusive inclusion, so that the process, method, article or equipment including a series of elements is not only wanted including those
Element, but also including other elements that are not explicitly listed, or further include for this process, method, article or equipment
Intrinsic element.In the absence of more restrictions, the element limited by sentence "including a ...", it is not excluded that
There is also other identical elements in process, method, article or equipment including the element.
It is as described above according to the embodiment of the present invention, these embodiments details all there is no detailed descriptionthe, also not
Limiting the invention is only the specific embodiment.Obviously, as described above, can make many modifications and variations.This explanation
These embodiments are chosen and specifically described to book, is principle and practical application in order to better explain the present invention, thus belonging to making
Technical field technical staff can be used using modification of the invention and on the basis of the present invention well.The present invention is only by right
The limitation of claim and its full scope and equivalent.
Claims (12)
1. a kind of method for manufacturing package assembling, comprising:
Lead frame is formed on substrate, the lead frame includes a plurality of leads, and a plurality of leads includes relative to each other first
Surface and second surface, the first surface exposure of a plurality of leads and second surface are contacted with the substrate, described a plurality of to draw
It is separated between line by groove；
The groove is filled using encapsulating compound；
It is formed on the lead frame and reroutes layer, the rewiring layer includes a plurality of conductor lines, and a plurality of conductor lines are in institute
It states and is laterally extended on lead and including each other relative first surface and second surface, wherein the first of a plurality of conductor lines
Surface contacts the first surface of a plurality of leads, so that conductive path is laterally extended；
Table top is formed in a plurality of conductor lines at least one set of lead in a plurality of leads；
The electronic component of many levels is installed on lead frame, so that the electronic component of at least one level and a plurality of leads
In at least another group of lead first surface electrical connection；And
At least part of substrate is removed, so that the second surface exposure opposite with first surface of a plurality of leads is for outer
Portion's connection.
2. the surface of the table top is higher than a plurality of conductor lines second surface according to the method described in claim 1, wherein,
And the apparent height of the table top formed on the different group leads in at least one set lead is different,
Wherein, install many levels electronic component the step of in, the electronic component of at least another level with it is described a plurality of
The first surface electrical connection of at least one set of lead in lead.
3. according to the method described in claim 2, wherein, in the step of installing the electronic component of many levels, it is described at least
Second table of at least one set of conductor lines of a plurality of conductor lines on the electronic component of one level and at least another group of lead
The surface of electronic component and the table top that face forms at least another welding flux interconnected and described level forms welding flux interconnected.
4. according to the method described in claim 1, the step of wherein forming lead frame includes:
Metal layer is formed on substrate；And
Via the mask comprising lead pattern, metal layer pattern is melted into a plurality of leads by etching.
5. according to the method described in claim 1, the step of wherein forming lead frame includes:
Via the mask comprising lead complementary patterns, described a plurality of draw is formed by the exposed surface coating metal material in substrate
Line.
6. according to the method described in claim 1, the step of wherein forming lead frame includes:
The mask comprising lead pattern is formed on substrate；And
The surface layer of substrate is patterned to a plurality of leads by etching.
7. according to the method described in claim 1, the step of wherein forming lead frame includes:
The surface layer of substrate is patterned to a plurality of leads by punching press.
8. according to the method described in claim 2, wherein including: the step of installing the electronic component of many levels on lead frame
Since the first level of neighbouring lead frame, level installs electronic component one by one；And
After the electronic component of installation structure at all levels, lead frame and electronic component are at least partly covered using encapsulating compound,
Wherein, the electronic component of the first level is electrically connected with the first surface of one group of lead in at least another group of lead,
The electronic component of subsequent level is electrically connected with the table top of the lead of the respective sets at least one set of lead.
9. according to the method described in claim 2, wherein including: the step of installing the electronic component of many levels on lead frame
Since the first level of neighbouring lead frame, level installs electronic component and at least partly covers phase using encapsulating compound one by one
The electronic component of level is answered,
Wherein, after the electronic component for installing a level and before installing the electronic component of next level, using encapsulation
Material at least partly covers the lead and electronic component of one level,
The electronic component of the first level is electrically connected with the first surface of one group of lead in at least another group of lead, subsequent layer
The electronic component in face is electrically connected with the table top of the lead of the respective sets at least one set of lead.
10. according to the method described in claim 9, wherein further including before the electronic component for installing next level
The encapsulating compound of smooth one level is with the first surface of the lead of exposure next level.
11. according to the method described in claim 1, on lead frame install many levels electronic component the step of and removal base
Between the step of plate, further includes: in the surface additional heat sink of encapsulating compound.
12. according to the method for claim 11, before the surface additional heat sink of encapsulating compound, further includes: pass through grinding
The thickness of next smooth envelope encapsulating compound and the top layer for reducing encapsulating compound.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910107499.9A CN109817530B (en) | 2014-10-31 | 2014-10-31 | Packaging assembly manufacturing method |
| CN201410603661.3A CN104409369B (en) | 2014-10-31 | 2014-10-31 | Package assembling manufacturing method |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410603661.3A CN104409369B (en) | 2014-10-31 | 2014-10-31 | Package assembling manufacturing method |
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| CN201910107499.9A Division CN109817530B (en) | 2014-10-31 | 2014-10-31 | Packaging assembly manufacturing method |
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| CN104409369B true CN104409369B (en) | 2019-05-07 |
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| CN201410603661.3A Active CN104409369B (en) | 2014-10-31 | 2014-10-31 | Package assembling manufacturing method |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN105097571B (en) | 2015-06-11 | 2018-05-01 | 合肥矽迈微电子科技有限公司 | Chip packaging method and package assembling |
| CN106057778B (en) | 2016-05-27 | 2018-11-30 | 矽力杰半导体技术(杭州)有限公司 | Encapsulating structure and its manufacturing method |
| CN113725096B (en) * | 2020-03-27 | 2024-06-25 | 矽磐微电子(重庆)有限公司 | Semiconductor packaging method and semiconductor packaging structure |
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| KR20100033247A (en) * | 2008-09-19 | 2010-03-29 | 엘지이노텍 주식회사 | Structure for multi-row leadless lead frame and semiconductor package thereof and manufacture method thereof |
| KR20100034157A (en) * | 2008-09-23 | 2010-04-01 | 엘지이노텍 주식회사 | Structure for multi-row leadless lead frame and semiconductor package thereof and manufacture method thereof |
| CN103633056A (en) * | 2013-12-06 | 2014-03-12 | 矽力杰半导体技术(杭州)有限公司 | Lead frame, packaging subassembly and manufacturing method for lead frame and packaging subassembly |
| CN103633058A (en) * | 2013-12-12 | 2014-03-12 | 矽力杰半导体技术(杭州)有限公司 | Packaging assembly and manufacturing method thereof |
| CN103730444A (en) * | 2014-01-20 | 2014-04-16 | 矽力杰半导体技术(杭州)有限公司 | Packaging assembly and manufacture method thereof |
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| KR20100033247A (en) * | 2008-09-19 | 2010-03-29 | 엘지이노텍 주식회사 | Structure for multi-row leadless lead frame and semiconductor package thereof and manufacture method thereof |
| KR20100034157A (en) * | 2008-09-23 | 2010-04-01 | 엘지이노텍 주식회사 | Structure for multi-row leadless lead frame and semiconductor package thereof and manufacture method thereof |
| CN103633056A (en) * | 2013-12-06 | 2014-03-12 | 矽力杰半导体技术(杭州)有限公司 | Lead frame, packaging subassembly and manufacturing method for lead frame and packaging subassembly |
| CN103633058A (en) * | 2013-12-12 | 2014-03-12 | 矽力杰半导体技术(杭州)有限公司 | Packaging assembly and manufacturing method thereof |
| CN103730444A (en) * | 2014-01-20 | 2014-04-16 | 矽力杰半导体技术(杭州)有限公司 | Packaging assembly and manufacture method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| CN109817530B (en) | 2020-10-30 |
| CN104409369A (en) | 2015-03-11 |
| CN109817530A (en) | 2019-05-28 |
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