CN115954280A - Wafer-level device packaging structure, manufacturing method and packaging body structure - Google Patents
Wafer-level device packaging structure, manufacturing method and packaging body structure Download PDFInfo
- Publication number
- CN115954280A CN115954280A CN202211693657.1A CN202211693657A CN115954280A CN 115954280 A CN115954280 A CN 115954280A CN 202211693657 A CN202211693657 A CN 202211693657A CN 115954280 A CN115954280 A CN 115954280A
- Authority
- CN
- China
- Prior art keywords
- layer
- hole
- devices
- insulating layer
- packaging
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Landscapes
- Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)
Abstract
The invention discloses a wafer-level device packaging structure, a manufacturing method and a packaging body structure, wherein the wafer-level device packaging structure comprises a plurality of first devices, a surrounding barrier layer, a sealing cover layer, a plastic packaging layer and a leading-out part, the first devices comprise surface acoustic wave filters, the front surfaces of the surface acoustic wave filters are provided with functional regions and bonding pads positioned outside the functional regions, the front surfaces of other first devices are provided with bonding pads, the plastic packaging layer covers the plurality of first devices and enables the front surfaces of the plastic packaging layer to be flush with the front surfaces of the first devices, the surrounding barrier layer is arranged on the front surfaces of the plastic packaging layer and the first devices and is provided with first through holes exposing the bonding pads and second through holes exposing the functional regions, the sealing cover layer is arranged on the surrounding barrier layer and is provided with third through holes matched and communicated with the first through holes, the sealing cover layer and the second through holes are surrounded to form a cavity, metal is filled in the first through holes and the third through holes to form a conductive structure connected with the bonding pads, and the leading-out part is connected with the conductive structure, so that light weight and high integration packaging are realized.
Description
Technical Field
The invention relates to the field of device packaging, in particular to a wafer-level device packaging structure, a manufacturing method and a packaging body structure.
Background
With the coming of the 5G era, the frequency bands capable of being used by mobile devices are gradually increased, and the number of radio frequency front-end devices is increased, so that the space of a PCB in a mobile phone is short, and therefore the smart phone needs to be developed towards light weight and high integration while meeting the 5G performance. Due to the existing process precision and material characteristics of the radio frequency module, the further development of light, thin and small radio frequency module is limited.
In the existing radio frequency device packaging process, each radio frequency device needs to be respectively welded in a PCB, the efficiency is low, meanwhile, the area of the PCB occupied by the radio frequency device is large, if a surface acoustic wave filter needs to be integrated, the surface acoustic wave filter needs to be packaged firstly, and then the surface acoustic wave filter is welded in the PCB and integrally packaged with other radio frequency devices, so that the cost is high, and the lightening, thinning and high integration are difficult to realize.
Disclosure of Invention
The invention aims to overcome the defects in the prior art and provides a wafer level device packaging structure, a manufacturing method and a packaging body structure.
In order to achieve the above purpose, the technical scheme of the invention is as follows:
a manufacturing method of a wafer level device packaging structure comprises the following steps:
1) Forming a bonding layer on the surface of the temporary carrier plate; bonding the front surfaces of a plurality of first devices on the temporary carrier plate through the bonding layers, wherein the first devices comprise surface acoustic wave filters, the front surfaces of the surface acoustic wave filters are provided with functional areas and bonding pads positioned on the outer sides of the functional areas, and the front surfaces of other first devices are provided with bonding pads;
2) Forming a plastic packaging layer for coating the plurality of first devices;
3) Removing the temporary carrier plate and the bonding layer to expose the front surface of the first device and the front surface of the plastic packaging layer, wherein the front surface of the plastic packaging layer is flush with the front surface of the first device;
4) Forming a first insulating layer on the front surfaces of the first device and the plastic packaging layer, and etching the first insulating layer to form a first through hole exposing the bonding pad and a second through hole exposing the functional area so as to form an enclosing layer;
5) Forming a second insulating layer above the blocking layer, wherein the second insulating layer and the second through hole are surrounded to form a cavity, and etching the second insulating layer to form a third through hole which is matched and communicated with the first through hole so as to form a sealing layer;
6) Filling metal into the first through hole and the third through hole to form a conductive structure connected with the bonding pad;
7) A lead-out is formed over the capping layer to connect the conductive structure.
Preferably, the step 1 further comprises:
stacking the front surface of a second device above one of the first devices, wherein the front surface of the second device is provided with a bonding pad;
the plastic packaging layer is also coated around the second device in the step 2;
after the temporary carrier plate is removed in the step 3, exposing the bonding pad of the second device;
and etching the first insulating layer in the step 4 to form a first through hole exposing the bonding pad of the second device.
Preferably, the second device comprises a power amplifier, a switching device and/or a passive device.
Preferably, the further first devices comprise power amplifiers, switching devices and/or passive devices.
Preferably, the first insulating layer and the second insulating layer both use photosensitive organic dry films, and the step of manufacturing the barrier layer in step 5 is as follows:
attaching the first insulating layer to the front surfaces of the first device and the plastic packaging layer, and forming the first through hole and the second through hole in the first insulating layer through exposure and development;
the manufacturing steps of the capping layer in the step 6 are as follows:
and adhering the second insulating layer to the barrier layer, and forming the third through hole in the second insulating layer through exposure and development.
Preferably, the step 7 specifically includes:
forming a dielectric layer on the capping layer, coating a photoresist on the dielectric layer, exposing and developing the photoresist, and etching the dielectric layer to form a wiring pattern;
filling metal in the wiring pattern through an electroplating process to form a metal wiring layer connected with the conductive structure, wherein the metal wiring layer and the dielectric layer form a redistribution layer;
and manufacturing a UBM layer and a welding block above the UBM layer on the redistribution layer.
Preferably, the redistribution layer is a multilayer.
Preferably, the step 7 further comprises the following steps:
and cutting the structure obtained in the step 7 to obtain a packaging body structure containing at least one surface acoustic wave filter and at least one other first device.
The utility model provides a wafer level device packaging structure, includes the first device of a plurality of, encloses barrier layer, capping layer, plastic envelope layer and extraction portion, first device includes surface acoustic wave filter, wherein surface acoustic wave filter's front is equipped with the functional area and is located the pad in the functional area outside, and the front of other first devices is equipped with the pad, the cladding of plastic envelope layer the first device of a plurality of, and make the front of plastic envelope layer with the front parallel and level of first device, enclose the barrier layer and locate plastic envelope layer with the front of first device, and have and expose the first through-hole of pad and expose the second through-hole of functional area, capping layer locates on enclosing the barrier layer, and have with the communicating third through-hole of first through-hole cooperation, capping layer with the second through-hole encloses and closes the formation cavity, pack metal in first through-hole and the third through-hole constitute with the electrically conductive structure that the pad meets, extraction portion locates on the encapsulation, and with electrically conductive structure connects.
Preferably, the device further comprises a second device stacked above one of the first devices, the plastic package layer further wraps around the second device, a bonding pad is arranged on the front surface of the second device, and the bonding pad of the second device is exposed from the front surface of the plastic package layer and is connected with the conductive structure.
Preferably, the second device comprises a power amplifier, a switching device and/or a passive device.
Preferably, the further first devices comprise power amplifiers, switching devices and/or passive devices.
Preferably, the barrier layer and the capping layer both adopt photosensitive organic dry films.
Preferably, the leading-out part comprises a redistribution layer, an UBM layer and a solder bump, the redistribution layer comprises a metal wiring layer connected with the conductive structure and a dielectric layer around the metal wiring layer, the UBM layer is arranged on the redistribution layer and connected with the metal wiring layer, and the solder bump is arranged on the UBM layer.
A packaging body structure is obtained by cutting the wafer-level device packaging structures, and each packaging body structure comprises at least one surface acoustic wave filter and at least one other first device.
Compared with the prior art, the invention has the beneficial effects that:
(1) The invention can directly carry out integrated packaging on the bare chip of the surface acoustic wave filter and other first devices at the same time, improves the packaging efficiency and realizes high integration, light weight and thinness of the radio frequency module.
(2) The second device and the first device can be arranged in an overlapping mode, and the bonding pad of the second device extends to the barrier layer and is connected with the conductive structure, so that more devices can be integrated in a limited packaging area, and the utilization rate of a packaging space is effectively improved.
Drawings
Fig. 1-12 are schematic flow charts illustrating a method for fabricating a wafer level device package structure according to a first embodiment of the present disclosure;
fig. 13 is a schematic view illustrating a wafer level device package structure according to a second embodiment of the present application;
reference numerals: 1. a temporary carrier plate; 11. an adhesive layer; 2. a barrier layer; 21. a conductive structure; 23. a first through hole; 24. a second through hole; 25. a first insulating layer; 3. a capping layer; 31. a third through hole; 32. a second insulating layer; 41. a metal wiring layer; 42. a dielectric layer; 43. a UBM layer; 44. welding blocks; 5. a surface acoustic wave filter; 51. a bonding pad; 52. a cavity; 53. a functional region; 6. a power amplifier; 7. a switching device; 8. a passive device; 9. and (7) plastic packaging layer.
Detailed Description
The invention is further explained below with reference to the figures and the specific embodiments. The drawings are merely schematic representations, the specific proportions of which may be adjusted in accordance with design requirements, for a better understanding of the present invention. The definitions of the top and bottom relationships of the relative elements and the front and back sides of the figures described herein are understood by those skilled in the art to refer to the relative positions of the components and thus all of the components may be flipped to present the same components and still fall within the scope of the present disclosure.
Example one
Referring to fig. 1 to 12, an embodiment of the present application provides a method for manufacturing a wafer level device package structure, including the following steps:
(1) Referring to fig. 1, a temporary carrier 1 is provided, and an adhesive layer 11 is formed on a surface of the temporary carrier 1.
(2) Referring to fig. 2, a plurality of first devices are provided, the first devices including a surface acoustic wave filter 5, wherein a front surface of the surface acoustic wave filter 5 is provided with a functional region 53 and pads 51 located outside the functional region 53, IDT electrodes and reflectors are provided on the functional region 53, front surfaces of other first devices are provided with the pads 51, and the other first devices include a power amplifier 6, a switching device 7 and/or a passive device 8, the first devices are placed on a temporary carrier 1 at preset positions and fixed on the temporary carrier 1 through an adhesive layer 11. Specifically, the front surface of the first device is directed toward the temporary carrier board 1 and fixed to the adhesive layer 11 with the IDT electrodes, reflectors and pads 51 thereof being sunk into the adhesive layer 11.
(3) Referring to fig. 3, a plurality of first devices are plastic-encapsulated on the temporary carrier 1 to form a plastic-encapsulated layer 9, so that the plastic-encapsulated layer 9 covers the back and the side of the first devices.
(4) Referring to fig. 4 and 5, the temporary carrier board 1 and the adhesive layer 11 are removed to expose the front surface of the first device and the front surface of the molding layer 9, and the front surface of the molding layer 9 is flush with the front surface of the first device. Specifically, the adhesive layer 11 is peeled off, the temporary carrier board 1 is separated from the first device and the plastic package layer 9, and the front surfaces of the first device and the plastic package layer 9 are cleaned, so that the pad 51 and the functional region 53 of the first device are exposed.
(5) Referring to fig. 6 and 7, a first insulating layer 25 is formed on the front surface of the first device and molding layer 9, the first insulating layer 25 is etched to form a first through hole 23 exposing the bonding pad 51 and a second through hole 24 exposing the functional region 53, and the etched first insulating layer 25 is used as the barrier layer 2. Specifically, the first insulating layer 25 is a photosensitive organic dry film, the first insulating layer 25 is attached to the front surfaces of the first device and the molding layer 9, and the first insulating layer 25 above the bonding pad 51 and the functional region 53 is removed through exposure and development to form the first through hole 23 and the second through hole 24.
(6) Referring to fig. 8 and 9, a second insulating layer 32 is formed over the barrier layer 2, the second insulating layer 32 and the second through hole 24 enclose a cavity 52, the second insulating layer 32 is etched to form a third through hole 31 in communication with the first through hole 23, and the etched second insulating layer 32 serves as a capping layer 3. Specifically, the second insulating layer 32 may also be a photosensitive organic dry film, the second insulating layer 32 is attached above the barrier layer 2, and the second insulating layer 32 above the first through hole 23 is removed by exposure and development to form a third through hole 31, and a cavity 52 is formed above the functional region 53 of the surface acoustic wave filter 5.
(7) Referring to fig. 10, a conductive structure 21 is formed by filling metal in the first via hole 23 and the second via hole 24 by electroplating. The conductive structure 21 may be made of conductive material such as aluminum or copper, and is connected to the pad 51 of the first device, so that the surface acoustic wave filter 5 and other first devices can be packaged at the same time.
(8) Referring to fig. 11 and 12, a lead-out portion is formed above the capping layer 3 to connect the conductive structure 21, and electrical connection with the outside may be achieved through the lead-out portion. In one embodiment, the lead-out portion includes a redistribution layer, a UBM layer 43 and a solder bump 44, the redistribution layer includes a metal wiring layer 41 and a dielectric layer 42, the metal wiring layer 41 is connected to the conductive structure 21, the dielectric layer 42 is disposed around the metal wiring layer 41, and the redistribution layer may be multi-layered according to the line arrangement requirement. Specifically, a dielectric layer 42 is formed on the capping layer 3, a photoresist is coated on the dielectric layer 42, the photoresist is exposed and developed, and the dielectric layer 42 is etched to form a wiring pattern; filling metal into the wiring pattern by an electroplating process to form a metal wiring layer 41; a UBM layer 43 connected to the metal wiring layer 41 and a solder bump 44 thereon are formed on the redistribution layer, and in a preferred embodiment, the solder bump 44 is a solder ball.
(9) And cutting the structure obtained in the step 8 to obtain a packaging body structure containing at least one surface acoustic wave filter 5 and at least one other first device.
Correspondingly, referring to fig. 12, an embodiment of the present application provides a wafer level device package structure, including a plurality of first devices, a surrounding barrier layer 2, a capping layer 3, a plastic package layer 9, and a lead-out portion, where the first devices include a surface acoustic wave filter 5, a functional region 53 and a pad 51 located outside the functional region 53 are disposed on a front surface of the surface acoustic wave filter 5, and pads 51 are disposed on front surfaces of other first devices, and specifically, the other first devices include a power amplifier 6, a switching device 7, and/or a passive device 8. The plastic package layer 9 covers the plurality of first devices, and the front surface of the plastic package layer 9 is flush with the front surfaces of the first devices. The barrier layer 2 is arranged on the front surface of the first device and the plastic packaging layer 9, and the barrier layer 2 is provided with a first through hole 23 exposing the bonding pad 51 and a second through hole 24 exposing the functional area 53. The sealing layer 3 covers the upper part of the barrier layer 2, the sealing layer 3 is provided with a third through hole 31 which is matched and communicated with the first through hole 23, and the second insulating layer 32 and the second through hole 24 enclose to form a cavity 52. The first via 23 and the third via 31 are filled with metal to form the conductive structure 21. In a preferred embodiment, the third through hole 31 corresponds to the first through hole 23, and the size of the third through hole 31 is greater than or equal to the size of the first through hole 23. The surrounding barrier layer 2 and the capping layer 3 are both photosensitive organic dry films, so the photosensitive organic dry films above the bonding pad 51 and the functional area 53 can be removed by adopting the processes of exposure, development and the like to form the first through hole 23 and the second through hole 24, the photosensitive organic dry films above the first through hole 23 are removed by adopting the processes of exposure, development and the like to form the third through hole 31, and the photosensitive organic dry films covering the second through hole 24 are reserved to form the cavity 52 above the functional area 53. The first through hole 23 and the third through hole 31 above the bonding pad 51 are filled with metal to form the conductive structure 21, so that the wafer level device packaging structure can integrate the surface acoustic wave filter 5 with other first devices, and high integration is realized.
In a specific embodiment, a lead-out portion is provided on the capping layer 3, through which an electrical connection with the outside is made. Specifically, the lead-out portion includes a redistribution layer including a metal wiring layer 41 connected to the conductive structure 21 and a dielectric layer 42 around the metal wiring layer, a UBM layer 43 disposed on the redistribution layer and connected to the metal wiring layer 41, and a solder bump 44 disposed on the UBM layer 43, wherein the solder bump 44 is a solder ball in a preferred embodiment. The redistribution layer enables the re-layout of the terminals of the conductive structures 21 for electrical extension and interconnection.
The embodiment of the present application further provides a package structure obtained by cutting the above wafer level device package structure, where each package structure includes at least one saw filter 5 and at least one other first device. The packaging body structure can be welded on a PCB.
Example two
Referring to fig. 13, the steps of the method for manufacturing the wafer level device package structure according to the second embodiment of the present application are different from those of the first embodiment. Wherein, step 1 of the second embodiment of the present application further includes:
providing a second device, wherein the front surface of the second device is provided with a bonding pad 51, the front surface of the second device faces the temporary carrier plate 1 and is stacked above one of the first devices, and the bonding pad 51 of the second device is fixed on the temporary carrier plate 1 through an adhesive layer.
In the subsequent step, the plastic package layer 9 is also coated around the second device in the step 3; after the temporary carrier plate 1 and the adhesive layer 11 are removed in the step 4, the bonding pad 51 of the second device is exposed; etching the first insulating layer 25 in step 5 also forms the first via 23 exposing the pad 51 of the second device, and the rest of the steps are the same as in the first embodiment. When the first device and the second device are in a stacked state, the bonding pad 51 of the second device can be connected with the conductive structure 21 and can be electrically connected with the outside through the lead-out part, so that more devices can be integrated under the limited packaging area, and the integration density of the package is effectively improved.
Correspondingly, the wafer-level device packaging structure according to the second embodiment of the present application further includes a second device stacked above one of the first devices, the second device includes a power amplifier 6, a switching device 7 and/or a passive device 8, a bonding pad 51 is disposed on a front surface of the second device, the plastic package layer 9 further wraps around the second device, and the bonding pad 51 of the second device is exposed from the front surface of the plastic package layer 9 and is connected to the conductive structure 21. Specifically, the first insulating layer 25 further has a first through hole 23 exposing the pad 51 of the second device, and a third through hole 31 matching and communicating with the first through hole 23 on the second insulating layer 32, and the conductive structure 21 is formed by filling metal in the first through hole 23 and the third through hole 31, so that the pad 51 of the second device can be connected to the conductive structure 21 in the barrier layer 2. The rest is the same as the first embodiment.
In the present embodiment, the second device is a switching device 7, one of the first devices is a power amplifier 6 as an example, and the switching device 7 is stacked on the power amplifier 6. Because the first device and the second device can be stacked up and down, the packaging area can be reduced, and the device is further highly integrated.
The above embodiments are only used to further illustrate the technical solutions of the present invention, but the present invention is not limited to the embodiments, and any simple modification, equivalent change and modification made to the above embodiments according to the technical spirit of the present invention fall within the protection scope of the technical solutions of the present invention.
Claims (15)
1. A manufacturing method of a wafer level device packaging structure is characterized by comprising the following steps: the method comprises the following steps:
1) Forming a bonding layer on the surface of the temporary carrier plate; bonding the front surfaces of a plurality of first devices on the temporary carrier plate through the bonding layers, wherein the first devices comprise surface acoustic wave filters, the front surfaces of the surface acoustic wave filters are provided with functional areas and bonding pads positioned on the outer sides of the functional areas, and the front surfaces of other first devices are provided with bonding pads;
2) Forming a plastic packaging layer for coating the plurality of first devices;
3) Removing the temporary carrier plate and the bonding layer to expose the front surface of the first device and the front surface of the plastic packaging layer, wherein the front surface of the plastic packaging layer is flush with the front surface of the first device;
4) Forming a first insulating layer on the front surfaces of the first device and the plastic packaging layer, and etching the first insulating layer to form a first through hole exposing the bonding pad and a second through hole exposing the functional region so as to form an enclosure layer;
5) Forming a second insulating layer above the blocking layer, wherein the second insulating layer and the second through hole are surrounded to form a cavity, and etching the second insulating layer to form a third through hole which is matched and communicated with the first through hole so as to form a sealing layer;
6) Filling metal into the first through hole and the third through hole to form a conductive structure connected with the bonding pad;
7) Forming a lead-out over the capping layer to connect the conductive structure.
2. The method of claim 1, wherein: the step 1 further comprises:
stacking the front surface of a second device above one of the first devices, wherein the front surface of the second device is provided with a bonding pad;
the plastic packaging layer is also coated around the second device in the step 2;
after the temporary carrier plate is removed in the step 3, exposing the bonding pad of the second device;
and 4, etching the first insulating layer in the step 4 to form a first through hole exposing the bonding pad of the second device.
3. The method of claim 2, wherein: the second device includes a power amplifier, a switching device, and/or a passive device.
4. The method for fabricating the wafer level device package structure according to any one of claims 1-3, wherein: the other first devices include power amplifiers, switching devices and/or passive devices.
5. The method for manufacturing the wafer-level device package structure according to any one of claims 1 to 3, wherein: the first insulating layer and the second insulating layer both adopt photosensitive organic dry films, and the manufacturing steps of the barrier layer in the step 5 are as follows:
attaching the first insulating layer to the front surfaces of the first device and the plastic packaging layer, and forming the first through hole and the second through hole in the first insulating layer through exposure and development;
the manufacturing steps of the capping layer in the step 6 are as follows:
and adhering the second insulating layer to the barrier layer, and forming the third through hole in the second insulating layer through exposure and development.
6. The method for manufacturing the wafer-level device package structure according to any one of claims 1 to 3, wherein: the step 7 specifically includes:
forming a dielectric layer on the capping layer, coating a photoresist on the dielectric layer, exposing and developing the photoresist, and etching the dielectric layer to form a wiring pattern;
filling the wiring pattern with metal through an electroplating process to form a metal wiring layer connected with the conductive structure, wherein the metal wiring layer and the dielectric layer form a rewiring layer;
and manufacturing a UBM layer and a welding block above the UBM layer on the redistribution layer.
7. The method of claim 6, wherein: the redistribution layer is multi-layered.
8. The method for fabricating the wafer level device package structure according to any one of claims 1-3, wherein: the step 7 further comprises the following steps:
and cutting the structure obtained in the step 7 to obtain a packaging body structure containing at least one surface acoustic wave filter and at least one other first device.
9. A wafer level device packaging structure is characterized in that: including the first device of a plurality of, enclose barrier layer, capping layer, plastic-sealed layer and extraction portion, first device includes surface acoustic wave filter, wherein surface acoustic wave filter's front is equipped with the functional area and is located the pad in the functional area outside, and the front of other first devices is equipped with the pad, the cladding of plastic-sealed layer the first device of a plurality of, and make the front of plastic-sealed layer with the front parallel and level of first device, it locates to enclose the barrier layer mould the layer with the front of first device, and have and expose the first through-hole of pad and expose the second through-hole of functional area, the capping layer is located enclose on the barrier layer, and have with the communicating third through-hole of first through-hole cooperation, the capping layer with the second through-hole encloses and closes the vacuole formation, fill in first through-hole and the third through-hole metal constitute with the conducting structure of pad, extraction portion locates on the capping layer, and with conducting structure connects.
10. The wafer level device package structure of claim 9, wherein: still including stacking in one of them the second device of first device top, the plastic envelope layer is still cladding around the second device, the front of second device is equipped with the pad, the pad of second device is followed the front of plastic envelope layer is bare and is exposed, and with conducting structure meets.
11. The wafer-level device package structure of claim 10, wherein: the second device includes a power amplifier, a switching device, and/or a passive device.
12. The wafer level device package structure of any one of claims 9-11, wherein: the other first devices include power amplifiers, switching devices and/or passive devices.
13. The wafer level device package structure of any one of claims 9-11, wherein: the barrier layer and the cover layer both adopt photosensitive organic dry films.
14. The wafer level device package structure of any one of claims 9-11, wherein: the leading-out part comprises a redistribution layer, an UBM layer and a welding block, the redistribution layer comprises a metal wiring layer connected with the conductive structure and a dielectric layer around the metal wiring layer, the UBM layer is arranged on the redistribution layer and connected with the metal wiring layer, and the welding block is arranged on the UBM layer.
15. A package structure, comprising: the package structures are obtained by dicing the wafer level device package structures of any one of claims 9-14, each of the package structures containing at least one SAW filter and at least one other first device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211693657.1A CN115954280A (en) | 2022-12-28 | 2022-12-28 | Wafer-level device packaging structure, manufacturing method and packaging body structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211693657.1A CN115954280A (en) | 2022-12-28 | 2022-12-28 | Wafer-level device packaging structure, manufacturing method and packaging body structure |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN115954280A true CN115954280A (en) | 2023-04-11 |
Family
ID=87281992
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202211693657.1A Pending CN115954280A (en) | 2022-12-28 | 2022-12-28 | Wafer-level device packaging structure, manufacturing method and packaging body structure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN115954280A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117118384A (en) * | 2023-10-23 | 2023-11-24 | 北京超材信息科技有限公司 | Acoustic wave element, acoustic wave filter and radio frequency module |
-
2022
- 2022-12-28 CN CN202211693657.1A patent/CN115954280A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117118384A (en) * | 2023-10-23 | 2023-11-24 | 北京超材信息科技有限公司 | Acoustic wave element, acoustic wave filter and radio frequency module |
| CN117118384B (en) * | 2023-10-23 | 2024-03-22 | 北京超材信息科技有限公司 | Acoustic wave element, acoustic wave filter and radio frequency module |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR101377176B1 (en) | Panel based lead frame packaging method and device | |
| US6137162A (en) | Chip stack package | |
| CN113793846A (en) | Filter wafer-level packaging structure integrated with passive device and method thereof | |
| WO2024036715A1 (en) | Radio frequency front-end module, manufacturing method therefor, and communication apparatus | |
| CN114823651B (en) | Radio frequency system module packaging structure with filter and method | |
| CN115954280A (en) | Wafer-level device packaging structure, manufacturing method and packaging body structure | |
| CN113675101B (en) | Method for chip packaging and chip particles | |
| US20040124516A1 (en) | Circuit device, circuit module, and method for manufacturing circuit device | |
| CN215988755U (en) | Filter wafer-level packaging structure integrated with passive device | |
| CN106898625A (en) | The encapsulating structure and method for packing of image sensor chip | |
| CN114566487A (en) | Package structure and method for manufacturing the same | |
| CN219534469U (en) | Wafer level device packaging structure and packaging body structure | |
| CN114698259B (en) | Package structure of radio frequency front end module board level system and package method thereof | |
| KR100752665B1 (en) | Semiconductor device using a conductive adhesive and method of fabricating the same | |
| CN211045375U (en) | Wafer level chip packaging structure | |
| CN210692485U (en) | Antenna packaging structure | |
| CN209804636U (en) | Semiconductor packaging structure | |
| CN114826190B (en) | Acoustic surface filter packaging method, acoustic surface filter and communication equipment | |
| CN219435851U (en) | Three-dimensional interconnection fan-out integrated packaging structure | |
| CN110739292A (en) | 3D packaging structure and manufacturing method thereof | |
| CN112582287A (en) | Wafer-level chip packaging structure and packaging method | |
| CN216120296U (en) | Fan-out type packaging structure and radio frequency module | |
| CN219435852U (en) | Three-dimensional interconnection fan-out packaging structure of integrated antenna | |
| CN220585231U (en) | Packaging structure | |
| US11682648B2 (en) | Semiconductor device and method of fabricating the same |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |