CN107797892A - A kind of memory SPD adjustment method - Google Patents
A kind of memory SPD adjustment method Download PDFInfo
- Publication number
- CN107797892A CN107797892A CN201711215906.5A CN201711215906A CN107797892A CN 107797892 A CN107797892 A CN 107797892A CN 201711215906 A CN201711215906 A CN 201711215906A CN 107797892 A CN107797892 A CN 107797892A
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- Prior art keywords
- spd
- bmc
- memory
- module
- eeprom
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
- G06F11/2221—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test input/output devices or peripheral units
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/26—Functional testing
- G06F11/263—Generation of test inputs, e.g. test vectors, patterns or sequences ; with adaptation of the tested hardware for testability with external testers
- G06F11/2635—Generation of test inputs, e.g. test vectors, patterns or sequences ; with adaptation of the tested hardware for testability with external testers using a storage for the test inputs, e.g. test ROM, script files
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Program control for peripheral devices
- G06F13/102—Program control for peripheral devices where the programme performs an interfacing function, e.g. device driver
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
Abstract
The invention discloses a kind of memory SPD adjustment method, its implementation process is：SPD is stored on debugging main frame with document form first；Then BMC web management interface is logged in, SPD firmwares are selected, into the more new stage；Debugging main frame is in off-mode, and use Standby power voltage supplies, EEPROM is accessed by BMC, firmware is written to EEPROM；Mainboard is started shooting, and decides whether the configuration of further adjustment memory SPD according to the startup of system and running situation.A kind of memory SPD adjustment method of the present invention compared with prior art, using BMC outband management function, memory SPD is debugged by carrying out on line refreshable operation to SPD firmwares, it is easy and effective, cost can greatly be saved, it is practical, it is applied widely, it is easy to spread.
Description
Technical field
The present invention relates to computer server technical field, specifically a kind of memory SPD adjustment method.
Background technology
A BMC (Baseboard Management Controller) is often placed on server master board, BMC is provided
The interfaces such as I2C access external devices, can be not keyed up by BMC management network in main frame, business network inaccessible when carry out
Server outband management.
For reinforcement type server, internal memory is often by the way of Surface Mount memory grain, to improve stability and reliability.
Because Surface Mount memory grain is different from the memory bar of the standardization of memory bar manufacturer production, server production firm is needed in
SPD (Serial Presence Detect) configuration parameter of parameter configuration specification and the PCB characteristic design specializeds of mainboard is deposited, it is no
Then because memory parameters setting is unreasonable mainboard may be caused not start, may need that internal memory is varied multiple times in this course
SPD configuration parameters can just make internal memory reach the working condition of reliable and stable operation.Therefore, for this need that SPD is varied multiple times
The situation of firmware, using burning SPD firmwares to EEPROM so that test the whether feasible method of SPD configuration parameters have it is very big not
Just.It is a technical issues that need to address that debugging how is simply and effectively carried out to memory SPD firmware.
The content of the invention
The technical assignment of the present invention is to be directed to above weak point, there is provided a kind of memory SPD adjustment method.
A kind of memory SPD adjustment method, its implementation process are：
First, SPD is stored on debugging main frame with document form first；
Two then log in BMC web management interface, select SPD firmwares, into the more new stage；
3rd, debugging main frame is in off-mode, and use Standby power voltage supplies, EEPROM is accessed by BMC, firmware is write
Enter to EEPROM；
4th, mainboard is started shooting, and decides whether the configuration of further adjustment memory SPD according to the startup of system and running situation.
It is described debugging main frame refer to reinforcement type server, be configured with the server mainboard, DDR4 Surface Mounts internal memory,
CPLD, EEPROM, a BMC being placed on mainboard, BMC has the management network independently of debugging main frame and provides out-of-band access,
Web client with web management interface, Web client connection BMC are provided in main frame is debugged.
Web server, power management module, power supply and channel switching module are configured with the BMC, firmware refreshes mould
The web interface module to be communicated with Web page, file upload function module are configured with block, wherein Web server；Power management
Module connects above-mentioned web interface module and the CPLD independently of BMC；Power supply connects above-mentioned web interface mould with channel switching module
Block and the switching circuit independently of BMC, the switching circuit are used to switch Always voltages and Standby voltages；Firmware refreshes
Module receives the SPD firmwares that file upload function module is sent and dumped in EEPROM.
The BMC is write firmware in EEPROM by I2C buses, i.e., passes through between firmware refresh module and EEPROM
I2C buses connect.
In the step 1, first according to memory parameters configuration specification and the memory SPD of mainboard PCB characteristic designs,
Then it is stored in the debugging main frame for logging in BMC administration interfaces in the form of a file again.
BMC administration interface processes are logged in the step 2 is：Electricity on main frame is debugged first, and system to be managed is completed to start
Manage network and BMC web management interface is logged in after can use, in the web management interface, select in step 1 with document form
The memory SPD firmware of storage, send renewal SPD firmwares and enter the order of firmware more new stage.
It is using the process of Standby power voltage supplies in the step 3：
BMC web interface module calls power management module to obtain main-board on-off state, if mainboard is in open state
Prompting user shuts down computer, and BMC web interface module calls power management module to send shutdown life after obtaining user and agreeing to
Order；
BMC web interface module calls power supply and channel switching module performs the power supply supply of eeprom chip and I2C channels are cut
Move work, the system electricity under default situations is changed to the Standby voltages that BMC is used, and accessing EEPROM by CPU is changed to by BMC
Access EEPROM.
Firmware is written to EEPROM and refers to that the file upload function module of BMC Web server uploads SPD firmwares, and
It is stored under a certain assigned catalogue, SPD firmwares is then refreshed to EEPROM by BMC firmware refresh module again.
After SPD firmwares update, it is also necessary to which the step of carrying out state recovery, i.e. power supply and channel are cut in power supply and channel
Change the mold and be switched to acquiescence connected mode under the control of block, system electricity is changed to Always voltages.
In step 4, after SPD firmwares update, BMC web interface module calls power management module to be sent out to mainboard
Send power-on command；According to internal memory initialization during the startup shown in system serial ports and the type information of training, whether can enter
System, the running situation into system after system decide whether that changing SPD configures, and SPD has been debugged if design requirement is reached
Into return to step one repeats if not up to design requirement, until reaching design requirement.
Compared to the prior art a kind of memory SPD adjustment method of the present invention, has the advantages that：
A kind of memory SPD adjustment method of the present invention, the file upload function provided by BMC Web server, which uploads, to be waited to adjust
The SPD firmwares of examination are to BMC, and BMC is write firmware in EEPROM by I2C buses, to improve memory SPD debugging efficiency；Use BMC
Outband management function, by SPD firmwares carry out on line refreshable operation debugging memory SPD, it is easy and effective, can greatly save
Cost-saving, it is practical, it is applied widely, it is easy to spread.
Brief description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing
There is the required accompanying drawing used in technology description to be briefly described, it should be apparent that, drawings in the following description are only this
The embodiment of invention, for those of ordinary skill in the art, on the premise of not paying creative work, can also basis
The accompanying drawing of offer obtains other accompanying drawings.
Accompanying drawing 1 be the present invention realize schematic diagram.
Embodiment
In order that those skilled in the art more fully understand the solution of the present invention, with reference to embodiment to this
Invention is described in further detail.Obviously, described embodiment is only part of the embodiment of the present invention, rather than all
Embodiment.Based on the embodiment in the present invention, those of ordinary skill in the art institute under the premise of creative work is not made
The every other embodiment obtained, belongs to the scope of protection of the invention.
As shown in Figure 1, a kind of memory SPD adjustment method, the file upload function provided by BMC Web server
Upload SPD firmwares to be debugged to be write firmware in EEPROM by I2C buses to BMC, BMC, to improve memory SPD debugging effect
Rate.
Its implementation process is：
First, SPD is stored on debugging main frame with document form first；
Two then log in BMC web management interface, select SPD firmwares, into the more new stage；
3rd, debugging main frame is in off-mode, and use Standby power voltage supplies, EEPROM is accessed by BMC, firmware is write
Enter to EEPROM；
4th, mainboard is started shooting, and decides whether the configuration of further adjustment memory SPD according to the startup of system and running situation.
In above-mentioned steps, BMC web management interface is logged in, SPD firmware of the selection by design, renewal SPD is clicked on and consolidates
Part button enters the firmware more new stage, by possible shutdown, file upload, power supply and channel switching and firmware refresh operation
Firmware is written to EEPROM, power supply and channel can be under the controls of power supply and channel switching module after SPD firmwares update
Acquiescence connected mode is switched to, mainboard start, is decided whether further to adjust memory SPD according to the startup of system and running situation
Configuration.
It is described debugging main frame refer to reinforcement type server, be configured with the server mainboard, DDR4 Surface Mounts internal memory,
CPLD, EEPROM, a BMC being placed on mainboard, BMC has the management network independently of debugging main frame and provides out-of-band access,
Web client with web management interface, Web client connection BMC are provided in main frame is debugged.
Web server, power management module, power supply and channel switching module are configured with the BMC, firmware refreshes mould
The web interface module to be communicated with Web page, file upload function module are configured with block, wherein Web server；Power management
Module connects above-mentioned web interface module and the CPLD independently of BMC；Power supply connects above-mentioned web interface mould with channel switching module
Block and the switching circuit independently of BMC, the switching circuit are used to switch Always voltages and Standby voltages；Firmware refreshes
Module receives the SPD firmwares that file upload function module is sent and dumped in EEPROM.
Further, the realization of the inventive method comprises the following steps：
(1) according to memory parameters configuration specification and the memory SPD of mainboard PCB characteristic designs, it is stored in the form of a file
For logging in the debugging main frame of BMC administration interfaces；
(2) electric on server, system to be managed is completed to start the web management interface for logging in BMC after management network can use；
(3) in the above-mentioned memory SPD firmware stored with document form of BMC memory SPDs firmware renewal page selection, renewal is clicked on
SPD firmwares button enters the firmware more new stage；
(4) BMC web interface module calls power management module to obtain main-board on-off state, if mainboard is in start shape
State then prompts user to shut down computer, and BMC web interface module is called power management module to send and closed after obtaining user and agreeing to
Machine order；
(5) BMC web interface module calls power supply and channel switching module to perform power supply supply and the I2C letters of eeprom chip
Road switching action, the system electricity under default situations is changed to the Standby electricity that BMC uses, by CPU access EEPROM be changed to by
BMC accesses EEPROM；
(6) the file upload function module of BMC Web server uploads SPD firmwares, storage to/dev/shm carries /mnt mesh
Under record；
(7) BMC firmware refresh module refreshes SPD firmwares to EEPROM；
(8) power supply and channel are switched to acquiescence connection under the control of power supply and channel switching module after the renewal of SPD firmwares
Mode；
(9) BMC web interface module calls power management module to send power-on command to mainboard；
(10) according to the type information of internal memory initialization during the startup shown in system serial ports and training and whether can be into being
Unite and decide whether to change SPD configurations into the running situation of system after system, SPD has been debugged if design requirement is reached
Into performing step (1) if not up to design requirement until reaching design requirement.
By embodiment above, the those skilled in the art can readily realize the present invention.But should
Work as understanding, the present invention is not limited to above-mentioned embodiment.On the basis of disclosed embodiment, the technical field
Technical staff can be combined different technical characteristics, so as to realize different technical schemes.
It is the known technology of those skilled in the art in addition to the technical characteristic described in specification.
Claims (10)
1. a kind of memory SPD adjustment method, it is characterised in that its implementation process is：
First, SPD is stored on debugging main frame with document form first；
Two then log in BMC web management interface, select SPD firmwares, into the more new stage；
3rd, debugging main frame is in off-mode, and use Standby power voltage supplies, EEPROM is accessed by BMC, firmware is write
Enter to EEPROM；
4th, mainboard is started shooting, and decides whether the configuration of further adjustment memory SPD according to the startup of system and running situation.
2. a kind of memory SPD adjustment method according to claim 1, it is characterised in that the debugging main frame refers to reinforce
Type servers, mainboard, DDR4 Surface Mounts internal memory, CPLD, EEPROM are configured with the server, a BMC is placed on mainboard,
BMC has the management network independently of debugging main frame and provides out-of-band access, is provided in main frame is debugged with web management interface
Web client, Web client connection BMC.
3. a kind of memory SPD adjustment method according to claim 2, it is characterised in that Web clothes are configured with the BMC
It is engaged in device, power management module, power supply and channel switching module, firmware refresh module, is wherein configured with Web server and Web
Web interface module, the file upload function module of page communication；Power management module connects above-mentioned web interface module and independence
In BMC CPLD；Power supply connects above-mentioned web interface module and the switching circuit independently of BMC with channel switching module, described to cut
Circuit is changed to be used to switch Always voltages and Standby voltages；Firmware refresh module receives file upload function module and sent
SPD firmwares and dump in EEPROM.
4. a kind of memory SPD adjustment method according to claim 3, it is characterised in that the BMC will by I2C buses
In firmware write-in EEPROM, i.e., connected between firmware refresh module and EEPROM by I2C buses.
A kind of 5. memory SPD adjustment method according to claim 3, it is characterised in that in the step 1, basis first
The memory SPD of memory parameters configuration specification and mainboard PCB characteristic designs, then it is stored in the form of a file again for stepping on
On the debugging main frame for recording BMC administration interfaces.
6. a kind of memory SPD adjustment method according to claim 3, it is characterised in that BMC pipes are logged in the step 2
Managing interface process is：Electricity first on debugging main frame, system to be managed complete the Web for starting management network and BMC being logged in after can use
Administration interface, in the web management interface, the memory SPD firmware stored in step 1 with document form is selected, sends renewal
SPD firmwares and the order for entering the firmware more new stage.
7. a kind of memory SPD adjustment method according to claim 3, it is characterised in that used in the step 3
The process of Standby power voltage supplies is：
BMC web interface module calls power management module to obtain main-board on-off state, if mainboard is in open state
Prompting user shuts down computer, and BMC web interface module calls power management module to send shutdown life after obtaining user and agreeing to
Order；
BMC web interface module calls power supply and channel switching module performs the power supply supply of eeprom chip and I2C channels are cut
Move work, the system electricity under default situations is changed to the Standby voltages that BMC is used, and accessing EEPROM by CPU is changed to by BMC
Access EEPROM.
8. a kind of memory SPD adjustment method according to claim 7, it is characterised in that firmware is written into EEPROM is
The file upload function module for referring to BMC Web server uploads SPD firmwares, and is stored under a certain assigned catalogue, then leads to again
The firmware refresh module for crossing BMC refreshes SPD firmwares to EEPROM.
9. a kind of memory SPD adjustment method according to claim 3, it is characterised in that after SPD firmwares update, also
The step of needing carry out state recovery, i.e. power supply and channel, are switched to acquiescence connection under the control of power supply and channel switching module
Mode, system electricity is changed to Always voltages.
10. a kind of memory SPD adjustment method according to claim 3, it is characterised in that in step 4, SPD firmwares are more
After new, BMC web interface module calls power management module to send power-on command to mainboard；Show according in system serial ports
During the startup shown internal memory initialization and training type information, whether can enter system, the operation feelings into system after system
Condition decides whether that changing SPD configures, and SPD debugging completion, is returned if not up to design requirement if design requirement is reached
Step 1 repeats, until reaching design requirement.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711215906.5A CN107797892B (en) | 2017-11-28 | 2017-11-28 | A kind of memory SPD adjustment method |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711215906.5A CN107797892B (en) | 2017-11-28 | 2017-11-28 | A kind of memory SPD adjustment method |
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| CN107797892A true CN107797892A (en) | 2018-03-13 |
| CN107797892B CN107797892B (en) | 2019-11-15 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108763138A (en) * | 2018-04-03 | 2018-11-06 | 郑州云海信息技术有限公司 | A kind of method and system accessing multisystem by single serial ports |
| CN110045967A (en) * | 2019-04-03 | 2019-07-23 | 中电科技（北京）有限公司 | The serial ports graphical interfaces exchange method and device of firmware layer |
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| CN110045967A (en) * | 2019-04-03 | 2019-07-23 | 中电科技（北京）有限公司 | The serial ports graphical interfaces exchange method and device of firmware layer |
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| CN107797892B (en) | 2019-11-15 |
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