CN108804249A - Information processing method and electronic equipment - Google Patents
Information processing method and electronic equipment Download PDFInfo
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- CN108804249A CN108804249A CN201810510863.1A CN201810510863A CN108804249A CN 108804249 A CN108804249 A CN 108804249A CN 201810510863 A CN201810510863 A CN 201810510863A CN 108804249 A CN108804249 A CN 108804249A
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- configuration file
- predetermined function
- operating temperature
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0796—Safety measures, i.e. ensuring safe condition in the event of error, e.g. for controlling element
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2289—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing by configuration test
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/3003—Monitoring arrangements specially adapted to the computing system or computing system component being monitored
- G06F11/3037—Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is a memory, e.g. virtual memory, cache
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/3058—Monitoring arrangements for monitoring environmental properties or parameters of the computing system or of the computing system component, e.g. monitoring of power, currents, temperature, humidity, position, vibrations
Abstract
The embodiment of the invention discloses a kind of information processing method and electronic equipments.Described information processing method, including：Detect environment temperature；Detect the operating temperature of programmable array FPGA；According to the environment temperature and the operating temperature, the running parameter of the FPGA is determined；According to the running parameter, the work of the FPGA is controlled.
Description
Technical field
The present invention relates to information technology field more particularly to a kind of information processing methods and electronic equipment.
Background technology
Programmable array (Field Programmable Gate Array, FPGA) usually can be as electronic equipment
OverDrive Processor ODP can be used for assisting the primary processor in electronic equipment (for example, central processing unit center Process
Unit, CPU) carry out various acceleration function processing.But in the prior art, during the use of FPGA there are various problems,
For example, the phenomenon that FPGA is susceptible to overheat when working.If for another example breaking down during FPGA uses, need to open again
Dynamic fpga chip, with the low problem of troubleshooting efficiency.
Invention content
In view of this, an embodiment of the present invention is intended to provide a kind of information processing method and electronic equipment, at least partly solve
The above problem.
The technical proposal of the invention is realized in this way：
In a first aspect, the embodiment of the present invention provides a kind of information processing method, which is characterized in that including：
Detect environment temperature；
Detect the operating temperature of FPGA；
According to the environment temperature and the operating temperature, the running parameter of the FPGA is determined；
According to the running parameter, the work of the FPGA is controlled.
Optionally, described according to the environment temperature and the operating temperature, determine the running parameter of the FPGA, including
At least one of：
According to the environment temperature and the operating temperature, the working frequency of the FPGA is determined；
According to the environment temperature and the operating temperature, the power providing signal of the FPGA is determined.
Optionally, described according to the environment temperature and the operating temperature, it determines the running parameter of the FPGA, wraps
It includes：
According to the environment temperature and the operating temperature, inquires and preset correspondence；
According to inquiry as a result, determining the running parameter of the FPGA.
Optionally, the method further includes：
When the predetermined function failure of the FPGA, the predetermined manager in electronic equipment is read from predetermined memory to be executed
Configuration file needed for the predetermined function, and it is transferred to the FPGA；
The FPGA restarts the predetermined function according to the configuration file read from predetermined memory.
Optionally, the predetermined manager includes at least one of：
Baseboard management controller；
Frame Management Controller.
Second aspect, the embodiment of the present invention provide a kind of information processing method, including：
If when the predetermined function failure of FPGA, the predetermined manager in electronic equipment is read from predetermined memory described in execution
Configuration file needed for predetermined function；
The configuration file is sent to FPGA；
The FPGA restarts the predetermined function according to the configuration file of reception.
Optionally, if when the predetermined function failure of the FPGA, predetermined manager in electronic equipment is from predetermined memory
The configuration file executed needed for the predetermined function is read, including：
If when the predetermined function failure of the FPGA, baseboard management controller or frame Management Controller are read from predetermined memory
Take the configuration file of the FPGA of the predetermined function.
Optionally, the predetermined memory is general-purpose storage.
The third aspect, the embodiment of the present invention provide a kind of electronic equipment, including：
First detection module, for detecting environment temperature；
Second detection module, the operating temperature for detecting FPGA；
Determining module, for according to the environment temperature and the operating temperature, determining the running parameter of the FPGA；
Control module, for according to the running parameter, controlling the work of the FPGA.
Fourth aspect, the embodiment of the present invention provide a kind of electronic equipment, including：
Read module, if when predetermined function failure for FPGA, predetermined manager in electronic equipment is from predetermined storage
Device reads the configuration file executed needed for the predetermined function；
Transmission module, for the configuration file to be sent to FPGA；
Restart module, for the FPGA according to the configuration file of reception, restarts the predetermined function.
5th aspect, the embodiment of the present invention provide a kind of electronic equipment, including：
FPGA；
Predetermined memory is stored with the configuration file of the FPGA；
Predetermined manager is connect with the predetermined memory, if be used for the predetermined function failure of FPGA, in electronic equipment
Predetermined manager the configuration file executed needed for the predetermined function is read from predetermined memory；
The FPGA, for after receiving the configuration file, restarting the predetermined function.
On the one hand, technical solution provided in an embodiment of the present invention, while the environment temperature of the places FPGA working environment can be detected
The operating temperature of degree and FPGA itself, the running parameter of FPGA is determined in conjunction with the two, utilizes the running parameter of determining FPGA
The work for controlling FPGA, can be accurately controlled the work shape that FPGA is operated in suitable current environmental temperature and current operating temperature
State, to avoid overheat or be subcooled the phenomenon that, so that it is guaranteed that the working performance of FPGA subtracts so that ensuring the stability of FPGA
Few FPGA's the caused damage because overheat or supercooling work by force, to extend the service life of FPGA.
On the other hand, technical solution provided in an embodiment of the present invention, will be using predetermined manager in electronic equipment from pre-
Determine the configuration file of the predetermined function of memory read failure, and be transferred to FPGA, in this way, in this way, without in electronic equipment
Main process task module is transferred to FPGA to read the configuration file, and FPGA is just not necessarily to specially be set to connecing for main process task module adaptation
Mouthful, and the operations such as clock rate synchronization are carried out with main process task module, to obtain the configuration text for restarting predetermined function with FPGA
The simple feature of part, at the same time, relative to FPGA directly from special private memory acquisition configuration file, the present embodiment
Predetermined memory can be any one memory (for example, general-purpose storage), to which specific memory is relative to general-purpose storage,
The limitation that has materials limited and it is costly the problems such as, therefore the embodiment of the present invention have materials extensively, it is strong with prior art compatibility
And the feature that expense is low.
Description of the drawings
Fig. 1 is the flow diagram of the first information processing method provided in an embodiment of the present invention；
Fig. 2 is the flow diagram of second of information processing method provided in an embodiment of the present invention；
Fig. 3 is the structural schematic diagram of the first electronic equipment provided in an embodiment of the present invention；
Fig. 4 is the structural schematic diagram of second of electronic equipment provided in an embodiment of the present invention；
Fig. 5 A are the structural schematic diagram of the third electronic equipment provided in an embodiment of the present invention；
Fig. 5 B are the structural schematic diagram of the 4th kind of electronic equipment provided in an embodiment of the present invention；
Fig. 6 is the structural schematic diagram of the 5th kind of electronic equipment provided in an embodiment of the present invention；
Fig. 7 is the structural schematic diagram of the 6th kind of electronic equipment provided in an embodiment of the present invention；
Fig. 8 is the connection diagram of the 7th kind of electronic equipment provided in an embodiment of the present invention.
Specific implementation mode
Technical scheme of the present invention is further elaborated below in conjunction with Figure of description and specific embodiment.
As shown in Figure 1, the present embodiment provides a kind of information processing methods, including：
Step S110：Detect environment temperature；
Step S120：Detect the operating temperature of FPGA；
Step S130：According to the environment temperature and the operating temperature, the running parameter of the FPGA is determined；
Step S140：According to the running parameter, the work of the FPGA is controlled.
Information processing method provided in this embodiment can be applied to the method in the controller or control circuit of FPGA.
The environment temperature can be the FPGA where working environment temperature, for example, using be arranged around the FPGA (for example,
In the FPGA pre-determined distances) temperature sensor detect the environment temperature and optionally detect the environment temperature
Temperature sensor is arranged with the intervals FPGA, for example, described be arranged at the back side of the FPGA.The height of environment temperature, or
Person says the temperature difference between environment temperature and the operating temperature of FPGA itself, affects the heat of FPGA generations
The operating temperature of FPGA can be also detected in step S120 in some embodiments, the operating temperature of the FPGA is
The current temperature of itself of the FPGA, for example, the junction temperature of the FPGA, junction temperature herein can be the PN junction of transistor in FPGA
Operating temperature, for example, in FPGA transistor PN junction average operating temperature.Transistor herein can be various types of crystal
Pipe.The problems such as electric current (electron mobility is slack-off), lead to problems such as working performance low.
In further embodiments, the FPGA includes the second circuit other than the first circuit and the first circuit；Described
One circuit can be the core circuit of FPGA, and the second circuit can be to be connected as assisting first circuit with first circuit
The auxiliary circuit of work.In the present embodiment, the operating temperature of the FPGA can be the operating temperature of first circuit.It is described
The operating temperature of first circuit can be：It is determined according to the junction temperature of the PN junction of one or more transistors in first circuit,
For example, in the first circuit the junction temperature of PN junction average value.Due to the core circuit that the first circuit is FPGA, if the work of the first circuit
Make too high or too low for temperature, directly affects the working performance of FPGA, and second circuit may then influence very little, if the first circuit
Operating temperature is located in ideal range, then can ensure the working performance of FPGA.The first electricity can be only monitored in the present embodiment
The operating temperature on road simplifies the detection of the operating temperature of FPGA.
The operating temperatures such as the junction temperature of FPGA can directly influence the working condition and working performance of FPGA, if current operating temperature
It is excessively high may result in the impaired problem of device may if current operating temperature is too low
The running parameters such as the working frequency of FPGA are the critically important factors for the operating temperature for influencing FPGA.Therefore in step
The running parameter of the FPGA can be determined in S130, which institute in combination with environment temperature and operating temperature
The working condition of FPGA is stated, and FPGA is in different working conditions, then heat production situation is different；So by accurately adjusting
The running parameter of FPGA, the problems such as avoiding failure caused by the overheat of FPGA immediately, for example, avoiding leading because operating temperature is excessively high
The problems such as transistor of cause is burnt.It not only can take into account the environment temperature of FPGA in the present embodiment, also while can take into account knot
The operating temperature of the FPGA such as temperature so realizes the complete and accurate detection for the temperature being had an impact to the working performance of FPGA,
To realize FPGA running parameter accurate adjusting so that FPGA work in the ideal range.
Optionally, the step S130 may include at least one of：
According to the environment temperature and the operating temperature, the working frequency of the FPGA is determined；
According to the environment temperature and the operating temperature, the power providing signal of the FPGA is determined.
The working frequency of the FPGA is higher in the present embodiment, then the energy consumption that the FPGA is generated is more, at the same time
The unfavorable moon FPGA's of working environment where the heat of generation is also more, therefore the operating temperature in FPGA is excessively high or FPGA dissipates
When hot, can it is appropriate reduce FPGA working frequency, to reduce the operating temperature of FPGA.For example, by lowering FPGA's
Clock makes the working frequency of the FPGA lower, and can lower FPGA by the adjustment of the work clock of FPGA in a word
Working frequency.
It in some embodiments, can be by adjusting the function signal of FPGA, to control if FPGA is substantially overheated
The working condition of the FPGA, for example, disconnecting the energy supply to the FPGA so that the FPGA is closed, and is realized and is temporarily stopped institute
State the work of FPGA.
In some embodiments, the power providing signal can be the control signal of the power supply of FPGA, by the work(for controlling power supply
Can, the control of size is realized whether the energy supply to FPGA and/or energizes, to realize the adjustment to the working condition of FPGA.
In some embodiments, if being provided with radiator on the FPGA, the running parameter may also include：FPGA's
The radiation parameter of radiator, for example, the parameters such as heat radiation power.For example, being directed to wind-cooling heat dissipating, the rotating speed etc. of fan can be controlled
Realize the radiating control of FPGA.
In further embodiments, the running parameter in step S130 may also include at least one of：
The enabled parameter of function workable for FPGA；
What FPGA was forbidden to use function goes enabled parameter；
FPGA temporarily stops the enabled timing information for the function of using.
The FPGA can complete specific function, for example, the FPGA can assist the main processing mould in electronic equipment
Group, for example, central processing unit or microprocessor execute the acceleration of some specific functions, for example, the FPGA can assist main place
Reason module carries out calculating acceleration, and network interface card is assisted to carry out network acceleration.In the present embodiment, the enabled parameter may include：It is enabled
Function and enable the information such as enable signal of the function；It is described that enabled parameter is gone to may include：It goes enabled function and goes to enable
Function goes the information such as enable signal.The enabled timing information may include：The information such as the beginning and ending time of enabled specific function.
In short, going enabled or temporarily go to enable by certain functions of FPGA, can make the power consumption of FPGA reduce,
And the heat production of FPGA is reduced.
Optionally, the step S130 may include：
The correspondence for inquiring preset environment temperature and the operating temperature determines institute according to the correspondence
State the running parameter of FPGA.
Can be directly in some embodiments inquiry foundation, inquiry environment temperature, work with environment temperature and operating temperature
Make the correspondence of temperature and running parameter three, to obtain the work of FPGA corresponding with environment temperature and operating temperature
Parameter.
In further embodiments, environment temperature and operating temperature are detected according to current period, predicts next week
The operating temperature of the FPGA in phase；It is inquiry foundation with the operating temperature of prediction, inquires pair of operating temperature and running parameter
It should be related to, to obtain the running parameter of FPGA corresponding with the operating temperature of the prediction.According to the running parameter of inquiry, control
The running parameter of FPGA within next period.
In further embodiments, according to environment temperature and operating temperature that current period detects, next period is judged
The operating temperature of interior FPGA and the variation tendency of operating temperature, with the variation tendency of operating temperature and operating temperature be inquiry according to
According to the correspondence of the operating temperature of prediction, the variation tendency of the operating temperature of prediction and running parameter three being inquired, to obtain
Obtain the running parameter of the FPGA in next period.
In the present embodiment, the environment temperature and operating temperature can be current period detection, the work of the FPGA
Make the running parameter that parameter can be next period and prevents FPGA mistakes in advance so by the detection of environment temperature and operating temperature
The phenomenon that heat or supercooling so that FPGA is operated within the scope of ideal temperature, it is ensured that the working performance of FPGA.
Optionally, the method further includes：
When the predetermined function failure of the FPGA, the predetermined manager in electronic equipment is read from predetermined memory to be executed
Configuration file needed for the predetermined function, and it is transferred to the FPGA；
The FPGA restarts the predetermined function according to the configuration file read from predetermined memory.
Multiple functions may be implemented in the FPGA in the present embodiment, and FPGA realizes the configuration file that different function is utilized
And/or operating circuit is different.
In some embodiments, no longer it is that the direct FPGA that closes restarts FPGA again when the predetermined function failure of FPGA,
But the configuration file of the FPGA of the predetermined function is read from predetermined memory area by the predetermined manager of electronic equipment, and be transferred to
FPGA, for example, being transferred to the controller of FPGA, it is only necessary to the predetermined function is restarted, it is entire without closing
FPGA, alternatively, the configuration file of entire FPGA is read from network side, alternatively, handling module by CPU of electronic equipment etc. to read
The configuration file.
Optionally, the predetermined manager includes at least one of：Baseboard management controller；Frame Management Controller.
The predetermined manager described in the present embodiment can be the baseboard management controller (Board Management
Controller, BMC) or frame Management Controller (Rack Management Controller, RMC) read from predetermined memory
Take the configuration file.The configuration file that FPGA is reacquired in the present embodiment is sent by the predetermined manager such as BMC or RMC
To FPGA, not FPGA is directly read from predetermined memory, in this way, predetermined memory can be general-purpose storage, and nothing
Need to be the specific memory that FPGA can be supported to read, to reduce the hardware cost of electronic equipment.What is more important：Such as
This, FPGA is upper without special interface is arranged, and connection is stored with the dedicated memory of the configuration file of FPGA, is existed by FPGA
Reading configuration file is gone by the interface when predetermined function failure, it is compatible with the prior art to simplify being related to for FPGA
Property is strong.
In embodiments of the present invention, the predetermined manager can be connect by bus interface with the FPGA, for example, in advance
Determine primary processor in manager and electronic equipment etc. to connect with the FPGA by bus interface, in this way, predetermined manager
After the configuration file in reading predetermined register, the configuration text can be written to the FPGA by bus interface
Part.For example, the configuration file reloaded is written into the FPGA by IC bus.In the present embodiment, described
Predetermined manager is the main process task module for being different from the electronic equipments such as central processing unit, microprocessor, in this way, FPGA's is predetermined
It is incoherent that the restarting of function (troubleshooting of predetermined function), which is with the main process task module of electronic equipment, for example, with center
The working condition of processor is incoherent.
In some embodiments, the pin that the FPGA is used to connect with memory can be connect with predetermined manager, in advance
Determine manager to connect with predetermined memory, such predetermined manager can read the FPGA stored in the predetermined memory and hold
Configuration file needed for row predetermined function, and it is transferred to FPGA.In this way, under the premise of structure that can be without changing FPGA, by
The predetermined manager assists the FPGA to read configuration file from the predetermined memory of non-special (for example, general),
Realize restarting for the predetermined function of failure.
In some embodiments, the predetermined manager can also be the insertion of introducing other than the BMC or RMC
Formula controller (Embedded Controller, EC) is used for restarting for the predetermined function of the failure for the FPGA.
As shown in Fig. 2, the present embodiment provides a kind of information processing methods, including：
Step S210：If when the predetermined function failure of FPGA, the predetermined manager in electronic equipment is read from predetermined memory
Take the configuration file executed needed for the predetermined function；
Step S220：The configuration file is sent to FPGA；
Step S230：The FPGA restarts the predetermined function according to the configuration file of reception.
Information processing method provided in this embodiment can be applied to the method in the predetermined manager of FPGA, if once examining
The predetermined function failure of FPGA is measured, then reads out predetermined function from predetermined memory by the predetermined manager in electronic equipment
Configuration file needed for executing.
How to judge that various methods in the related technology can be used in the pre- surely functional fault of FPGA, for example, FPGA is not
With partly can be used for executing different predetermined functions, the output signal of the FPGA of predetermined function can be executed by detecting, if should
Output signal is abnormal, then it is believed that the predetermined function of FPGA executes exception, otherwise it is believed that the predetermined function of the FPGA executes just
Often.For example, detect that the signal value of output signal is not located within the scope of normal signal value, in another example, the output signal detected
Frequency be not located within the scope of normal frequency, at this point, circuit where can assert abnormal output signal execute it is predetermined
Functional fault.It is the example for the predetermined function failure for how detecting FPGA above, the relevant technologies may be used in when specific implementation
Various methods, are not limited to the example above.
The configuration file includes that the FPGA executes the required execution code of predetermined function and/or circuit configuration parameter
Equal configuration informations.Configuration file can be sent to FPGA by predetermined manager in step S220, and the FPAG receives configuration text
After part, by according to the execution for executing code and/or configuration information rewriting predetermined function in configuration file, make a reservation for realize
The troubleshooting of function, and restart predetermined function, preferably to realize the predetermined function of FPGA.
In the present embodiment, restarting for the predetermined function of FPGA failures is realized using predetermined manager, is not necessarily to electronic equipment
The participation of interior main process task module, while without the specific memory that setting directly reads for FPGA, therefore have and main place
The feature that the coupling of reason module is low and hardware cost is low.
Optionally, the step S210 may include：If when the predetermined function failure of the FPGA, baseboard management controller or
Frame Management Controller reads the configuration file of the FPGA of the predetermined function from predetermined memory.
It can be multiplexed BMC or RMC in the present embodiment from predetermined memory to the configuration file of predetermined function so that
FPGA is directly or indirectly receiving the configuration file from the predetermined manager such as the BMC or RMC.It is described in the present embodiment pre-
It is to be already provided in the electronic equipments such as BMC or RMC or common manager to determine manager, and it is dedicated not have to again additional setting
Manager, have simplify electronic equipment structure, further reduced the hardware cost of electronic equipment and improve BMC or
The characteristics of effective rate of utilization of RMC.In further embodiments, the predetermined manager can be its except the BMC or RMC
His manager, for example, the EC of setting and the FPGA direct or indirect connections, the usual EC can be the main place in electronic equipment
Manage the different processing apparatus of module (for example, central processing unit, microprocessor etc. are located at the processing apparatus on mainboard), the processor
Part has the characteristics that structure is relatively easy, small and hardware cost is low.
Optionally, the predetermined memory is general-purpose storage.General-purpose storage can be adapted for the high property of different requirements
Private memory other than energy system on chip (System Of Chip, SOC) rather than general-purpose storage, private memory is only
Memory suitable for certain device read-write.General-purpose storage herein can be memory common on the market, without special
The private memory of design, to have the characteristics that materials are extensive.
As shown in figure 3, the present embodiment provides a kind of electronic equipment, including：
First detection module 110, for detecting environment temperature；
Second detection module 120, the operating temperature for detecting FPGA；
Determining module 130, for according to the environment temperature and the operating temperature, determining the work ginseng of the FPGA
Number；
Control module 140, for according to the running parameter, controlling the work of the FPGA.
Electronic equipment provided in this embodiment can be the various PC (Personal such as desktop computer, laptop
Computer, PC) etc. electronic equipments.
The first detection module 110, the second detection module 120, determining module 130 and control module 140 can be journey
Sequence module, these program modules can store in memory, and processor reads the program module from memory, and executes this
A little program modules, so that it may it detects environment temperature, operating temperature to combine, determines the running parameter that FPGA is currently suitble to, and
Control FPGA is performed various functions according to determining running parameter, to avoid FPGA from using caused by inappropriate running parameter
Various problems, so that it is guaranteed that the working performance of FPGA, and ensure the stability of FPGA.
Optionally, the determining module 130, for executing at least one of：According to the environment temperature and the work
Make temperature, determines the working frequency of the FPGA；According to the environment temperature and the operating temperature, the confession of the FPGA is determined
It can signal.
Optionally, the determining module 130 can also be specifically used for, according to the environment temperature and the operating temperature, looking into
It askes and presets correspondence；According to inquiry as a result, determining the running parameter of the FPGA.
Optionally, the electronic equipment further includes：
Read transmission module, for when the predetermined function failure of the FPGA, predetermined manager in electronic equipment from
Predetermined memory reads the configuration file executed needed for the predetermined function, and is transferred to the FPGA；The FPGA will be used for
According to the configuration file read from predetermined memory, the predetermined function is restarted.
The reading transmission module may be program module in the present embodiment, after which is executed by processor
It enables to predetermined manager to read corresponding configuration file from predetermined memory, and configuration file is transferred to FPGA.
Optionally, the predetermined manager includes at least one of：Baseboard management controller；Frame Management Controller.It can
Selection of land, the predetermined memory can be general-purpose storage.
As shown in figure 4, the present embodiment provides a kind of electronic equipment, including：
Read module 210, if be used for the predetermined function failure of FPGA, the predetermined manager in electronic equipment is deposited from predetermined
Reservoir reads the configuration file executed needed for the predetermined function；
Transmission module 220, for the configuration file to be sent to FPGA；
Restart module 230, for the FPGA according to the configuration file of reception, restarts the predetermined function.
In the present embodiment the read module 210, transmission module 220 and restart module 230 can be program module, quilt
After processor executes, it can realize and be read needed for execution predetermined function from predetermined memory by the predetermined manager of electronic equipment
Configuration file, and it is transferred to FPGA, in this way, without main process tasks moulds such as central processing units (Centre Process Unit, CPU)
Group is transferred to FPGA again to read the configuration file, while not also being that FPGA directly reads configuration file from private memory,
Therefore with small with the coupling of main process task module, FPGA is not necessarily to keep clock synchronous with main process task module, without into line interface
The processing such as adaptation；Meanwhile directly the configuration file can be read for the predetermined memory of general-purpose storage, using general-purpose storage
The configuration file is stored, is had the characteristics that at low cost.The predetermined memory can be electronic equipment internal in the present embodiment
Any one existing general-purpose storage, the general-purpose storage that can also be newly introduced, to compatible with the prior art
Strong and at low cost feature.
Optionally, the read module 210, if be particularly used in the predetermined function failure of the FPGA, substrate management
Controller or frame Management Controller read the configuration file of the FPGA of the predetermined function from predetermined memory.
As shown in Figure 5A, the present embodiment provides a kind of electronic equipment, including：
FPGA；
Predetermined memory is stored with the configuration file of the FPGA；
Predetermined manager is connect with the predetermined memory, if be used for the predetermined function failure of FPGA, in electronic equipment
Predetermined manager the configuration file executed needed for the predetermined function is read from predetermined memory；
The FPGA, for after receiving the configuration file, restarting the predetermined function.
A kind of FPGA is provided in the present embodiment, and the FPGA can be various types of FPGA, and FPGA herein may include
Multiple fpga chips, the fpga chip according to the function of execution can also be divided into main fpga chip and from fpga chip, or, main
Fpga chip or spare fpga chip etc..The FPGA is distinguished according to the predetermined function of completion, and the fpga chip may include：
Calculating fpga chip for completing to calculate is used for the network fpga chip of network acceleration.The calculating fpga chip can be complete
At various calculating, for example, Floating-point Computation, for another example Fourier calculates etc..The network fpga chip for network acceleration,
The functions such as filtering, address conversion and/or the routing forwarding that can be used for that network interface card is assisted to carry out message, to realize adding for message transmissions
Speed.Certainly the above citing to FPGA and fpga chip, when specific implementation, are not limited to any one of the above.
As shown in Figure 5 B, the main process task module in electronic equipment can be independent from each other equipment with predetermined manager, for example,
The predetermined manager can be BMC above-mentioned either RMC or EC etc..The predetermined manager is connect with general-purpose storage, from
General-purpose storage reads configuration file and is transferred to FPGA.
Several specific examples are provided below in conjunction with above-mentioned any embodiment：
Example 1：
As shown in fig. 7, utilizing existing Complex Programmable Logic Devices (Complex on FPGA accelerator cards
Programmable Logic Device, CPLD) monitoring of the realization for the junction temperature and environment temperature of FPGA, control FPGA's
Work clock and power supply, to ensure the reliably working of FPGA accelerator cards.
Temperature sensor will acquire the junction temperature (junction temper) and environment temperature of FPGA respectively；The CPLD periods
Property reading temperature sensor, record temperature change, calculate temperature changing trend, be fitted the junction temperature and environment temperature of FPGA, in advance
Measure the junction temperature of next moment FPGA；Using this numerical value, thresholding table (threshold table) is searched, according to threshold
The setting of table, the output etc. of the oscillator signal of adjustment phaselocked loop (Phase Locked Loop, PLL), to realize control
It exports to the clock of FPGA and controls the power consumption and performance of FPGA by adjusting clock frequency；It, can be with when environment temperature is excessively high
The power supply for closing FPGA, avoids the damage of FPGA.In this way, when FPGA executes acceleration function, bigger power consumption is had, due to drawing
The environment temperature for having entered working environment, so as to according to the environment temperature of the operating temperatures such as the junction temperature of FPGA itself and working environment
Degree, the running parameter of the FPGA dynamically adjusted so that job insecurity asks caused by FPGA avoids overheat or temperature too low
Topic, promotes the job stability of FPGA, reduces the damage of the inappropriate caused FPGA of running parameter of FPGA, extends FPGA's
Service life.
Example 2：
Using the general-purpose storage of low cost, which can be various types of memories, for example, random storage
Device or flash memory (Flash) etc..The configuration file needed for FPGA realization different function is stored in general-purpose storage；Using passive serial
(Passive Serial, PS) pattern configurations scheme；Configuration file to be used can be controlled and selected by BMC or RMC, opened
It is dynamic to reconfigure FPGA functions without restarting entire FPGA, do not need host (corresponding to main process task module above-mentioned) ginseng yet
With.
The configuration management mode for the FPGA that this example provides, has the characteristics that：
First：General-purpose storage can be used, have the characteristics that low cost；
Second：Manageability is strong, and FPGA is managed by BMC/RMC, and the application of FPGA and function and local host are without necessarily joining
System；
Third：Easily extension, the capacity of spread F lash can support the storage of more configuration files.
Example 3：
As shown in Figure 6 and Figure 7, this example provides a kind of electronic equipment, including：
FPGA, the FPGA include pin, CONF-DONE, nSTATUS, nCE, DATA0, nCONFIG, DCLK, nCE0 and
MSEL etc..In the figure 7, pin MSEL is the MSEL of 2.0 versions【2.0】.Two VCCPGMRespectively it is connected respectively to by resistance
Predetermined manager and FPGA, to provide the energy supply for meeting its demand to predetermined manager and FPGA respectively, for example, respectively to predetermined
Manager and FPGA provide enough voltage, and predetermined manager and FPGA can be enable to work.Resistance shown in Fig. 7
Prevention is 10k Ω.Predetermined manager is connect with memory, and the configuration file needed for FPGA can be stored in the memory.In advance
Manager is determined respectively by pin DATA0 and/or nCONFIG etc. to FPGA translation profiles, and DCLK can be predetermined manager
Carry out data transmission the clock pins used between FPGA.
Example 4：
Flash memory #0 and flash memory #1 is shown in fig. 8, and one or more of these flash memories are stored with configuration file, example
Such as, configuration file 1, configuration file 2 ... configuration file n-1 and configuration file n, n can be positive integer.Flash controller and BMC/
RMC etc. is connected by bus, in this way, BMC/RMC, which is sent, reads signal, in flash controller to corresponding flash memory needed for reading
Configuration file, and BMC/RMC is transferred to by main management interface, then by BMC/RMC by PS configuration drivens, with PS configuration drivens
The mode of signal is written in FPGA.
In several embodiments provided herein, it should be understood that disclosed device and method can pass through it
Its mode is realized.Apparatus embodiments described above are merely indicative, for example, the division of the unit, only
A kind of division of logic function, formula that in actual implementation, there may be another division manner, such as：Multiple units or component can combine, or
It is desirably integrated into another system, or some features can be ignored or not executed.In addition, shown or discussed each composition portion
It can be the INDIRECT COUPLING by some interfaces, equipment or unit to divide mutual coupling or direct-coupling or communication connection
Or communication connection, can be electrical, mechanical or other forms.
The above-mentioned unit illustrated as separating component can be or may not be and be physically separated, aobvious as unit
The component shown can be or may not be physical unit, you can be located at a place, may be distributed over multiple network lists
In member；Some or all of wherein unit can be selected according to the actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in various embodiments of the present invention can be fully integrated into a processing module, also may be used
It, can also be during two or more units be integrated in one unit to be each unit individually as a unit；It is above-mentioned
The form that hardware had both may be used in integrated unit is realized, can also be realized in the form of hardware adds SFU software functional unit.
One of ordinary skill in the art will appreciate that：Realize that all or part of step of above method embodiment can pass through
The relevant hardware of program instruction is completed, and program above-mentioned can be stored in a computer read/write memory medium, the program
When being executed, step including the steps of the foregoing method embodiments is executed；And storage medium above-mentioned includes：It is movable storage device, read-only
Memory (Read-Only Memory, ROM), random access memory (Random Access Memory, RAM), magnetic disc or
The various media that can store program code such as person's CD.
The above description is merely a specific embodiment, but scope of protection of the present invention is not limited thereto, any
Those familiar with the art in the technical scope disclosed by the present invention, can easily think of the change or the replacement, and should all contain
Lid is within protection scope of the present invention.Therefore, protection scope of the present invention should be based on the protection scope of the described claims.
Claims (10)
1. a kind of information processing method, which is characterized in that including：
Detect environment temperature；
Detect the operating temperature of programmable array FPGA；
According to the environment temperature and the operating temperature, the running parameter of the FPGA is determined；
According to the running parameter, the work of the FPGA is controlled.
2. according to the method described in claim 1, it is characterized in that,
It is described to determine the running parameter of the FPGA according to the environment temperature and the operating temperature, including it is following at least it
One：
According to the environment temperature and the operating temperature, the working frequency of the FPGA is determined；
According to the environment temperature and the operating temperature, the power providing signal of the FPGA is determined.
3. according to the method described in claim 1, it is characterized in that,
It is described to determine the running parameter of the FPGA according to the environment temperature and the operating temperature, including：
According to the environment temperature and the operating temperature, inquires and preset correspondence；
According to inquiry as a result, determining the running parameter of the FPGA.
4. method according to claim 1,2 or 3, which is characterized in that
The method further includes：
When the predetermined function failure of the FPGA, the predetermined manager in electronic equipment is read from predetermined memory described in execution
Configuration file needed for predetermined function, and it is transferred to the FPGA；
The FPGA restarts the predetermined function according to the configuration file read from predetermined memory.
5. according to the method described in claim 4, it is characterized in that,
The predetermined manager includes at least one of：
Baseboard management controller；
Frame Management Controller.
6. a kind of information processing method, which is characterized in that including：
If when the predetermined function failure of programmable array FPGA, the predetermined manager in electronic equipment is held from predetermined memory reading
Configuration file needed for the row predetermined function；
The configuration file is sent to FPGA；
The FPGA restarts the predetermined function according to the configuration file of reception.
7. according to the method described in claim 6, it is characterized in that,
If when the predetermined function failure of the programmable array FPGA, the predetermined manager in electronic equipment is read from predetermined memory
The configuration file executed needed for the predetermined function is taken, including：
If when the predetermined function failure of the FPGA, baseboard management controller or frame Management Controller read institute from predetermined memory
State the configuration file of the FPGA of predetermined function.
8. a kind of electronic equipment, which is characterized in that including：
First detection module, for detecting environment temperature；
Second detection module, the operating temperature for detecting programmable array FPGA；
Determining module, for according to the environment temperature and the operating temperature, determining the running parameter of the FPGA；
Control module, for according to the running parameter, controlling the work of the FPGA.
9. a kind of electronic equipment, which is characterized in that including：
Read module, if when predetermined function failure for programmable array FPGA, predetermined manager in electronic equipment is from pre-
Determine memory and reads the configuration file executed needed for the predetermined function；
Transmission module, for the configuration file to be sent to FPGA；
Restart module, for the FPGA according to the configuration file of reception, restarts the predetermined function.
10. a kind of electronic equipment, which is characterized in that including：
Programmable array FPGA；
Predetermined memory is stored with the configuration file of the FPGA；
Predetermined manager is connect with the predetermined memory, if be used for the predetermined function failure of programmable array FPGA, electronics
Predetermined manager in equipment reads the configuration file executed needed for the predetermined function from predetermined memory；
The FPGA is used for after receiving the configuration file, restarts the predetermined function.
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| CN112199257A (en) * | 2020-10-26 | 2021-01-08 | 英业达科技有限公司 | Temperature management system |
| CN112270086A (en) * | 2020-10-26 | 2021-01-26 | 济南浪潮高新科技投资发展有限公司 | System and method for preventing FPGA (field programmable Gate array) from heat dissipation failure |
| CN112416681A (en) * | 2020-11-24 | 2021-02-26 | 超越科技股份有限公司 | BMC-based sensor development and debugging method |
| CN112764999A (en) * | 2021-03-11 | 2021-05-07 | 英业达科技有限公司 | Intelligent network card with FPGA chip overheating monitoring function |
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Application publication date: 20181113 |