CN107769767B - Resistance trimming circuit and method - Google Patents
Resistance trimming circuit and method Download PDFInfo
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Abstract
The application discloses resistance trimming circuit includes: the clock output end of the enabling module is connected with the clock input end of the isolating module and used for outputting a clock signal; the signal output end of the detection module is connected with the signal input end of the isolation module and used for outputting a detection signal according to an input instruction of a user after enabling; the signal output end of the isolation module is connected with the signal input end of the trimming module and used for outputting a control signal under the action of a clock signal; the trimming module comprises a controllable switch tube and a trimming resistor, a control end of the controllable switch tube is used as a signal input end of the trimming module, and a first end and a second end are respectively connected with two ends of the trimming resistor. This application utilizes isolation module and controllable switch pipe control to repair and transfer resistance by the short circuit, has avoided the influence of noise to the output precision. The application also provides a resistor trimming method which has the beneficial effects.
Description
Technical Field
The present disclosure relates to electronic technologies, and in particular, to a resistor trimming circuit and a resistor trimming method.
Background
In analog circuits, it is generally difficult to ensure very precise resistance values due to the floating of the integrated circuit design process, and therefore, in many application circuits such as reference voltage source circuits, a plurality of trimming resistors are often used to fine-tune the total resistance value in the circuit.
Generally, the resistance trimming adopts a fuse trimming mode. A conventional resistor trimming circuit is shown in fig. 1, wherein a resistor R is a reference resistor connected to a circuit, and the resistor R is connected to the reference resistor1、r2… … and rnThe resistors are trimming resistors which are connected with the resistor R in series and have small resistance values, and the resistance values of the trimming resistors are generally designed into a binary weighted form, namely the resistance values are sequentially increased by 2 times; and two ends of each trimming resistor are directly connected with a fuse in parallel, and two ends of the fuse are connected with the bonding pad. When the resistor is trimmed, technicians can fuse the designated fuse wire through tools such as a probe and the like so as to access the corresponding trimming resistor into a circuit and realize the fine adjustment of the total resistance value of the circuit.
However, since the fuse in the conventional resistor trimming circuit is directly connected to the corresponding trimming resistor, noise interference is easily generated, which affects the adjustment of the total resistance of the circuit and reduces the output accuracy of the circuit. Therefore, what kind of resistance trimming circuit and method is adopted to reduce the noise effect and further improve the circuit output accuracy is a technical problem to be solved urgently by those skilled in the art.
Disclosure of Invention
The present disclosure is directed to a resistor trimming circuit and a method thereof, so as to effectively reduce noise influence during fusing of a fuse, and further improve output accuracy of the circuit.
In order to solve the above technical problem, the present application provides a resistance trimming circuit, including an enabling module, a detecting module, an isolating module, and a trimming module;
the detection module comprises an enabling module, an isolating module and a control module, wherein the enabling output end of the enabling module is connected with the enabling input end of the detection module, and the clock output end of the enabling module is connected with the clock input end of the isolating module and used for inputting an enabling signal to the detection module according to an input signal and inputting a clock signal to the isolating module;
the signal output end of the detection module is connected with the signal input end of the isolation module and is used for inputting a detection signal to the isolation module according to an input instruction of a user after the enabling signal is received;
the signal output end of the isolation module is connected with the signal input end of the trimming module and used for inputting a control signal to the trimming module according to the detection signal under the action of the clock signal;
the trimming module comprises a controllable switch tube and a trimming resistor, a control end of the controllable switch tube is used as a signal input end of the trimming module, and a first end and a second end of the controllable switch tube are respectively connected with two ends of the trimming resistor and used for controlling the on-off of the controllable switch tube according to the control signal so as to control whether the trimming resistor is short-circuited or not.
Optionally, the enabling module comprises a first inverter, a second inverter, a third inverter and a nand gate; the clock output end comprises a first clock output end and a second clock output end;
the input end and the output end of the first inverter are respectively connected with the first input end and the second input end of the NAND gate, and the input end of the first inverter is used as the signal input end of the enabling module and used for receiving the input signal; the output end of the NAND gate is used as the enabling output end of the enabling module and is connected with the input end of the second inverter; the output end of the second phase inverter is used as the first clock output end of the enabling module and is connected with the input end of the third phase inverter; and the output end of the third inverter is used as a second clock output end of the enabling module.
Optionally, the detection module includes a first PMOS transistor, a second PMOS transistor, a third PMOS transistor, a fourth PMOS transistor, a first NMOS transistor, a second NMOS transistor, a first resistor, a second resistor, a constant current source, and a fuse;
the grid electrode of the first PMOS tube is used as an enabling input end of the detection module, the source electrode of the first PMOS tube is connected with a power supply, and the drain electrode of the first PMOS tube is respectively connected with the source electrodes of the second PMOS tube, the third PMOS tube and the fourth PMOS tube; the drain electrode of the second PMOS tube is connected with the drain electrode of the first NMOS tube and serves as a signal output end of the detection module, and the grid electrode of the second PMOS tube is respectively connected with the grid electrode and the drain electrode of the third PMOS tube, the grid electrode and the drain electrode of the fourth PMOS tube, the grid electrode and the drain electrode of the second NMOS tube, the grid electrode of the first NMOS tube and the positive output end of the constant current source; the negative output end of the constant current source is grounded; the source electrode of the second NMOS tube is grounded through the second resistor; the source electrode of the first NMOS tube is connected with the first end of the fuse wire through the first resistor; the second terminal of the fuse is grounded.
Optionally, the controllable switch tube is a PMOS tube.
Optionally, the isolation module includes a first CCMOS, a second CCMOS, a fourth inverter, and a fifth inverter; the clock input ends of the isolation module comprise a first clock input end and a second clock input end;
the signal input end of the first CCMOS is connected with the output end of the fourth inverter; the input end of the fourth inverter is respectively connected with the signal output end of the first CCMOS, the signal output end of the second CCMOS and the input end of the fifth inverter; a signal input end of the second CCMOS is used as a signal input end of the isolation module; the first clock input ends of the first CCMOS and the second CCMOS are used as the first clock input ends of the isolation module; second clock input ends of the first CCMOS and the second CCMOS are used as second clock input ends of the isolation module; and the output end of the fifth inverter is used as the signal output end of the isolation module.
The present application further provides a resistance trimming method applied to the resistance trimming circuit described above, including:
the enabling module outputs an enabling signal to the detection module according to the received input signal and outputs the clock signal to the isolation module;
after receiving the enabling signal, the detection module outputs the detection signal to the isolation module according to an input instruction of a user;
the isolation module outputs the control signal to the trimming module according to the detection signal under the action of the clock signal;
and the trimming module controls the on-off of the controllable switch tube according to the control signal so as to control whether the trimming resistor is short-circuited or not.
The resistor trimming circuit provided by the application comprises an enabling module, a detecting module, an isolating module and a trimming module; the detection module comprises an enabling module, an isolating module and a control module, wherein the enabling output end of the enabling module is connected with the enabling input end of the detection module, and the clock output end of the enabling module is connected with the clock input end of the isolating module and used for inputting an enabling signal to the detection module according to an input signal and inputting a clock signal to the isolating module; the signal output end of the detection module is connected with the signal input end of the isolation module and is used for inputting a detection signal to the isolation module according to an input instruction of a user after the enabling signal is received; the signal output end of the isolation module is connected with the signal input end of the trimming module and used for inputting a control signal to the trimming module according to the detection signal under the action of the clock signal; the trimming module comprises a controllable switch tube and a trimming resistor, a control end of the controllable switch tube is used as a signal input end of the trimming module, and a first end and a second end of the controllable switch tube are respectively connected with two ends of the trimming resistor and used for controlling the on-off of the controllable switch tube according to the control signal so as to control whether the trimming resistor is short-circuited or not.
It is thus clear that, compare in prior art, in the resistance trimming circuit that this application provided, do not connect the fuse in parallel directly at trimming resistance both ends, but utilize the controllable switch tube that connects in parallel with trimming resistance to control trimming resistance whether by the short circuit to adjust the total resistance that inserts in the circuit. And because the isolation module connected between the detection module and the trimming module has a latching isolation function, the latching state can be released after the isolation module receives the corresponding clock signal, and the corresponding control signal is output according to the detection signal of the detection module, so that the noise interference in the detection module can be effectively prevented from influencing the output of the trimming module. Therefore, the resistance trimming circuit provided by the application can effectively reduce the noise influence in the fusing process of the fuse wire, and further improve the output precision of the circuit. The resistance trimming method provided by the application is applied to the resistance trimming circuit and has the beneficial effects.
Drawings
In order to more clearly illustrate the technical solutions in the prior art and the embodiments of the present application, the drawings that are needed to be used in the description of the prior art and the embodiments of the present application will be briefly described below. Of course, the following description of the drawings related to the embodiments of the present application is only a part of the embodiments of the present application, and it will be obvious to those skilled in the art that other drawings can be obtained from the provided drawings without any creative effort, and the obtained other drawings also belong to the protection scope of the present application.
Fig. 1 is a circuit structure diagram of a resistance trimming circuit provided in the prior art;
fig. 2 is a circuit schematic diagram of a resistance trimming circuit according to an embodiment of the present disclosure;
fig. 3 is a circuit structure diagram of a resistance trimming circuit according to an embodiment of the present disclosure.
Detailed Description
The core of the application is to provide a resistance trimming circuit and a method, so as to effectively reduce the noise influence in the fusing process of a fuse wire and further improve the output precision of the circuit.
In order to more clearly and completely describe the technical solutions in the embodiments of the present application, the technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Referring to fig. 2, fig. 2 is a schematic structural diagram of a resistance trimming circuit according to the present application; the device comprises an enabling module 1, a detection module 2, an isolation module 3 and a trimming module 4;
the system comprises an enabling module 1, an isolating module 3, an enabling module 1, a clock output end and a clock output end, wherein the enabling output end of the enabling module 1 is connected with the enabling input end of the detecting module 2, the clock output end of the enabling module 1 is connected with the clock input end of the isolating module 3, and the enabling module is used for inputting an enabling signal to the detecting module 2 according to an input signal and inputting a clock signal to the isolating module 3;
the signal output end of the detection module 2 is connected with the signal input end of the isolation module 3 and is used for inputting a detection signal into the isolation module 3 according to an input instruction of a user after receiving an enabling signal;
the signal output end of the isolation module 3 is connected with the signal input end of the trimming module 4 and is used for inputting a control signal to the trimming module 4 according to the detection signal under the action of a clock signal;
the trimming module 4 comprises a controllable switch tube Q and a trimming resistor r, a control end of the controllable switch tube Q is used as a signal input end of the trimming module 4, and a first end and a second end of the controllable switch tube Q are respectively connected with two ends of the trimming resistor r and used for controlling the on-off of the controllable switch tube Q according to a control signal so as to control whether the trimming resistor r is short-circuited or not.
As shown in fig. 2, in the resistor trimming circuit provided in the present application, the trimming resistor r is connected in parallel to two ends of the controllable switch Q, instead of being directly connected in parallel to two ends of the fuse in the prior art. The input signal of the control end of the controllable switch tube Q is output by the isolation module 3, and due to the isolation effect of the isolation module 3, the noise interference received by the detection module 2 when detecting the input instruction of the user is isolated, and the state and the output of the trimming module 4 are not influenced. The input command may specifically be that a user blows a fuse connected to the circuit of the detection module 2 through a probe or other tool, and the detection module 2 outputs a detection signal by detecting whether the fuse is blown.
Specifically, when the enabling module 1 inputs a corresponding clock signal to the isolating module 3, the isolating module 3 outputs a corresponding control signal to the trimming module 4 according to the detection signal of the detecting module 2, otherwise, the enabling module is in a hold state, so as to ensure that the output of the trimming module 4 is not interfered. In addition, after the enabling module 1 inputs the enabling signal to the detecting module, the detecting module 2 is in the enabling state, so as to detect the input instruction of the user.
It should be noted that fig. 2 only shows a trimming circuit of one trimming resistor r, and in practical applications, a person skilled in the art can design and increase the number of relevant structures such as the trimming resistor r according to actual use conditions, and can design the resistance values of a plurality of trimming resistors in a binary weighted form, which is not limited in the embodiment of the present application.
Therefore, the resistor trimming circuit provided by the application does not directly connect the fuse wire in parallel at two ends of the trimming resistor, but controls whether the trimming resistor r is short-circuited by using the controllable switch tube Q connected in parallel with the trimming resistor r, so that the total resistance value in the access circuit is adjusted. And because the isolation module 3 connected between the detection module 2 and the trimming module 4 has a latch isolation function, the latch state can be released after receiving the corresponding clock signal, and the corresponding control signal is output according to the detection signal of the detection module 2, thereby effectively avoiding the noise interference in the detection module 2 from influencing the output of the trimming module 4. Therefore, the resistance trimming circuit provided by the application can effectively reduce the noise influence in the fusing process of the fuse wire, and further improve the output precision of the circuit.
Referring to fig. 3, fig. 3 is a circuit structure diagram of a resistance trimming circuit according to an embodiment of the present disclosure.
The resistance trimming circuit provided by the application is based on the above embodiment:
as shown in fig. 3, as a preferred embodiment, the enable module 1 includes a first inverter INV1, a second inverter INV2, a third inverter INV3 and a nand gate G; the clock outputs include a first clock output Clk1 and a second clock output Clk 2;
an input end and an output end of the first inverter INV1 are respectively connected to a first input end and a second input end of the nand gate G, and an input end of the first inverter INV1 is used as a signal input end of the enable module 1 and is used for receiving an input signal; the output end of the nand gate G is used as the enable output end of the enable module 1 and is connected with the input end of the second inverter INV 2; an output end of the second inverter INV2 is used as a first clock output Clk1 of the enable module 1, and is connected with an input end of the third inverter INV 3; an output end of the third inverter INV3 serves as the second clock output end Clk2 of the enable module 1.
Specifically, by using the time delay effect of the inverter, when the signal input by the signal input end of the enabling module 1 changes from low level to high level, the enabling output end outputs a windowed low level so as to control the working state of the detecting module 2; the two clock outputs output clock signals of corresponding waveforms to control the operating state of the isolation module 3.
As shown in fig. 3, as a preferred embodiment, the detection module 2 includes a first PMOS transistor P1, a second PMOS transistor P2, a third PMOS transistor P3, a fourth PMOS transistor P4, a first NMOS transistor N1, a second NMOS transistor N2, a first resistor R1, a second resistor R2, a constant current source Is, and a fuse F;
the gate of the first PMOS transistor P1 is used as the enable input terminal of the detection module 2, the source is connected to the power supply, and the drain is connected to the sources of the second PMOS transistor P2, the third PMOS transistor P3 and the fourth PMOS transistor P4; the drain of the second PMOS transistor P2 Is connected to the drain of the first NMOS transistor N1 and serves as a signal output terminal of the detection module 2, and the gate Is connected to the gate and the drain of the third PMOS transistor P3, the gate and the drain of the fourth PMOS transistor P4, the gate and the drain of the second NMOS transistor N2, the gate of the first NMOS transistor N1, and the positive output terminal of the constant current source Is, respectively; the negative output end of the constant current source Is grounded; the source of the second NMOS transistor N2 is grounded through a second resistor R2; the source of the first NMOS transistor N1 is connected to the first end of the fuse F through a first resistor R1; the second terminal of the fuse F is grounded.
Specifically, when the enable input end of the detection module 2 is at a low level, the first PMOS transistor P1 is turned on, the detection module 2 is in an enable state, and outputs a detection signal according to the detected input instruction; correspondingly, the isolation module 3 is in an evaluation state and outputs a control signal in dependence on the detection signal. When the enable input end of the detection module 2 is at a high level, the first PMOS transistor P1 is turned off, and the detection module 2 is in an disable state; correspondingly, the isolation module 3 is in a latch isolation state, and the control signal output by the isolation module is no longer influenced by the output of the detection module 2.
In the detection module 2, a branch where a third PMOS transistor P3, a second NMOS transistor N2 and a second resistor R2 are located, and a branch where a constant current source Is and a fourth PMOS transistor P4 are located provide a bias voltage for a branch where a fuse F Is located, and when the first PMOS transistor P1 Is turned on, if the fuse F Is not blown, a signal output end of the detection module 2 outputs a low-level detection signal; and if the fuse F is fused, the signal output end of the detection module 2 outputs a high-level detection signal.
As a preferred embodiment, as shown in fig. 3, the controllable switch Q is a PMOS transistor.
As a preferred embodiment, as shown in fig. 3, the isolation module 3 includes a first CCMOS (CCMOS1), a second CCMOS (CCMOS2), a fourth inverter INV4, and a fifth inverter INV 5; the clock input ends of the isolation module comprise a first clock input end and a second clock input end;
the signal input end of the first CCMOS is connected with the output end of the fourth inverter INV 4; an input end of the fourth inverter INV4 is connected to a signal output end of the first CCMOS, a signal output end of the second CCMOS, and an input end of the fifth inverter INV5, respectively; the signal input end of the second CCMOS is used as the signal input end of the isolation module 3; the first clock input ends of the first CCMOS and the second CCMOS are used as the first clock input end of the isolation module 3; second clock input ends of the first CCMOS and the second CCMOS are used as second clock input ends of the isolation module 3; an output end of the fifth inverter INV5 serves as a signal output end of the isolation module 3.
In particular, the isolation module 3 formed by using the CCMOS has a good isolation performance. When the isolation module 3 is in an isolation latch state, the output of the isolation module is fixed; when the isolation module 3 is in an evaluation state, if a low-level detection signal is received, a low-level control signal is output under the action of a clock signal to enable the controllable switch tube Q to be conducted, so that the trimming resistor is short-circuited; if a high-level detection signal is received, a high-level control signal is output under the action of a clock signal, and the controllable switching tube Q is switched off, so that the trimming resistor is switched into the circuit.
The following describes a resistance trimming method provided in the present application.
The resistance trimming method provided by the application is applied to the resistance trimming circuit according to any one of the embodiments, and comprises the following steps:
step 1: the enabling module 1 outputs an enabling signal to the detection module 2 according to the received input signal and outputs a clock signal to the isolation module 3;
step 2: after receiving the enable signal, the detection module 2 outputs a detection signal to the isolation module 3 according to an input instruction of a user;
and step 3: the isolation module 3 outputs a control signal to the trimming module 4 according to the detection signal under the action of the clock signal;
and 4, step 4: the trimming module 4 controls the on-off of the controllable switch tube Q according to the control signal so as to control whether the trimming resistor r is short-circuited or not.
Therefore, in the resistor trimming method provided by the embodiment of the application, whether the trimming resistor r is short-circuited or not is controlled by using the controllable switching tube Q connected with the trimming resistor r in parallel, so that the total resistance value in the access circuit is adjusted. And because the isolation module 3 connected between the detection module 2 and the trimming module 4 has a latch isolation function, the latch state can be released after receiving the corresponding clock signal, and the corresponding control signal is output according to the detection signal of the detection module 2, thereby effectively avoiding the noise interference in the detection module 2 from influencing the output of the trimming module 4. Therefore, the resistance trimming circuit method provided by the application can effectively reduce the noise influence in the fusing process of the fuse wire, and further improve the output precision of the circuit.
The specific content of the resistance trimming method provided by the present application and the resistance trimming circuit described above may be referred to correspondingly, and will not be described herein again.
The embodiments are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. For the system disclosed by the embodiment, the description is relatively simple because the system corresponds to the method disclosed by the embodiment, and the relevant points can be referred to the method part for description.
It is further noted that, throughout this document, relational terms such as "first" and "second" are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Furthermore, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The technical solutions provided by the present application are described in detail above. The principles and embodiments of the present application are explained herein using specific examples, which are provided only to help understand the method and the core idea of the present application. It should be noted that, for those skilled in the art, it is possible to make several improvements and modifications to the present application without departing from the principle of the present application, and such improvements and modifications also fall within the scope of the claims of the present application.
Claims (5)
1. A resistor trimming circuit is characterized by comprising an enabling module, a detection module, an isolation module and a trimming module;
the detection module comprises an enabling module, an isolating module and a control module, wherein the enabling output end of the enabling module is connected with the enabling input end of the detection module, and the clock output end of the enabling module is connected with the clock input end of the isolating module and used for inputting an enabling signal to the detection module according to an input signal and inputting a clock signal to the isolating module;
the signal output end of the detection module is connected with the signal input end of the isolation module and is used for inputting a detection signal to the isolation module according to an input instruction of a user after the enabling signal is received;
the signal output end of the isolation module is connected with the signal input end of the trimming module and used for inputting a control signal to the trimming module according to the detection signal under the action of the clock signal;
the trimming module comprises a controllable switch tube and a trimming resistor, a control end of the controllable switch tube is used as a signal input end of the trimming module, and a first end and a second end of the controllable switch tube are respectively connected with two ends of the trimming resistor and are used for controlling the on-off of the controllable switch tube according to the control signal so as to control whether the trimming resistor is short-circuited or not;
the detection module comprises a first PMOS (P-channel metal oxide semiconductor) tube, a second PMOS tube, a third PMOS tube, a fourth PMOS tube, a first NMOS (N-channel metal oxide semiconductor) tube, a second NMOS tube, a first resistor, a second resistor, a constant current source and a fuse;
the grid electrode of the first PMOS tube is used as an enabling input end of the detection module, the source electrode of the first PMOS tube is connected with a power supply, and the drain electrode of the first PMOS tube is respectively connected with the source electrodes of the second PMOS tube, the third PMOS tube and the fourth PMOS tube; the drain electrode of the second PMOS tube is connected with the drain electrode of the first NMOS tube and serves as a signal output end of the detection module, and the grid electrode of the second PMOS tube is respectively connected with the grid electrode and the drain electrode of the third PMOS tube, the grid electrode and the drain electrode of the fourth PMOS tube, the grid electrode and the drain electrode of the second NMOS tube, the grid electrode of the first NMOS tube and the positive output end of the constant current source; the negative output end of the constant current source is grounded; the source electrode of the second NMOS tube is grounded through the second resistor; the source electrode of the first NMOS tube is connected with the first end of the fuse wire through the first resistor; the second terminal of the fuse is grounded.
2. The resistance trimming circuit of claim 1, wherein the enabling module comprises a first inverter, a second inverter, a third inverter, and a nand gate; the clock output end comprises a first clock output end and a second clock output end;
the input end and the output end of the first inverter are respectively connected with the first input end and the second input end of the NAND gate, and the input end of the first inverter is used as the signal input end of the enabling module and used for receiving the input signal; the output end of the NAND gate is used as the enabling output end of the enabling module and is connected with the input end of the second inverter; the output end of the second phase inverter is used as the first clock output end of the enabling module and is connected with the input end of the third phase inverter; and the output end of the third inverter is used as a second clock output end of the enabling module.
3. The resistance trimming circuit of claim 2, wherein the controllable switch is a PMOS transistor.
4. The resistance trimming circuit of claim 3, wherein the isolation module comprises a first CCMOS, a second CCMOS, a fourth inverter, and a fifth inverter; the clock input ends of the isolation module comprise a first clock input end and a second clock input end;
the signal input end of the first CCMOS is connected with the output end of the fourth inverter; the input end of the fourth inverter is respectively connected with the signal output end of the first CCMOS, the signal output end of the second CCMOS and the input end of the fifth inverter; a signal input end of the second CCMOS is used as a signal input end of the isolation module; the first clock input ends of the first CCMOS and the second CCMOS are used as the first clock input ends of the isolation module; second clock input ends of the first CCMOS and the second CCMOS are used as second clock input ends of the isolation module; and the output end of the fifth inverter is used as the signal output end of the isolation module.
5. A resistance trimming method applied to the resistance trimming circuit according to any one of claims 1 to 4, comprising:
the enabling module outputs an enabling signal to the detection module according to the received input signal and outputs the clock signal to the isolation module;
after receiving the enabling signal, the detection module outputs the detection signal to the isolation module according to an input instruction of a user;
the isolation module outputs the control signal to the trimming module according to the detection signal under the action of the clock signal;
and the trimming module controls the on-off of the controllable switch tube according to the control signal so as to control whether the trimming resistor is short-circuited or not.
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Citations (4)
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| CN107769767A (en) | 2018-03-06 |
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