CN107863129B - Circuit and method for programming electrically programmable fuse circuit by using same - Google Patents
Circuit and method for programming electrically programmable fuse circuit by using same Download PDFInfo
- Publication number
- CN107863129B CN107863129B CN201610841539.9A CN201610841539A CN107863129B CN 107863129 B CN107863129 B CN 107863129B CN 201610841539 A CN201610841539 A CN 201610841539A CN 107863129 B CN107863129 B CN 107863129B
- Authority
- CN
- China
- Prior art keywords
- voltage
- circuit
- programmable fuse
- control signal
- low dropout
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
- G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
- G11C17/18—Auxiliary circuits, e.g. for writing into memory
Abstract
The invention provides a voltage stabilizing circuit and a method for programming an electrically programmable fuse circuit by using the same, wherein the circuit comprises: the output end of the low dropout linear voltage regulator is connected to the electric programmable fuse circuit and is used for providing power supply voltage for the electric programmable fuse circuit; a voltage stabilizing unit connected to the output terminal of the low dropout regulator for weakening ripples of an output voltage of the low dropout regulator. The voltage stabilizing circuit and the method for programming the electric programmable fuse wire by using the same have the advantages that the voltage stabilizing unit starts to work first, the second clock pulse control signal of the voltage stabilizing unit is advanced by at least one system clock period compared with the first clock pulse control signal of the electric programmable fuse wire circuit, the output ripple wave of the low dropout linear voltage regulator can be effectively weakened, no additional device is introduced, only the existing signal and voltage are utilized, the cost is not increased, and the occupied area is small.
Description
Technical Field
The invention relates to the field of memories, in particular to a circuit and a method for programming an electrically programmable fuse circuit by using the circuit.
Background
Efuse (electrically programmable fuse) belongs to a one-time programmable memory, the programming mechanism of which is difficult to be explained with a single current or voltage, but can be understood as: the Poly (polysilicon) resistor is blown with a large instantaneous current while the holding voltage is stable. When the programming occurs, the stable voltage, the instantaneous large current and the programming time are called three elements of the successful programming of the efuse. In view of the above elements, current designs generally require that efuse be burned using a stable external power supply, a board-level voltage converter, or an on-chip voltage converter.
Among them, the use of the board-level voltage converter increases the production and design costs, and is the most undesirable way for customers to use. The use of a stable external power supply increases design difficulty and cost, so customers desire fewer power supplies as good as possible. Therefore, in order to reduce the cost, the scheme adopted at present is to use an on-chip LDO (low dropout linear regulator) to program the circuit of efuse. The LDO can provide a stable 2.5V voltage. However, the LDO has a disadvantage that when the external capacitor is not provided, the ripple of the LDO is hard to decrease, and the cost is increased by increasing the external capacitor. The ripple of the LDO is related to the pull-down current intensity of the efuse, and if the efuse requires a large current intensity, the ripple is large, which may affect the burning of the efuse.
Therefore, it is necessary to provide a method and a circuit for reducing the output voltage ripple of the LDO to solve the existing technical problems.
Disclosure of Invention
In this summary, concepts in a simplified form are introduced that are further described in the detailed description. This summary of the invention is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter.
In order to overcome the problems existing at present, the present invention provides, in one aspect, a voltage stabilization circuit, including:
the output end of the low dropout linear voltage regulator is connected to the electric programmable fuse circuit and is used for providing power supply voltage for the electric programmable fuse circuit;
a voltage stabilizing unit connected to the output terminal of the low dropout regulator for weakening ripples of an output voltage of the low dropout regulator.
Further, the electrically programmable fuse circuit is controlled by a first clock pulse control signal for programming, the voltage stabilization unit is controlled by a second clock pulse control signal for enabling, and the second clock pulse control signal is advanced by at least one system clock period from the first clock pulse control signal.
The voltage stabilizing unit comprises an NMOS tube and at least one first resistor, wherein the gate of the NMOS tube is connected with a second clock pulse control signal, the source of the NMOS tube is connected with one end of the first resistor, the drain of the NMOS tube is connected with the output end of the low dropout linear regulator, and the other end of the first resistor is connected with a ground voltage.
Further, the voltage stabilizing unit starts to operate first, and then the electrically programmable fuse circuit starts to be programmed.
The output stage circuit of the low dropout linear regulator comprises a PMOS (P-channel metal oxide semiconductor) tube and at least one second resistor, wherein the grid electrode of the PMOS tube is connected with an input signal, the source electrode of the PMOS tube is connected with a supply voltage, the drain electrode of the PMOS tube is connected with the second resistor, the other end of the second resistor is connected with a ground voltage, and the output end of the low dropout linear regulator is connected with the drain electrode of the PMOS tube.
Illustratively, the first clock pulse control signal is generated by a digital circuit, the pulse width of which is determined by parameters of an electrically programmable fuse in the electrically programmable fuse circuit.
Another aspect of the present invention also provides a method for programming an electrically programmable fuse circuit using the above voltage stabilization circuit, comprising the steps of:
the low dropout linear regulator outputs power supply voltage and power supply current;
the second clock pulse control signal controls the voltage stabilizing unit to start working;
the first clock pulse control signal controls the electrically programmable fuse circuit to start programming and store data, and the low dropout linear regulator outputs programming voltage and programming current.
Further, the second clock pulse control signal is advanced by at least one system clock period from the first clock pulse control signal.
Further, when the voltage stabilizing unit starts to work, the power supply current output by the low dropout linear regulator is changed from 0.1-9.9 microampere to 0.1-9.9 milliampere, and when the electrically programmable fuse circuit starts to work, the programming current output by the low dropout linear regulator is changed from 0.1-9.9 milliampere to 1-99.9 milliampere.
The voltage stabilizing circuit and the method for programming the electric programmable fuse wire by using the same have the advantages that the voltage stabilizing unit starts to work first, the second clock pulse control signal of the voltage stabilizing unit is advanced by at least one system clock period compared with the first clock pulse control signal of the electric programmable fuse wire circuit, the output ripple wave of the low dropout linear voltage regulator can be effectively weakened, no additional device is introduced, only the existing signal and voltage are utilized, the cost is not increased, and the occupied area is small.
Drawings
The following drawings of the invention are included to provide a further understanding of the invention. The drawings illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention.
In the drawings:
fig. 1 is a block diagram of the overall structure of a voltage stabilization circuit according to the present invention;
FIG. 2 is a schematic diagram of a specific structure of a voltage stabilizing circuit according to the present invention;
FIG. 3 is a flow chart of a method of programming an electrically programmable fuse circuit using the voltage stabilization circuit of the present invention;
FIG. 4 is a diagram comparing waveforms of programming voltages of a voltage stabilizing circuit with a voltage stabilizing unit and a circuit without the voltage stabilizing unit according to the present invention.
Detailed Description
In the following description, numerous specific details are set forth in order to provide a more thorough understanding of the present invention. It will be apparent, however, to one skilled in the art, that the present invention may be practiced without one or more of these specific details. In other instances, well-known features have not been described in order to avoid obscuring the invention.
It is to be understood that the present invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In the drawings, the size and relative sizes of layers and regions may be exaggerated for clarity. Like reference numerals refer to like elements throughout.
It will be understood that when an element or layer is referred to as being "on" …, "adjacent to …," "connected to" or "coupled to" other elements or layers, it can be directly on, adjacent to, connected to or coupled to the other elements or layers or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on …," "directly adjacent to …," "directly connected to" or "directly coupled to" other elements or layers, there are no intervening elements or layers present. It will be understood that, although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present invention.
Spatial relationship terms such as "under …", "under …", "below", "under …", "above …", "above", and the like, may be used herein for ease of description to describe the relationship of one element or feature to another element or feature as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, then elements or features described as "below" or "beneath" other elements or features would then be oriented "above" the other elements or features. Thus, the exemplary terms "below …" and "below …" can encompass both an orientation of up and down. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatial descriptors used herein interpreted accordingly.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. As used herein, the term "and/or" includes any and all combinations of the associated listed items.
In the following description, for purposes of explanation, specific details are set forth in order to provide a thorough understanding of the present invention. The following detailed description of the preferred embodiments of the invention, however, the invention is capable of other embodiments in addition to those detailed.
Fig. 1 shows an overall structural block diagram of a voltage stabilization circuit according to the present invention. As shown in fig. 1, the voltage stabilizing circuit of the present invention includes a low dropout regulator LDO and a voltage stabilizing unit, wherein an output terminal of the low dropout regulator LDO is connected to an electrically programmable fuse circuit for providing a power supply voltage to the electrically programmable fuse circuit; the voltage stabilizing unit is connected with the output end of the low dropout regulator LDO and is used for weakening ripples of the output voltage of the low dropout regulator LDO.
The voltage stabilizing circuit can effectively weaken the output ripple of the low dropout regulator LDO, does not introduce additional devices, only utilizes the existing signals and voltage, does not increase the cost, and has small occupied area.
The present invention will now be described in detail with reference to specific embodiments and the accompanying drawings.
According to embodiment 1 of the present invention, a voltage stabilizing circuit for reducing output ripple of a low dropout linear regulator LDO is provided.
Fig. 2 shows a voltage stabilizing circuit for reducing output ripple of a low dropout linear regulator according to the present invention, which comprises: the LDO 200 and the voltage stabilizing unit 300.
The output terminal of the low dropout regulator LDO 200 is connected to the electrically programmable fuse circuit 100, and is used for providing a power supply voltage to the electrically programmable fuse circuit 100.
The electrically programmable fuse circuit 100 is used for storing data when a programming current passes through and blows an electrically programmable fuse, and is controlled by a clock pulse control signal L1 to perform programming. The clock pulse control signal L1 can be generated by methods known in the art, and is illustratively generated by digital circuits. The pulse width of the clock control signal L1 is determined by the parameters of the electrically programmable fuse circuit 100.
The electrically programmable fuse of the electrically programmable fuse circuit 100 may use polycide as the fuse, such as tungsten doped silicide (WSix), cobalt silicide (CoSi)2) Nickel silicide (NixSiy), etc., preferably nickel silicide (NixSiy) is used, and the invention is not limited to the material of the electrically programmable fuse.
And, the electrically programmable fuse can be programmed with a programming voltage and a programming current that vary according to the material and process dimensions of the electrically programmable fuse. For example, when cobalt silicide (CoSi) is used2) When the process size is 0.18m, the programming current requires 12mA, and the programming voltage requires 5V; when the process size is 0.13m, the programming current requires 10mA, and the programming voltage requires 3.5V. When nickel silicide (NixSiy) is used, a programming voltage of only 1.5V and a programming current of 7mA are required.
Specifically, the low dropout regulator LDO 200 may adopt an existing mature LDO IP, and may adopt two types of LDOs, a fixed output voltage and an adjustable output voltage, as required.
In this embodiment, a conventional LDO is used, and illustratively, the specific structure of the output stage circuit thereof is as shown in fig. 2, and includes a PMOS transistor 210 and at least one resistor, specifically, the gate of the PMOS transistor 210 is connected to an input signal from a superior circuit, the source is connected to a supply voltage, the supply voltage can be selected according to needs, for example, 2.5V, the drain is connected to the at least one resistor, and the other end of the at least one resistor is connected to a ground voltage. Taking the at least one resistor including two resistors, i.e., the first resistor 220 and the second resistor 230, the output stage circuit of the LDO includes a PMOS transistor 210, and the first resistor 220 and the second resistor 230. Specifically, the first resistor 220 and the second resistor 230 are connected in series, and then one end of the series connection is connected to the drain of the PMOS transistor 210, and the other end is connected to the ground voltage. The output terminal of the output stage circuit is connected to the electrically programmable fuse circuit 100 from the drain of the PMOS transistor 210.
The voltage stabilizing unit 300, connected to the output terminal of the LDO, is controlled to be enabled by a clock pulse control signal L2, for weakening a ripple of the output voltage of the LDO.
The working principle is as follows: when the programming has not occurred, the voltage stabilization unit 300 starts to operate first, at which time the current output from the low dropout linear regulator LDO 200 increases from a few microamps (illustratively, 0.1 to 9.9 microamps) to a few milliamps (illustratively, 0.1 to 9.9 milliamps), and then when the clock control signal L1 becomes a high level, the electrically programmable fuse circuit 100 starts to program, whose programming current changes from a few milliamps (illustratively, 0.1 to 9.9 milliamps) to a few tens of milliamps (illustratively, 1 to 99.9 milliamps), because the clock control signal L2 of the voltage stabilization unit 300 is one system clock cycle earlier than the clock control signal L1 of the electrically programmable fuse circuit 100, the former current changing by a thousand times, thereby weakening the ripple generated when the latter current changes.
For example, the voltage stabilizing unit 300 may include an NMOS transistor 310 and at least one resistor. Taking an example of including a resistor, the voltage stabilizing unit 300 includes an NMOS tube 310 and a resistor 320, wherein a gate of the NMOS tube 310 is used for inputting the clock pulse control signal L2, a source is connected to one end of the resistor, a drain is connected to an output end of the LDO, and another end of the resistor is connected to a ground voltage.
Of course, the voltage stabilizing unit 300 of the present invention may have other structures as long as the effect of weakening the output voltage ripple of the LDO is achieved.
According to embodiment 2 of the present invention, there is provided a method for programming an electrically programmable fuse circuit by using the above voltage stabilizing circuit, and as shown in fig. 3, a flowchart of the method specifically includes the following steps:
step S1: the LDO 200 outputs a power voltage and a power current;
in this step, the low dropout regulator LDO 200 provides a power voltage and a power current to the electrically programmable fuse circuit 100, where the power voltage and the power voltage are both very small, for example, the power voltage may be 2.5 volts, and the power current may be several microamps or tens of microamps;
step S2: the clock control signal L2 controls the voltage stabilization unit 300 to start operating.
In this step, when the clock control signal L2 goes high, the voltage stabilizing unit 300 starts operating. After the voltage stabilizing unit 300 starts to operate, the output current of the low dropout regulator LDO 200 increases, for example, from a few microamps (e.g., 0.1-9.9 microamps) to a few milliamps (e.g., 0.1-9.9 milliamps), i.e., the current varies by a factor of thousand.
Step S3: the clock control signal L1 controls the electrically programmable fuse circuit 100 to start programming and store data, and the low dropout regulator LDO 200 outputs a programming voltage and a programming current.
The clock pulse control signal L1 can be generated by methods known in the art, and is illustratively generated by digital circuits. The pulse width of the clock control signal L1 is determined by the parameters of the electrically programmable fuse circuit 100.
In this step, when the clock control signal L1 goes high, the electrically programmable fuse circuit 100 starts to write and store data, and the output current of the low dropout linear regulator LDO 200 further increases, for example, from several milliamperes (illustratively, 0.1 to 9.9 milliamperes) to several tens of milliamperes (illustratively, 1 to 99.9 milliamperes). The current of the former is changed by thousands of times, so that the ripple generated by the current change of the latter is weakened.
It can be seen from the above steps that the voltage stabilization unit 300 starts to operate first, then the electrically programmable fuse circuit 100 starts to write again, and the clock control signal L2 is earlier than the clock control signal L1 by at least one system clock period.
The voltage stabilizing unit starts to work first, and the clock pulse control signal L2 of the voltage stabilizing unit is at least one system clock period ahead of the clock pulse control signal L1 of the electrically programmable fuse circuit, so that the output ripple of the low dropout regulator LDO can be effectively weakened, no additional device is introduced, only the existing signal and voltage are utilized, the cost is not increased, and the occupied area is small.
As shown in fig. 4, a waveform comparison diagram of the programming voltage of the voltage stabilizing circuit of the voltage stabilizing unit of the present invention and the circuit without the voltage stabilizing unit is shown, wherein the abscissa represents time and the ordinate represents the magnitude of the programming voltage. Wherein, (A) is the voltage waveform diagram of the circuit without voltage stabilizing unit, and (B) is the voltage waveform diagram of the circuit with voltage stabilizing unit. The curve (1) is a pulse voltage waveform curve of the clock pulse control signal L1, the curve (2) is a pulse voltage waveform curve of the clock pulse control signal L2, the curve (a) is a programming voltage waveform curve of a circuit without a voltage stabilizing unit, and the curve (b) is a programming voltage waveform curve of a circuit with a voltage stabilizing unit. It can be seen from the waveform that the pull-down ripple is at least promoted by 50mV, and the effect of weakening the voltage ripple is very obvious.
The present invention has been illustrated by the above embodiments, but it should be understood that the above embodiments are for illustrative and descriptive purposes only and are not intended to limit the invention to the scope of the described embodiments. Furthermore, it will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, and that many variations and modifications may be made in accordance with the teachings of the present invention, which variations and modifications are within the scope of the present invention as claimed. The scope of the invention is defined by the appended claims and equivalents thereof.
Claims (9)
1. A voltage stabilization circuit, comprising:
the output end of the low dropout linear voltage regulator is connected to the electric programmable fuse circuit and is used for providing power supply voltage for the electric programmable fuse circuit;
a voltage stabilizing unit connected to the output terminal of the low dropout linear regulator for weakening ripples of an output voltage of the low dropout linear regulator,
the electric programmable fuse circuit is controlled by a first clock pulse control signal to perform programming, and the voltage stabilizing unit is controlled by a second clock pulse control signal to enable.
2. The voltage stabilization circuit of claim 1, wherein the second clock pulse control signal is at least one system clock period ahead of the first clock pulse control signal.
3. The voltage stabilizing circuit of claim 2, wherein the voltage stabilizing unit comprises an NMOS transistor and at least one first resistor, wherein a gate of the NMOS transistor is connected to the second clock control signal, a source of the NMOS transistor is connected to one end of the first resistor, a drain of the NMOS transistor is connected to the output terminal of the low dropout linear regulator, and another end of the first resistor is connected to a ground voltage.
4. The voltage stabilization circuit of claim 2, wherein the voltage stabilization unit starts operating first and then the electrically programmable fuse circuit starts programming.
5. The voltage stabilizing circuit according to claim 1, wherein the output stage circuit of the low dropout linear regulator comprises a PMOS transistor and at least one second resistor, wherein the gate of the PMOS transistor is connected to the input signal, the source is connected to the supply voltage, the drain is connected to the second resistor, the other end of the second resistor is connected to the ground voltage, and the output terminal of the low dropout linear regulator is connected to the drain of the PMOS transistor.
6. The voltage stabilization circuit of claim 1, wherein the first clock pulse control signal is generated by a digital circuit having a pulse width determined by parameters of an electrically programmable fuse in the electrically programmable fuse circuit.
7. A method of programming an electrically programmable fuse circuit using the circuit of any of claims 1-6, comprising the steps of:
the low dropout linear regulator outputs power supply voltage and power supply current;
the second clock pulse control signal controls the voltage stabilizing unit to start working;
the first clock pulse control signal controls the electrically programmable fuse circuit to start programming and store data, and the low dropout linear regulator outputs programming voltage and programming current.
8. The programming method of claim 7, wherein the second clock pulse control signal is advanced by at least one system clock period from the first clock pulse control signal.
9. The programming method according to claim 7, wherein the supply current output by the low dropout regulator is changed from 0.1 to 9.9 microampere to 0.1 to 9.9 milliamp when the voltage stabilization unit starts operating, and the programming current output by the low dropout regulator is changed from 0.1 to 9.9 milliamp to 1 to 99.9 milliamp when the electrically programmable fuse circuit starts operating.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610841539.9A CN107863129B (en) | 2016-09-22 | 2016-09-22 | Circuit and method for programming electrically programmable fuse circuit by using same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610841539.9A CN107863129B (en) | 2016-09-22 | 2016-09-22 | Circuit and method for programming electrically programmable fuse circuit by using same |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN107863129A CN107863129A (en) | 2018-03-30 |
| CN107863129B true CN107863129B (en) | 2020-09-29 |
Family
ID=61698920
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610841539.9A Active CN107863129B (en) | 2016-09-22 | 2016-09-22 | Circuit and method for programming electrically programmable fuse circuit by using same |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN107863129B (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105094193A (en) * | 2014-05-04 | 2015-11-25 | 中芯国际集成电路制造(上海)有限公司 | Low differential pressure voltage stabilizer |
| CN205263698U (en) * | 2015-12-29 | 2016-05-25 | 天津大学 | LDO circuit of low quiescent current and drive heavy load suitable for power management |
| CN105912059A (en) * | 2016-05-23 | 2016-08-31 | 深圳创维－Rgb电子有限公司 | Reference voltage regulating circuit and system of integrated circuit |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7236418B2 (en) * | 2004-06-25 | 2007-06-26 | Qualcomm Incorporated | Reduced area, reduced programming voltage CMOS eFUSE-based scannable non-volatile memory bitcell |
| TWI447738B (en) * | 2010-10-01 | 2014-08-01 | Vanguard Int Semiconduct Corp | Poly fuse burning system |
-
2016
- 2016-09-22 CN CN201610841539.9A patent/CN107863129B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105094193A (en) * | 2014-05-04 | 2015-11-25 | 中芯国际集成电路制造(上海)有限公司 | Low differential pressure voltage stabilizer |
| CN205263698U (en) * | 2015-12-29 | 2016-05-25 | 天津大学 | LDO circuit of low quiescent current and drive heavy load suitable for power management |
| CN105912059A (en) * | 2016-05-23 | 2016-08-31 | 深圳创维－Rgb电子有限公司 | Reference voltage regulating circuit and system of integrated circuit |
Non-Patent Citations (1)
| Title |
|---|
| 应用于宽电压范围Efuse电路设计;徐丽;《中国优秀硕士学位论文全文数据库信息科技辑》;中国学术期刊（光盘版）电子杂志社;20130315(第3期);12-27页 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN107863129A (en) | 2018-03-30 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN108140410B (en) | Circuit and method for monitoring an associated electronic switch | |
| TWI621124B (en) | Control voltage searching method for non-volatile memory | |
| JP7422205B2 (en) | Device and method for accessing variable resistance elements in variable resistance element array | |
| JP4707841B2 (en) | Voltage regulator circuit and semiconductor memory device | |
| US20100264899A1 (en) | Semiconductor device generating voltage for temperature compensation | |
| US6411554B1 (en) | High voltage switch circuit having transistors and semiconductor memory device provided with the same | |
| CN102097131A (en) | Voltage generation circuit | |
| US11657881B2 (en) | Dynamic reference current memory array and method | |
| EP1892600A1 (en) | Voltage regulator for non-volatile memories implemented with low-voltage transistors | |
| US9054683B2 (en) | Boosting circuit | |
| KR20150050880A (en) | Voltage regulator and apparatus for controlling bias current | |
| JP2009003886A (en) | Voltage regulator circuit | |
| JP2008084523A (en) | Flash memory array of low voltage and low capacitance | |
| CN108346449B (en) | eFuse storage circuit | |
| KR101618732B1 (en) | Multi-time programmable memory for power management ic | |
| US7885118B2 (en) | Flash memory device and voltage generating circuit for the same | |
| US7764108B2 (en) | Electrical fuse circuit | |
| CN107863129B (en) | Circuit and method for programming electrically programmable fuse circuit by using same | |
| TWI606445B (en) | Resistive random access memory (reram) and conductive bridging random access memory (cbram) cross coupled fuse and read method and system | |
| KR100723519B1 (en) | Voltage clamping circuit using mos transister and semiconductor chip having the same | |
| US7596029B2 (en) | Flash memory device including unified oscillation circuit and method of operating the device | |
| CN111488026B (en) | Power supply voltage stabilizing circuit | |
| CN100514495C (en) | Write operation circuit and method applied in nonvolatile separate gate memory | |
| KR100825021B1 (en) | Inner-voltage generator | |
| KR20040006416A (en) | Method of trimming reference voltage of a flash memory cell and apparatus of trimming reference voltage of a flash memory cell |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |