CN107766213A - A kind of method and system for realizing NVME hard disk lightings - Google Patents
A kind of method and system for realizing NVME hard disk lightings Download PDFInfo
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- CN107766213A CN107766213A CN201710911673.6A CN201710911673A CN107766213A CN 107766213 A CN107766213 A CN 107766213A CN 201710911673 A CN201710911673 A CN 201710911673A CN 107766213 A CN107766213 A CN 107766213A
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- hard disk
- pcie
- cpu
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- pcie switch
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/32—Monitoring with visual or acoustical indication of the functioning of the machine
- G06F11/324—Display of status information
- G06F11/325—Display of status information by lamps or LED's
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
- G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
Abstract
The invention provides a kind of method and system for realizing NVME hard disk lightings, increase PCIE Switch chips between CPU and NVME hard disks, expand greater number of NVME disk ends, connect more NVME hard disks, and the control command of development system application layer hard disk indication lamp, by this order in the driving bag of PCIE Switch chips, disk state information and hard disk lighting information are transmitted by PCIE buses between CPU and PCIE Switch, hard disk lighting information parses corresponding hard disk indication lamp control information by PCIE Switch I2C buses by CPLD, indicator lamp is lighted in hard disk failure.Pass through NVME hard disks lighting of the present invention, solves the problems, such as the quantity for limiting NVME hard disks, can arrange in pairs or groups corresponding hard disk quantity according to product demand, omit address PIN on the port hardware circuit of each NVME hard disks connection upper level equipment, design complexities are reduced, relieve limitations of the PIN to hard disk quantity.
Description
Technical field
The present invention relates to the technical field of server, and in particular to a kind of method and system for realizing NVME hard disk lightings.
Background technology
For storage server product based on storing, a storage server product would generally extend 10, more than 20
Hard disk, or even can be more.With storage product technology upgrading, hard-disk interface commonly used at present has two kinds of SAS and NVME to connect
Mouth hard disk, what NVME interfaces were walked is PCIE buses, and NVME hard disks have greatly the trend of gradually substitution SAS hard disks.
On current server product NVME hard disks quantity it is also fewer, such as：4 or 8, now, only need
Will be by the direct-connected NVME hard disks of CPU.And the indicator lamp of hard disk is also directly to be controlled by CPU.But produced for storage server
On product, hard disk quantity is more, and CPU itself PCIE port numbers are limited, and direct-connected hard disk manner can not be realized.Intermediate demand adds
The extended chips of PCIE buses, which is realized, extends multiple hard disks, this extended chip we be referred to as PCIE Switch.Now use again
Control hard disk lamp direct-connected CPU, it is clear that can not also realize.
The direct-connected NVME hard disks of current CPU, can directly control the hard disk quantity of hard disk lamp very limited.Prior art is realized
During hard disk lighting function, the PCIE ports of CPU corresponding to the connection of each hard disk add design, it is necessary to set specific address
Complexity.And the lighting agreements of CPU in itself limit the quantity of lighting, equally also limit server can carry NVME hard disks
The development of quantity.
The content of the invention
Based on above mentioned problem, the present invention proposes a kind of method and system for realizing NVME hard disk lightings, of the invention
NVME lighting modes are arranged in pairs or groups software development, and more hard disk indication lamps controls can be achieved.
The present invention provides following technical scheme：
On the one hand, the invention provides a kind of method for realizing NVME hard disk lightings, including：
Step 101, CPU is connected to PCIE Switch chips, the PCIE Switch by least one PCIE buses
Chip is divided into N number of PCIE buses and is connected to N number of hard disk by fixed connector；The N is more than or equal to 1；
Step 102, the PCIE Switch chips are connected to CPLD by I2C bus runs, and the CPLD is divided into N number of IO letters
Number N number of hard disk indication lamp of connection；
Step 103, when hard disk n breaks down, the PCIE Switch chips recognize hard disk n event by PCIE buses n
Barrier, and fault message is passed into the CPU by PCIE buses, then fault message is sent to system by the CPU and answered
With layer；The n is more than or equal to 1 and is less than or equal to N；
Step 104, the system application layer receives the fault message, order is issued into the CPU, the CPU passes through
PCIE buses send the order bag for including lighting information to the PCIE Switch chips, the PCIE Switch chips
The order bag is sent to the CPLD by I2C bus protocols；
Step 105, the CPLD will light hard disk n indicator lamps by I/O port n.
Wherein, the PCIE Switch chips obtain the shape of each hard disk by being connected to the PCIE buses of each hard disk
State information, the status information include fault message.
Wherein, PCIE Switch chips are divided into after N number of PCIE buses are connected to N number of hard disk by fixed connector, often
Individual hard disk is connected to PCIE Switch port numbers and fixed.
Wherein, the CPLD obtains two information by parsing the order bag, and described two information are that hard disk n event occurs
Hinder and light hard disk n indicator lamps.
In addition, present invention also offers a kind of system for realizing NVME hard disk lightings, the system includes：
First link block, PCIE Switch chips are connected to by least one PCIE buses for CPU, it is described
PCIE Switch chips are divided into N number of PCIE buses and are connected to N number of hard disk by fixed connector；The N is more than or equal to 1；
Second link block, CPLD is connected to by I2C bus runs for the PCIE Switch chips, the CPLD is divided into N number of
I/O signal connects N number of hard disk indication lamp；
Failure acquisition module, for when hard disk n breaks down, the PCIE Switch chips to be recognized by PCIE buses n
Hard disk n failure, and fault message is passed into the CPU by PCIE buses, then sent fault message by the CPU
To system application layer；The n is more than or equal to 1 and is less than or equal to N；
Order sending module, the fault message is received for the system application layer, order is issued to the CPU, it is described
CPU is sent the order bag for including lighting information to the PCIE Switch chips, the PCIE by PCIE buses
Switch chips send the order bag to the CPLD by I2C bus protocols；
Indicating lamp module, hard disk n indicator lamps will be lighted by I/O port n for the CPLD.
Wherein, the PCIE Switch chips obtain the shape of each hard disk by being connected to the PCIE buses of each hard disk
State information, the status information include fault message.
Wherein, PCIE Switch chips are divided into after N number of PCIE buses are connected to N number of hard disk by fixed connector, often
Individual hard disk is connected to PCIE Switch port numbers and fixed.
Wherein, the CPLD obtains two information by parsing the order bag, and described two information are that hard disk n event occurs
Hinder and light hard disk n indicator lamps.
The invention provides a kind of method and system for realizing NVME hard disk lightings, increase between CPU and NVME hard disks
PCIE Switch chips, greater number of NVME disk ends are expanded, connect more NVME hard disks, and development system should
With the control command of layer hard disk indication lamp, by this order in the driving bag of PCIE Switch chips, CPU and PCIE
Disk state information and hard disk lighting information are transmitted by PCIE buses between Switch, hard disk lighting information is by PCIE
Switch I2C buses parse corresponding hard disk indication lamp control information by CPLD, and indicator lamp is lighted in hard disk failure.
By NVME hard disks lighting of the present invention, solve the problems, such as the quantity for limiting NVME hard disks, can be arranged in pairs or groups according to product demand corresponding
Hard disk quantity, address PIN on the port hardware circuit of each NVME hard disks connection upper level equipment is omitted, reduces complex designing
Degree, relieves limitations of the PIN to hard disk quantity.
Brief description of the drawings
Fig. 1 is the NVME hard disk lighting topological diagrams of prior art；
Fig. 2 is flow chart of the method for the present invention；
Fig. 3 is the NVME hard disk lighting topological diagrams of the present invention.
Embodiment
Technical scheme in order to illustrate the embodiments of the present invention more clearly, it will use below required in embodiment
Accompanying drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the present invention, for ability
For the those of ordinary skill of domain, on the premise of not paying creative work, it can also be obtained according to these accompanying drawings other attached
Figure.
Prior art NVME hard disks lighting topological diagram as shown in Figure 1, the board where board and hard disk where CPU lead to
Cable connection is crossed, PCIE buses, and address information are included in each cable.CPU PCIE bus numbers are limited, then
The quantity for the NVME hard disks that CPU can extend is exactly conditional.This explains specific hard disk point exemplified by sentencing four hard disk quantity
Lamp principle.CPU is believed by four direct-connected NVME hard disks of cable for including PCIE buses in four cables comprising different addresses
Breath.
After cable accesses, the address information of each hard disk is fixed.CPU obtains hard disk by the PCIE buses in cable
Status information.CPU sends hard disk indication lamp control information to CPLD by I2C, and the address information of hard disk is included in this information.
CPLD is by judging address information, for example is that the hard disk of address 1 breaks down, find out corresponding to hard disk indication lamp control IO ends
Mouthful, it is I/O port 1, then sends this information by IO1 ports, controls the indicator lamp of hard disk 1.Because CPU PCIE number of buses
Amount limitation and the distribution of number of addresses limit, the hard disk limited amount that this scheme can connect.
Based on above-mentioned, on the one hand, embodiments of the present invention provide a kind of method for realizing NVME hard disk lightings, accompanying drawing
2 be flow chart of the method for the present invention, and accompanying drawing 3 is NVME hard disk lighting topological diagrams of the invention, including：
Step 101, CPU is connected to PCIE Switch chips, the PCIE Switch by least one PCIE buses
Chip is divided into N number of PCIE buses and is connected to N number of hard disk by fixed connector；The N is more than or equal to 1；
The N can be the positive integers for being more than or equal to 1 such as 1,2,3, can be set according to actual conditions.
When storage server product requirement carries more NVME hard disks, quantity may be more than 10,20, even
More, now the PCIE port numbers of CPU in itself be insufficient for so big quantity the connection of NVME hard disks, it is necessary to CPU with
Increase one or more PCIE Switch chips between NVME hard disks, it is different according to the different hard disk quantitative requirement of product, collocation
PCIE Switch chips.Now product, which can be realized, supports greater number of NVME hard disks.
Connected between CPU and PCIE Switch chips by PCIE buses, PCIE Switch chips expand multiple
PCIE buses are connected on multiple NVME hard disks.PCIE Switch chips are connected to CPLD by I2C buses, and CPLD passes through IO
Port is connected to the indicator lamp of each hard disk.PCIE Switch chips are obtained often by being connected to the PCIE buses of each hard disk
The status information of individual hard disk includes fault message.
As shown in Figure 3, the situation when N is 4 is listed, such a scheme can be expanded out multiple according to actual product needs
Hard disk, this sentences explanation specific implementation principle exemplified by four hard disk quantity.CPU is connected to by one or more PCIE buses
PCIE Switch chips, PCIE Switch chips are divided into four PCIE buses and are connected to four firmly by fixed connector
Disk.Each hard disk is connected to PCIE Switch port numbers therefore fixed.
Step 102, the PCIE Switch chips are connected to CPLD by I2C bus runs, and the CPLD is divided into N number of
I/O signal connects N number of hard disk indication lamp；
PCIE Switch chips are connected to CPLD by I2C bus runs, and CPLD is divided into four I/O signals and connects four firmly
The indicator lamp of disk.
Step 103, when hard disk n breaks down, the PCIE Switch chips recognize hard disk n by PCIE buses n
Failure, and fault message is passed into the CPU by PCIE buses, then sent fault message to being by the CPU
System application layer；The n is more than or equal to 1 and is less than or equal to N；
System application layer is the operation system of software based on CPU.When hard disk 1 breaks down, PCIE Switch chips lead to
The failure that PCIE buses 1 recognize hard disk 1 is crossed, and this fault message is passed into CPU by PCIE buses 0.So as to reach
The system application layer of the superiors.
Step 104, the system application layer receives the fault message, order is issued into the CPU, the CPU leads to
PCIE buses are crossed to send the order bag for including lighting information to the PCIE Switch chips, the PCIE Switch cores
Piece sends the order bag to the CPLD by I2C bus protocols；
This status information is uploaded to CPU by PCIE Switch chips, then rises to system application layer.In order to realize pair
The control of all hard disks, system application layer are needed to develop the control command of hard disk indication lamp, and this order is included in into PCIE
In the driving bag of Switch chips.When system application layer needs to perform lighting operation to hard disk, system application layer passes through PCIE
Bus sends order bag to PCIE Switch chips, and the instruction-level of I2C agreements is included in order bag.
System application layer receives after fault message, it is necessary to hard disk failure indicator lamp corresponding to lighting.System application layer will
Order is issued to CPU, and the order bag for including lighting information is sent to PCIE Switch chips by CPU by PCIE buses 0,
This order bag is sent to CPLD by PCIE Switch chips by I2C bus protocols, and CPLD obtains two by parsing this order bag
Individual information, an information are the hard disk failures that numbering is 1, and another information is to need to light this indicator lamp.CPLD is received
I2C bus protocol analysis is realized into corresponding indicator lamp into corresponding I/O port signal condition after to the instruction-level of this I2C bus
Status and appearance.
Step 105, the CPLD will light hard disk n indicator lamps by I/O port n.
CPLD will light the indicator lamp of hard disk 1 by IO1 ports.Command stream is completed.Technical scheme can be applied
In on all storage class server products.
The invention provides a kind of method for realizing NVME hard disk lightings, increase PCIE between CPU and NVME hard disks
Switch chips, greater number of NVME disk ends are expanded, connect more NVME hard disks, and development system application layer is hard
The control command of disk indicator lamp, by this order in the driving bag of PCIE Switch chips, CPU and PCIE Switch it
Between by PCIE buses transmit disk state information and hard disk lighting information, hard disk lighting information it is total by PCIE Switch I2C
Line parses corresponding hard disk indication lamp control information by CPLD, and indicator lamp is lighted in hard disk failure.Pass through the present invention
NVME hard disk lightings, solves the problems, such as the quantity for limiting NVME hard disks, can arrange in pairs or groups corresponding hard disk quantity according to product demand, save
Address PIN on the port hardware circuit of slightly each NVME hard disks connection upper level equipment, reduces design complexities, relieves PIN
Limitation to hard disk quantity.
On the other hand, embodiments of the present invention provide a kind of system for realizing NVME hard disk lightings, and accompanying drawing 3 is this hair
Bright system architecture diagram, the system include：
First link block 201, PCIE Switch chips are connected to by least one PCIE buses for CPU, it is described
PCIE Switch chips are divided into N number of PCIE buses and are connected to N number of hard disk by fixed connector；The N is more than or equal to 1；
The N can be the positive integers for being more than or equal to 1 such as 1,2,3, can be set according to actual conditions.
When storage server product requirement carries more NVME hard disks, quantity may be more than 10,20, even
More, now the PCIE port numbers of CPU in itself be insufficient for so big quantity the connection of NVME hard disks, it is necessary to CPU with
Increase one or more PCIE Switch chips between NVME hard disks, it is different according to the different hard disk quantitative requirement of product, collocation
PCIE Switch chips.Now product, which can be realized, supports greater number of NVME hard disks.
Connected between CPU and PCIE Switch chips by PCIE buses, PCIE Switch chips expand multiple
PCIE buses are connected on multiple NVME hard disks.PCIE Switch chips are connected to CPLD by I2C buses, and CPLD passes through IO
Port is connected to the indicator lamp of each hard disk.PCIE Switch chips are obtained often by being connected to the PCIE buses of each hard disk
The status information of individual hard disk includes fault message.
As shown in Figure 3, the situation when N is 4 is listed, such a scheme can be expanded out multiple according to actual product needs
Hard disk, this sentences explanation specific implementation principle exemplified by four hard disk quantity.CPU is connected to by one or more PCIE buses
PCIE Switch chips, PCIE Switch chips are divided into four PCIE buses and are connected to four firmly by fixed connector
Disk.Each hard disk is connected to PCIE Switch port numbers therefore fixed.
Second link block 202, CPLD is connected to by I2C bus runs for the PCIE Switch chips, it is described
CPLD is divided into N number of I/O signal and connects N number of hard disk indication lamp；
PCIE Switch chips are connected to CPLD by I2C bus runs, and CPLD is divided into four I/O signals and connects four firmly
The indicator lamp of disk.
Failure acquisition module 203, for when hard disk n breaks down, the PCIE Switch chips to pass through PCIE buses
N recognizes hard disk n failure, and fault message passed into the CPU by PCIE buses, then by the CPU by failure
Information is sent to system application layer；The n is more than or equal to 1 and is less than or equal to N；
System application layer is the operation system of software based on CPU.When hard disk 1 breaks down, PCIE Switch chips lead to
The failure that PCIE buses 1 recognize hard disk 1 is crossed, and this fault message is passed into CPU by PCIE buses 0.So as to reach
The system application layer of the superiors.
Order sending module 204, the fault message is received for the system application layer, order is issued to described
CPU, the CPU are sent the order bag for including lighting information to the PCIE Switch chips by PCIE buses, described
PCIE Switch chips send the order bag to the CPLD by I2C bus protocols；
This status information is uploaded to CPU by PCIE Switch chips, then rises to system application layer.In order to realize pair
The control of all hard disks, system application layer are needed to develop the control command of hard disk indication lamp, and this order is included in into PCIE
In the driving bag of Switch chips.When system application layer needs to perform lighting operation to hard disk, system application layer passes through PCIE
Bus sends order bag to PCIE Switch chips, and the instruction-level of I2C agreements is included in order bag.
System application layer receives after fault message, it is necessary to hard disk failure indicator lamp corresponding to lighting.System application layer will
Order is issued to CPU, and the order bag for including lighting information is sent to PCIE Switch chips by CPU by PCIE buses 0,
This order bag is sent to CPLD by PCIE Switch chips by I2C bus protocols, and CPLD obtains two by parsing this order bag
Individual information, an information are the hard disk failures that numbering is 1, and another information is to need to light this indicator lamp.CPLD is received
I2C bus protocol analysis is realized into corresponding indicator lamp into corresponding I/O port signal condition after to the instruction-level of this I2C bus
Status and appearance.
Indicating lamp module 205, hard disk n indicator lamps will be lighted by I/O port n for the CPLD.
CPLD will light the indicator lamp of hard disk 1 by IO1 ports.Command stream is completed.Technical scheme can be applied
In on all storage class server products.
The invention provides a kind of system for realizing NVME hard disk lightings, increase PCIE between CPU and NVME hard disks
Switch chips, greater number of NVME disk ends are expanded, connect more NVME hard disks, and development system application layer is hard
The control command of disk indicator lamp, by this order in the driving bag of PCIE Switch chips, CPU and PCIE Switch it
Between by PCIE buses transmit disk state information and hard disk lighting information, hard disk lighting information it is total by PCIE Switch I2C
Line parses corresponding hard disk indication lamp control information by CPLD, and indicator lamp is lighted in hard disk failure.Pass through the present invention
NVME hard disk lightings, solves the problems, such as the quantity for limiting NVME hard disks, can arrange in pairs or groups corresponding hard disk quantity according to product demand, save
Address PIN on the port hardware circuit of slightly each NVME hard disks connection upper level equipment, reduces design complexities, relieves PIN
Limitation to hard disk quantity.
The foregoing description of the disclosed embodiments, those skilled in the art are enable to realize or using the present invention.To this
A variety of modifications of a little embodiments will be apparent for a person skilled in the art, and generic principles defined herein can
Without departing from the spirit or scope of the present invention, to realize in other embodiments.Therefore, the present invention will not be limited
The embodiments shown herein is formed on, but meets the most wide model consistent with principles disclosed herein and features of novelty
Enclose.
Claims (8)
- A kind of 1. method for realizing NVME hard disk lightings, it is characterised in that：Step 101, CPU is connected to PCIE Switch chips, the PCIE Switch chips by least one PCIE buses It is divided into N number of PCIE buses and N number of hard disk is connected to by fixed connector；The N is more than or equal to 1；Step 102, the PCIE Switch chips are connected to CPLD by I2C bus runs, and the CPLD is divided into N number of IO letters Number N number of hard disk indication lamp of connection；Step 103, when hard disk n breaks down, the PCIE Switch chips recognize hard disk n event by PCIE buses n Barrier, and fault message is passed into the CPU by PCIE buses, then fault message is sent to system by the CPU and answered With layer；The n is more than or equal to 1 and is less than or equal to N；Step 104, the system application layer receives the fault message, order is issued into the CPU, the CPU passes through PCIE buses send the order bag for including lighting information to the PCIE Switch chips, the PCIE Switch chips The order bag is sent to the CPLD by I2C bus protocols；Step 105, the CPLD will light hard disk n indicator lamps by I/O port n.
- 2. according to the method for claim 1, it is characterised in that：The PCIE Switch chips are each hard by being connected to The PCIE buses of disk obtain the status information of each hard disk, and the status information includes fault message.
- 3. according to the method for claim 1, it is characterised in that：PCIE Switch chips are divided into N number of PCIE buses and passed through admittedly After fixed connector is connected to N number of hard disk, each hard disk is connected to PCIE Switch port numbers and fixed.
- 4. according to the method for claim 1, it is characterised in that：The CPLD obtains two letters by parsing the order bag Breath, described two information are that hard disk n breaks down and lighted hard disk n indicator lamps.
- A kind of 5. system for realizing NVME hard disk lightings, it is characterised in that：The system includes：First link block, PCIE Switch chips, the PCIE are connected to by least one PCIE buses for CPU Switch chips are divided into N number of PCIE buses and are connected to N number of hard disk by fixed connector；The N is more than or equal to 1；Second link block, CPLD is connected to by I2C bus runs for the PCIE Switch chips, the CPLD divides N number of hard disk indication lamp is connected into N number of I/O signal；Failure acquisition module, for when hard disk n breaks down, the PCIE Switch chips to be recognized by PCIE buses n Hard disk n failure, and fault message is passed into the CPU by PCIE buses, then sent fault message by the CPU To system application layer；The n is more than or equal to 1 and is less than or equal to N；Order sending module, the fault message is received for the system application layer, order is issued to the CPU, it is described CPU is sent the order bag for including lighting information to the PCIE Switch chips, the PCIE by PCIE buses Switch chips send the order bag to the CPLD by I2C bus protocols；Indicating lamp module, hard disk n indicator lamps will be lighted by I/O port n for the CPLD.
- 6. system according to claim 5, it is characterised in that：The PCIE Switch chips are each hard by being connected to The PCIE buses of disk obtain the status information of each hard disk, and the status information includes fault message.
- 7. system according to claim 5, it is characterised in that：PCIE Switch chips are divided into N number of PCIE buses and passed through admittedly After fixed connector is connected to N number of hard disk, each hard disk is connected to PCIE Switch port numbers and fixed.
- 8. system according to claim 5, it is characterised in that：The CPLD obtains two letters by parsing the order bag Breath, described two information are that hard disk n breaks down and lighted hard disk n indicator lamps.
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| CN108680872A (en) * | 2018-04-02 | 2018-10-19 | 郑州云海信息技术有限公司 | A kind of test method suitable for NVME hard disk backboard status lamps |
| CN108777897A (en) * | 2018-05-30 | 2018-11-09 | 郑州云海信息技术有限公司 | A kind of general PCIE device ignition method and system |
| CN108845763A (en) * | 2018-05-30 | 2018-11-20 | 郑州云海信息技术有限公司 | A kind of system and method for managing disk state concentratedly |
| CN108959031A (en) * | 2018-06-29 | 2018-12-07 | 郑州云海信息技术有限公司 | A kind of NVME backboard lighting control method thereof, system, medium and equipment |
| CN109032894A (en) * | 2018-07-26 | 2018-12-18 | 郑州云海信息技术有限公司 | A kind of direct-connected hard disk method, apparatus of sg3_utils tool, equipment and storage medium |
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| CN109086081A (en) * | 2018-06-29 | 2018-12-25 | 深圳市同泰怡信息技术有限公司 | Method, system and the medium that a kind of instantly prompting SATA and NVMe equipment change in place |
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| CN109815175A (en) * | 2019-01-08 | 2019-05-28 | 郑州云海信息技术有限公司 | A kind of general NVME hard disk lighting control device and method |
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| CN111078600A (en) * | 2019-11-15 | 2020-04-28 | 苏州浪潮智能科技有限公司 | PCIe Switch-based RSSD large-capacity storage system |
| CN111198831A (en) * | 2019-12-27 | 2020-05-26 | 苏州浪潮智能科技有限公司 | NVME hard disk management system and method based on uninstalling card |
| WO2021017232A1 (en) * | 2019-07-29 | 2021-02-04 | 苏州浪潮智能科技有限公司 | Method and system for flexible deployment and easy cpld management of backplane |
| CN113204474A (en) * | 2021-04-25 | 2021-08-03 | 山东英信计算机技术有限公司 | Lighting method, device and equipment based on AMD platform and readable medium |
| CN113220544A (en) * | 2021-04-30 | 2021-08-06 | 山东英信计算机技术有限公司 | Method, system and medium for lighting NVMe (network video recorder) hard disk of server |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN206003079U (en) * | 2016-07-29 | 2017-03-08 | 浪潮集团有限公司 | A kind of PCIe link malfunction monitoring framework of server |
| CN106970866A (en) * | 2017-03-13 | 2017-07-21 | 郑州云海信息技术有限公司 | A kind of disk monitor system and method |
| CN107203448A (en) * | 2017-05-24 | 2017-09-26 | 郑州云海信息技术有限公司 | A kind of method and system of test PCIe switch chip violence warm connection functions |
-
2017
- 2017-09-29 CN CN201710911673.6A patent/CN107766213A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN206003079U (en) * | 2016-07-29 | 2017-03-08 | 浪潮集团有限公司 | A kind of PCIe link malfunction monitoring framework of server |
| CN106970866A (en) * | 2017-03-13 | 2017-07-21 | 郑州云海信息技术有限公司 | A kind of disk monitor system and method |
| CN107203448A (en) * | 2017-05-24 | 2017-09-26 | 郑州云海信息技术有限公司 | A kind of method and system of test PCIe switch chip violence warm connection functions |
Cited By (21)
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| CN109062753A (en) * | 2018-06-01 | 2018-12-21 | 新华三技术有限公司成都分公司 | A kind of hard disk monitoring system and monitoring method |
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| US11438987B2 (en) | 2018-06-29 | 2022-09-06 | Zhengzhou Yunhai Information Technology Co., Ltd. | Lighting control method, system and device for NVME backboard, and medium |
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| CN109815175A (en) * | 2019-01-08 | 2019-05-28 | 郑州云海信息技术有限公司 | A kind of general NVME hard disk lighting control device and method |
| CN110445731A (en) * | 2019-07-04 | 2019-11-12 | 苏州浪潮智能科技有限公司 | A kind of method, equipment and the readable medium of interchanger optical module I2C signal multiplexing |
| WO2021017232A1 (en) * | 2019-07-29 | 2021-02-04 | 苏州浪潮智能科技有限公司 | Method and system for flexible deployment and easy cpld management of backplane |
| US11461264B2 (en) | 2019-07-29 | 2022-10-04 | Inspur Suzhou Intelligent Technology Co., Ltd. | Method and system for flexible deployment and easy CPLD management of backplane |
| CN111078600B (en) * | 2019-11-15 | 2021-04-27 | 苏州浪潮智能科技有限公司 | PCIe Switch-based RSSD large-capacity storage system |
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| CN111198831A (en) * | 2019-12-27 | 2020-05-26 | 苏州浪潮智能科技有限公司 | NVME hard disk management system and method based on uninstalling card |
| CN113204474A (en) * | 2021-04-25 | 2021-08-03 | 山东英信计算机技术有限公司 | Lighting method, device and equipment based on AMD platform and readable medium |
| CN113204474B (en) * | 2021-04-25 | 2023-02-28 | 山东英信计算机技术有限公司 | Lighting method, device and equipment based on AMD platform and readable medium |
| CN113220544A (en) * | 2021-04-30 | 2021-08-06 | 山东英信计算机技术有限公司 | Method, system and medium for lighting NVMe (network video recorder) hard disk of server |
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Application publication date: 20180306 |