CN110445731A - A kind of method, equipment and the readable medium of interchanger optical module I2C signal multiplexing - Google Patents
A kind of method, equipment and the readable medium of interchanger optical module I2C signal multiplexing Download PDFInfo
- Publication number
- CN110445731A CN110445731A CN201910598589.2A CN201910598589A CN110445731A CN 110445731 A CN110445731 A CN 110445731A CN 201910598589 A CN201910598589 A CN 201910598589A CN 110445731 A CN110445731 A CN 110445731A
- Authority
- CN
- China
- Prior art keywords
- signal
- data
- clock sampling
- multiple optical
- sampling signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/10—Packet switching elements characterised by the switching fabric construction
- H04L49/109—Integrated on microchip, e.g. switch-on-chip
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/30—Peripheral units, e.g. input or output ports
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/35—Switches specially adapted for specific applications
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Optical Communication System (AREA)
Abstract
The invention discloses a kind of methods of interchanger optical module I2C signal multiplexing, comprising the following steps: I2C signal is transferred to driving chip by exchange chip, I2C signal includes clock sampling signal and data-signal；Clock sampling signal and data-signal are extended to multichannel respectively by driving chip；Multiple optical ports are respectively driven using the combination of clock sampling signal and data-signal after extension, wherein are used to every road clock sampling signal and data-signal to drive multiple optical ports.The invention also discloses a kind of computer equipment and readable storage medium storing program for executing.The method and device of interchanger optical module I2C signal multiplexing proposed by the present invention can control multiple optical ports using a driving chip, greatly reduce production cost under the premise of guaranteeing product quality.
Description
Technical field
The present invention relates to interchanger fields, more specifically, particularly relating to a kind of side of interchanger optical module I2C signal multiplexing
Method, equipment and readable medium.
Background technique
Interchanger exchange chip veneer optical interface is numerous, has currently existed 32 mouth switchs, 56 mouth switchs are even
More, therefore on exchange chip veneer required IIC number of signals is numerous.But if one drives excessive, letter on hardware device
Number quality such as driving capability and reflection etc. are by extreme influence.A drive excessively also has more the position of multiple ends simultaneously
Add strict requirements, the length difference of cabling needs to control in a very small range, otherwise easily generates to signal quality bad
Effect.The exchange chip veneer numerous as optical interface needs if all signals drive a topology using one using numerous
The cost of PCA9548 chip, product will greatly improve.
Summary of the invention
In view of this, the purpose of the embodiment of the present invention is a kind of method for proposing interchanger optical module I2C signal multiplexing
And device, mainly by being multiplexed to I2C signal, so that a driving chip can control multiple switch light
Port greatly reduces production cost under the premise of guaranteeing product quality.
Based on above-mentioned purpose, the one side of the embodiment of the present invention provides a kind of interchanger optical module I2C signal multiplexing
Method includes the following steps: that I2C signal is transferred to driving chip by exchange chip, and I2C signal includes clock sampling signal
And data-signal；Clock sampling signal and data-signal are extended to multichannel respectively by driving chip；Using after extension when
The combination of clock sampled signal and data-signal respectively drives multiple optical ports, wherein by every road clock sampling signal sum number it is believed that
It number is used to drive multiple optical ports.
In some embodiments, every road clock sampling signal and data-signal are used to drive multiple optical port packets
It includes: multiple optical ports being driven by the extension road Hou Mei clock sampling signal, multiple optical ports are adjacent.
In some embodiments, every road clock sampling signal and data-signal are used to drive multiple optical port packets
It includes: multiple optical ports being driven by every circuit-switched data signal after extension, the light end of predetermined quantity is spaced between every two optical port
Mouthful.
In some embodiments, further includes: the resistance between exchange chip and driving chip is adjusted, to adjust driving core
The driving capability of piece.
In some embodiments, further includes: adjust between every road clock sampling signal and data-signal and optical port
Build-out resistor, to adjust the quality of clock sampling signal and data-signal.
The another aspect of the embodiment of the present invention additionally provides a kind of computer equipment, comprising: at least one processor；With
And memory, memory are stored with the computer instruction that can be run on a processor, instruction is executed as follows to realize by processor
Step: I2C signal is transferred to by driving chip by exchange chip, I2C signal includes clock sampling signal and data-signal；It is logical
Clock sampling signal and data-signal are extended to multichannel respectively by chip of overdriving；Use the clock sampling signal sum number after extension
It is believed that number combination respectively drive multiple optical ports, wherein by every road clock sampling signal and data-signal be used to driving it is more
A optical port.
In some embodiments, every road clock sampling signal and data-signal are used to drive multiple optical port packets
It includes: multiple optical ports being driven by the extension road Hou Mei clock sampling signal, multiple optical ports are adjacent.
In some embodiments, every road clock sampling signal and data-signal are used to drive multiple optical port packets
It includes: multiple optical ports being driven by every circuit-switched data signal after extension, the light end of predetermined quantity is spaced between every two optical port
Mouthful.
In some embodiments, step further include: adjust every road clock sampling signal and data-signal and optical port it
Between build-out resistor, to adjust the quality of clock sampling signal and data-signal.
The embodiment of the present invention in another aspect, additionally provide a kind of computer readable storage medium, computer-readable storage
Media storage has the computer program that method as above is executed when being executed by processor.
The present invention has following advantageous effects: by being multiplexed to I2C signal, so that a driving chip
Multiple switch optical port can be controlled, greatly reduces production cost under the premise of guaranteeing product quality.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
Some embodiments of invention for those of ordinary skill in the art without creative efforts, can be with
Other embodiments are obtained according to these attached drawings.
Fig. 1 is the schematic diagram of the embodiment of the method for interchanger optical module I2C signal multiplexing provided by the invention；
Fig. 2 is the schematic diagram of the embodiment of interchanger optical module I2C signal multiplexing provided by the invention；
Fig. 3 is the flow chart of the embodiment of the method for interchanger optical module I2C signal multiplexing provided by the invention.
Specific embodiment
To make the objectives, technical solutions, and advantages of the present invention clearer, below in conjunction with specific embodiment, and reference
The embodiment of the present invention is further described in attached drawing.
It should be noted that all statements for using " first " and " second " are for differentiation two in the embodiment of the present invention
The non-equal entity of a same names or non-equal parameter, it is seen that " first " " second " only for the convenience of statement, does not answer
It is interpreted as the restriction to the embodiment of the present invention, subsequent embodiment no longer illustrates this one by one.
Based on above-mentioned purpose, it is multiple to propose a kind of interchanger optical module I2C signal for the first aspect of the embodiment of the present invention
The embodiment of method.Shown in fig. 1 is the embodiment of the method for interchanger optical module I2C signal multiplexing provided by the invention
Schematic diagram.As shown in Figure 1, the embodiment of the present invention includes following steps:
S1, I2C signal is transferred to by driving chip by exchange chip, I2C signal includes clock sampling signal and data
Signal；
S2, clock sampling signal and data-signal are extended to respectively by multichannel by driving chip；And
S3, multiple optical ports are respectively driven using the combination of clock sampling signal and data-signal after extension, wherein will
Every road clock sampling signal and data-signal are used to drive multiple optical ports.
I2C (Inter-integrated Circuit) signal includes SDA (data-signal) and SCL (clock sampling letter
Number).I2C signal is transferred to driving chip by exchange chip, in certain embodiments, is connected between exchange chip and driving chip
Resistance, the adjustable resistance adjust the driving capability of driving chip.
Clock sampling signal and data-signal are extended to multichannel respectively by driving chip.Driving chip is distinguished in the present embodiment
Clock sampling signal and data-signal are extended to 8 tunnels.8 road signals of extension are not to simultaneously turn on, and can preset 8 tunnels
The conducting rule of signal.
The extension road Hou Mei clock sampling signal and data-signal drive multiple optical ports, what each optical port received
The combination of clock sampling signal and data-signal is not exactly the same with other optical ports.Here it is " not exactly the same " include not
It is identical identical with part.Such as the group of clock sampling signal and data-signal that optical port A is received is combined into SCL0 and SDA0, light
The group of clock sampling signal and data-signal that port B is received is combined into SCL0 and SDA1, the clock sampling that optical port C is received
The group of signal and data-signal is combined into SCL1 and SDA1 because SCL0 and SDA0 is identical as the part SCL0 and SDA1, SCL0 and
SDA0 is different from SCL1 and SDA1, thus the combination of clock sampling signal and data-signal that optical port A is received just with light end
The combination of clock sampling signal and data-signal that mouth B and optical port C is received is not exactly the same.In the present embodiment, when every road
Clock signal and data-signal can drive 4 optical ports.
In certain embodiments, build-out resistor, adjustable every road have been all connected between driving chip and each optical port
Build-out resistor between clock sampling signal and data-signal and optical port, to adjust the matter of clock sampling signal and data-signal
Amount.
In certain embodiments, it is used to drive multiple optical ports include: every road clock sampling signal and data-signal
Multiple optical ports are driven by the extension road Hou Mei clock sampling signal, multiple optical ports are adjacent.For example, clock sampling signal can
To drive optical port 0, optical port 1, optical port 2 and optical port 3.
In certain embodiments, it is used to drive multiple optical ports include: every road clock sampling signal and data-signal
Multiple optical ports are driven by every circuit-switched data signal after extension, the optical port of predetermined quantity is spaced between every two optical port.
For example, predetermined quantity is 3, it that is to say and be spaced three optical ports between every two optical port, data-signal can drive light end
Mouth 0, optical port 4, optical port 8 and optical port 12.
Fig. 2 shows be interchanger optical module I2C signal multiplexing provided by the invention embodiment schematic diagram.This implementation
One shares 32 optical ports in example, merely illustrates half therein in Fig. 2, as shown in Fig. 2, exchange chip is SWITCH chip,
Driving chip is PCA9548.
I2C signal is transferred to PCA9548 by SWITCH chip, and PCA9548 is respectively by clock sampling signal and data-signal
8 tunnels are extended to, are SCL0, SCL1 ... SCL7 and SDA0, SDA1 ... SDA7 respectively.Extend the road Hou Mei clock sampling letter
Number and data-signal drive 4 optical ports.It extends the road Hou Mei clock sampling signal and drives 4 adjacent optical ports, after extension
Every circuit-switched data signal drive 4 optical ports, 3 optical ports are spaced between every two optical port.The I2C letter of each port connection
It is number as shown in the table:
Fig. 3 shows the flow chart of the embodiment of the method for interchanger optical module I2C signal multiplexing provided by the invention.
As shown in figure 3, next proceeding to frame 102 since frame 101, I2C signal is transferred to driving chip, I2C signal by exchange chip
Including clock sampling signal and data-signal；Frame 103 is next proceeded to, the resistance between exchange chip and driving chip is adjusted,
To adjust the driving capability of driving chip；Frame 104 is next proceeded to, driving chip is respectively by clock sampling signal and data-signal
It is extended to multichannel；Frame 105 is next proceeded to, the road Hou Mei clock sampling signal is extended and data-signal drives multiple light ends
Mouthful, the combination of clock sampling signal and data-signal that each optical port receives is not exactly the same with other optical ports；It connects
Proceed to frame 106, the build-out resistor between every road clock sampling signal and data-signal and optical port is adjusted, to adjust clock
The quality of sampled signal and data-signal then proceeds to the end of frame 107.
It is important to note that each in each embodiment of the method for above-mentioned interchanger optical module I2C signal multiplexing
A step can be intersected, replaces, increases, be deleted, therefore, these reasonable permutation and combination transformation in interchanger optical mode
The method of block I2C signal multiplexing should also be as belonging to the scope of protection of the present invention, and should not limit to protection scope of the present invention
On embodiment.
Based on above-mentioned purpose, the second aspect of the embodiment of the present invention proposes a kind of computer equipment, comprising: at least
One processor；And memory, memory are stored with the computer instruction that can be run on a processor, instruction is held by processor
Row is to realize following steps: I2C signal S1, being transferred to driving chip by exchange chip, I2C signal includes clock sampling letter
Number and data-signal；S2, clock sampling signal and data-signal are extended to respectively by multichannel by driving chip；And S3, make
Multiple optical ports are respectively driven with the combination of clock sampling signal and data-signal after extension, wherein by every road clock sampling
Signal and data-signal are used to drive multiple optical ports.
In some embodiments, it is used to drive multiple optical ports include: every road clock sampling signal and data-signal
Multiple optical ports are driven by the extension road Hou Mei clock sampling signal, multiple optical ports are adjacent.
In some embodiments, it is used to drive multiple optical ports include: every road clock sampling signal and data-signal
Multiple optical ports are driven by every circuit-switched data signal after extension, the optical port of predetermined quantity is spaced between every two optical port.
In some embodiments, step further include: adjust between every road clock sampling signal and data-signal and optical port
Build-out resistor, to adjust the quality of clock sampling signal and data-signal.
The present invention also provides a kind of computer readable storage medium, computer-readable recording medium storage has by processor
The computer program of method as above is executed when execution.
Finally, it should be noted that those of ordinary skill in the art will appreciate that realizing the whole in above-described embodiment method
Or part process, related hardware can be instructed to complete by computer program, the side of interchanger optical module I2C signal multiplexing
The program of method can be stored in a computer-readable storage medium, and the program is when being executed, it may include such as above-mentioned each method
The process of embodiment.Wherein, the storage medium of program can be magnetic disk, CD, read-only memory (ROM) or random storage note
Recall body (RAM) etc..The embodiment of above-mentioned computer program, can achieve corresponding aforementioned any means embodiment it is identical or
The similar effect of person.
In addition, disclosed method is also implemented as the computer journey executed by processor according to embodiments of the present invention
Sequence, the computer program may be stored in a computer readable storage medium.When the computer program is executed by processor, hold
The above-mentioned function of being limited in row method disclosed by the embodiments of the present invention.
In addition, above method step and system unit also can use controller and for storing so that controller is real
The computer readable storage medium of the computer program of existing above-mentioned steps or Elementary Function is realized.
In addition, it should be appreciated that the computer readable storage medium (for example, memory) of this paper can be volatibility and deposit
Reservoir or nonvolatile memory, or may include both volatile memory and nonvolatile memory.As an example and
Unrestricted, nonvolatile memory may include read-only memory (ROM), programming ROM (PROM), electrically programmable ROM
(EPROM), electrically erasable programmable ROM (EEPROM) or flash memory.Volatile memory may include that arbitrary access is deposited
Reservoir (RAM), the RAM can serve as external cache.As an example and not restrictive, RAM can be with a variety of
Form obtains, such as synchronous random access memory (DRAM), dynamic ram (DRAM), synchronous dram (SDRAM), double data rate SDRAM (DDR
SDRAM), enhance SDRAM (ESDRAM), synchronization link DRAM (SLDRAM) and directly Rambus RAM (DRRAM).Institute is public
The storage equipment for the aspect opened is intended to the memory of including but not limited to these and other suitable type.
Those skilled in the art will also understand is that, various illustrative logical blocks, mould in conjunction with described in disclosure herein
Block, circuit and algorithm steps may be implemented as the combination of electronic hardware, computer software or both.It is hard in order to clearly demonstrate
This interchangeability of part and software, with regard to various exemplary components, square, module, circuit and step function to its into
General description is gone.This function is implemented as software and is also implemented as hardware depending on concrete application and application
To the design constraint of whole system.The function that those skilled in the art can realize in various ways for every kind of concrete application
Can, but this realization decision should not be interpreted as causing a departure from range disclosed by the embodiments of the present invention.
Various illustrative logical blocks, module and circuit, which can use, in conjunction with described in disclosure herein is designed to
The following component of function here is executed to realize or execute: general processor, digital signal processor (DSP), dedicated integrated electricity
It is road (ASIC), field programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete
Any combination of hardware component or these components.General processor can be microprocessor, but alternatively, processor can
To be any conventional processors, controller, microcontroller or state machine.Processor also may be implemented as calculating the group of equipment
Close, for example, the combination of DSP and microprocessor, multi-microprocessor, one or more microprocessors combination DSP and/or it is any its
Its this configuration.
The step of method in conjunction with described in disclosure herein or algorithm, can be directly contained in hardware, be held by processor
In capable software module or in combination of the two.Software module may reside within RAM memory, flash memory, ROM storage
Device, eprom memory, eeprom memory, register, hard disk, removable disk, CD-ROM or known in the art it is any its
In the storage medium of its form.Illustrative storage medium is coupled to processor, enables a processor to from the storage medium
Information is written to the storage medium in middle reading information.In an alternative, storage medium can be integral to the processor
Together.Pocessor and storage media may reside in ASIC.ASIC may reside in user terminal.In an alternative
In, it is resident in the user terminal that pocessor and storage media can be used as discrete assembly.
In one or more exemplary designs, function can be realized in hardware, software, firmware or any combination thereof.
If realized in software, can using function as one or more instruction or code may be stored on the computer-readable medium or
It is transmitted by computer-readable medium.Computer-readable medium includes computer storage media and communication media, which is situated between
Matter includes any medium for helping for computer program to be transmitted to another position from a position.Storage medium can be energy
Any usable medium being enough accessed by a general purpose or special purpose computer.As an example and not restrictive, the computer-readable medium
It may include that RAM, ROM, EEPROM, CD-ROM or other optical disc memory apparatus, disk storage equipment or other magnetic storages are set
It is standby, or can be used for carrying or storage form be instruct or the required program code of data structure and can by general or
Special purpose computer or any other medium of general or specialized processor access.In addition, any connection can suitably claim
For computer-readable medium.For example, if using coaxial cable, optical fiber cable, twisted pair, digital subscriber line (DSL) or all
It is if the wireless technology of infrared ray, radio and microwave to send software from website, server or other remote sources, then above-mentioned coaxial
Cable, fiber optic cable, twisted pair, DSL or such as wireless technology of infrared ray, radio and microwave are included in determining for medium
Justice.As used herein, disk and CD include compact disk (CD), it is laser disk, CD, digital versatile disc (DVD), soft
Disk, Blu-ray disc, wherein disk usually magnetically reproduce data, and CD using laser optics reproduce data.Above content
Combination should also be as being included in the range of computer-readable medium.
It is exemplary embodiment disclosed by the invention above, it should be noted that in the sheet limited without departing substantially from claim
Under the premise of inventive embodiments scope of disclosure, it may be many modifications and modify.According to open embodiment described herein
The function of claim to a method, step and/or movement be not required to the execution of any particular order.In addition, although the present invention is implemented
Element disclosed in example can be described or be required in the form of individual, but be unless explicitly limited odd number, it is understood that be multiple.
It should be understood that it is used in the present context, unless the context clearly supports exceptions, singular " one
It is a " it is intended to also include plural form.It is to be further understood that "and/or" used herein refers to including one or one
Any and all possible combinations of a above project listed in association.
It is for illustration only that the embodiments of the present invention disclose embodiment sequence number, does not represent the advantages or disadvantages of the embodiments.
Those of ordinary skill in the art will appreciate that realizing that all or part of the steps of above-described embodiment can pass through hardware
Complete, relevant hardware can also be instructed to complete by program, program can store in a kind of computer-readable storage
In medium, storage medium mentioned above can be read-only memory, disk or CD etc..
It should be understood by those ordinary skilled in the art that: the discussion of any of the above embodiment is exemplary only, not
It is intended to imply that range disclosed by the embodiments of the present invention (including claim) is limited to these examples；In the think of of the embodiment of the present invention
Under road, it can also be combined between the technical characteristic in above embodiments or different embodiments, and there is this hair as above
Many other variations of the different aspect of bright embodiment, for simplicity, they are not provided in details.Therefore, all in the present invention
Within the spirit and principle of embodiment, any omission, modification, equivalent replacement, improvement for being made etc. be should be included in of the invention real
It applies within the protection scope of example.
Claims (10)
1. a kind of method of interchanger optical module I2C signal multiplexing characterized by comprising
I2C signal is transferred to driving chip by exchange chip, the I2C signal include clock sampling signal sum number it is believed that
Number；
The clock sampling signal and data-signal are extended to multichannel respectively by the driving chip；
Multiple optical ports are respectively driven using the combination of clock sampling signal and data-signal after extension, wherein when by every road
Clock sampled signal and data-signal are used to drive multiple optical ports.
2. the method according to claim 1, wherein every road clock sampling signal and data-signal are used to drive
Moving multiple optical ports includes:
Multiple optical ports are driven by the extension road Hou Mei clock sampling signal, the multiple optical port is adjacent.
3. according to the method described in claim 2, it is characterized in that, every road clock sampling signal and data-signal are used to drive
Moving multiple optical ports includes:
Multiple optical ports are driven by every circuit-switched data signal after extension, the light end of predetermined quantity is spaced between every two optical port
Mouthful.
4. the method according to claim 1, wherein further include:
The resistance between the exchange chip and the driving chip is adjusted, to adjust the driving capability of the driving chip.
5. the method according to claim 1, wherein further include:
Adjust the build-out resistor between every road clock sampling signal and data-signal and optical port, with adjust clock sampling signal and
The quality of data-signal.
6. a kind of computer equipment characterized by comprising
At least one processor；And
Memory, the memory are stored with the computer instruction that can be run on the processor, and described instruction is by described
Device is managed to execute to realize following steps:
I2C signal is transferred to driving chip by exchange chip, the I2C signal include clock sampling signal sum number it is believed that
Number；
The clock sampling signal and data-signal are extended to multichannel respectively by the driving chip；
Multiple optical ports are respectively driven using the combination of clock sampling signal and data-signal after extension, wherein when by every road
Clock sampled signal and data-signal are used to drive multiple optical ports.
7. computer equipment according to claim 6, which is characterized in that every road clock sampling signal and data-signal is equal
For driving multiple optical ports to include:
Multiple optical ports are driven by the extension road Hou Mei clock sampling signal, the multiple optical port is adjacent.
8. computer equipment according to claim 7, which is characterized in that every road clock sampling signal and data-signal is equal
For driving multiple optical ports to include:
Multiple optical ports are driven by every circuit-switched data signal after extension, the light end of predetermined quantity is spaced between every two optical port
Mouthful.
9. computer equipment according to claim 6, which is characterized in that step further include:
Adjust the build-out resistor between every road clock sampling signal and data-signal and optical port, with adjust clock sampling signal and
The quality of data-signal.
10. a kind of computer readable storage medium, the computer-readable recording medium storage has computer program, and feature exists
In perform claim requires method described in 1-5 any one when the computer program is executed by processor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910598589.2A CN110445731B (en) | 2019-07-04 | 2019-07-04 | Method, equipment and readable medium for multiplexing signals of optical module I2C of switch |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910598589.2A CN110445731B (en) | 2019-07-04 | 2019-07-04 | Method, equipment and readable medium for multiplexing signals of optical module I2C of switch |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN110445731A true CN110445731A (en) | 2019-11-12 |
| CN110445731B CN110445731B (en) | 2021-07-06 |
Family
ID=68429009
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910598589.2A Active CN110445731B (en) | 2019-07-04 | 2019-07-04 | Method, equipment and readable medium for multiplexing signals of optical module I2C of switch |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110445731B (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111857743A (en) * | 2020-06-19 | 2020-10-30 | 苏州浪潮智能科技有限公司 | Universal and reconfigurable design method, device, equipment and medium for electrical signals |
| CN114579491A (en) * | 2022-01-28 | 2022-06-03 | 新华三技术有限公司合肥分公司 | Integrated circuit bus multiplexing device and network equipment |
Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20140025851A1 (en) * | 2012-07-17 | 2014-01-23 | International Business Machines Corporation | Double density i2c system |
| CN105279130A (en) * | 2015-10-22 | 2016-01-27 | 北方工业大学 | Method for operating multiple I2C devices with same address |
| CN105404604A (en) * | 2015-11-04 | 2016-03-16 | 上海斐讯数据通信技术有限公司 | I2C device expansion method and device and system |
| US20170180481A1 (en) * | 2014-03-17 | 2017-06-22 | Camgian Microsystems Corp. | Multiple Sensor Data Processor Interface and Relay |
| CN107070548A (en) * | 2017-04-21 | 2017-08-18 | 广东浪潮大数据研究有限公司 | A kind of device and method for automatically adjusting QSFP+ optical module power grades |
| CN107766213A (en) * | 2017-09-29 | 2018-03-06 | 郑州云海信息技术有限公司 | A kind of method and system for realizing NVME hard disk lightings |
| CN107800937A (en) * | 2017-11-09 | 2018-03-13 | 信利光电股份有限公司 | A kind of multi-cam module and terminal device |
| CN207184497U (en) * | 2017-09-22 | 2018-04-03 | 深圳市欧凌克光电科技有限公司 | CFP parallel 100G 80KM photoelectric transceiver |
| CN109656841A (en) * | 2018-11-16 | 2019-04-19 | 武汉精立电子技术有限公司 | Mixing control method and device based on software simulation I2C and Hardware I2C |
| US20190138281A1 (en) * | 2017-11-08 | 2019-05-09 | EPtronics, Inc. | Multiple interface led driver programmer |
-
2019
- 2019-07-04 CN CN201910598589.2A patent/CN110445731B/en active Active
Patent Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20140025851A1 (en) * | 2012-07-17 | 2014-01-23 | International Business Machines Corporation | Double density i2c system |
| US20170180481A1 (en) * | 2014-03-17 | 2017-06-22 | Camgian Microsystems Corp. | Multiple Sensor Data Processor Interface and Relay |
| CN105279130A (en) * | 2015-10-22 | 2016-01-27 | 北方工业大学 | Method for operating multiple I2C devices with same address |
| CN105404604A (en) * | 2015-11-04 | 2016-03-16 | 上海斐讯数据通信技术有限公司 | I2C device expansion method and device and system |
| CN107070548A (en) * | 2017-04-21 | 2017-08-18 | 广东浪潮大数据研究有限公司 | A kind of device and method for automatically adjusting QSFP+ optical module power grades |
| CN207184497U (en) * | 2017-09-22 | 2018-04-03 | 深圳市欧凌克光电科技有限公司 | CFP parallel 100G 80KM photoelectric transceiver |
| CN107766213A (en) * | 2017-09-29 | 2018-03-06 | 郑州云海信息技术有限公司 | A kind of method and system for realizing NVME hard disk lightings |
| US20190138281A1 (en) * | 2017-11-08 | 2019-05-09 | EPtronics, Inc. | Multiple interface led driver programmer |
| CN107800937A (en) * | 2017-11-09 | 2018-03-13 | 信利光电股份有限公司 | A kind of multi-cam module and terminal device |
| CN109656841A (en) * | 2018-11-16 | 2019-04-19 | 武汉精立电子技术有限公司 | Mixing control method and device based on software simulation I2C and Hardware I2C |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111857743A (en) * | 2020-06-19 | 2020-10-30 | 苏州浪潮智能科技有限公司 | Universal and reconfigurable design method, device, equipment and medium for electrical signals |
| CN114579491A (en) * | 2022-01-28 | 2022-06-03 | 新华三技术有限公司合肥分公司 | Integrated circuit bus multiplexing device and network equipment |
Also Published As
| Publication number | Publication date |
|---|---|
| CN110445731B (en) | 2021-07-06 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN110135985B (en) | Parallel execution method and system for transactions on block chain | |
| CN104054133B (en) | Programmed via the multipurpose register of every DRAM addressabilities pattern | |
| CN110083555A (en) | The common die of memory devices with stand-alone interface path is realized | |
| CN107423387A (en) | The method and apparatus of table is divided in a kind of point storehouse based on middleware | |
| CN111857572B (en) | Data writing method, device and equipment of TLC solid state disk and storage medium | |
| CN103677719B (en) | A kind of combination display packing | |
| CN110427342A (en) | A kind of method, equipment and readable medium creating mirror site | |
| CN110445731A (en) | A kind of method, equipment and the readable medium of interchanger optical module I2C signal multiplexing | |
| TW200832415A (en) | High speed interface for non-volatile memory | |
| CN101187896B (en) | On-spot programmable gate array data cache management method | |
| CN110058821A (en) | A kind of method and device of query service device storage information | |
| TW200937425A (en) | NAND flash memory access with relaxed timing constraints | |
| CN109800199A (en) | A kind of method and device based on M.2 connector extension SATA hard disc | |
| DE602004028044D1 (en) | RECORD MEDIA WITH A DATA FIELD DETERMINES IF THE USER MAY MAKE CHANGES TO THE DISPLAY CHARACTERISTICS OF A TEXT-BASED SUBTITLE AND SUBSEQUENT RECORDING AND PLAYBACK PROCESSES AND DEVICES | |
| CN108388461A (en) | A kind of screen picture intercept method and device for firmware | |
| CN102316177B (en) | Address resolution method, system thereof and address resolution device | |
| CN109376028A (en) | A kind of PCIE device error correction method and device | |
| CN104598325B (en) | The EDID data recording methods of calibration of display module | |
| CN104954113A (en) | Multichannel data transmission method and system | |
| CN111143250B (en) | Method, device and medium for accessing FPGA storage unit based on AXI-ST interface | |
| CN110266546A (en) | A kind of method, equipment and readable medium configuring switch port | |
| CN109782886A (en) | A kind of detection method and device of server electrifying timing sequence | |
| TW200409140A (en) | Memory device accessible with different communication protocols | |
| CN110417579A (en) | A kind of method, equipment and readable medium managing 10,000,000,000 networks using Gigabit Ethernet | |
| CN107203433A (en) | The multiple inter-program data synchronous method and device of a kind of shared drive |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |