CN107731674B - Polysilicon resistance production method and polysilicon resistance in metallic silicon tangsten silicide grid processing procedure - Google Patents
Polysilicon resistance production method and polysilicon resistance in metallic silicon tangsten silicide grid processing procedure Download PDFInfo
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- CN107731674B CN107731674B CN201710729961.XA CN201710729961A CN107731674B CN 107731674 B CN107731674 B CN 107731674B CN 201710729961 A CN201710729961 A CN 201710729961A CN 107731674 B CN107731674 B CN 107731674B
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- layer
- polysilicon
- resistance
- silicon dioxide
- polysilicon resistance
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28035—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
- H01L21/28044—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer
- H01L21/28061—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer the conductor comprising a metal or metal silicide formed by deposition, e.g. sputter deposition, i.e. without a silicidation reaction
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28035—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/20—Resistors
Abstract
The invention discloses polysilicon resistance manufacture craft and polysilicon resistances in a kind of metallic silicon tangsten silicide grid processing procedure.Manufacture craft of the present invention successive deposit polycrystalline silicon layer and silicon dioxide film on substrate material recycle high etch selectivity technique, and the polysilicon resistance of metallic silicon tangsten silicide grid is made, and then make metallic silicon tangsten silicide grid by highly selective etch process again.The present invention overcomes the obvious relatively low problem of metal silication tungsten resistive surface resistivity, obtained polysilicon resistance surface resistivity is significantly improved, and is conducive to greatly save chip area in this way, is improved resistive performance, be suitable for producing in enormous quantities.
Description
Technical field
The present invention relates to polysilicon resistance manufacture craft field, polysilicon in especially a kind of metallic silicon tangsten silicide grid processing procedure
Resistance production method and polysilicon resistance.
Background technique
Resistance is used widely in integrated circuits as most basic device.In metallic silicon tangsten silicide grid (WSI
Gate) in processing procedure, resistance is usually to be made of metal silication tungsten resistance.Traditional 250 Ω of polysilicon surface resistivity/cm2, and it is golden
The surface resistivity for belonging to tungsten silicide resistance only has 15 Ω/cm2, it is seen that metal silication tungsten resistive surface resistance is obviously relatively low.It is terrible
To the resistance value for being equal to polysilicon, it has to increase the length of metal silication tungsten resistance or reduce width, increase technology difficulty
And the performance of resistance is not sufficiently stable.Therefore, the production method for inventing a kind of polysilicon resistance in metal silication tungsten grid processing procedure is come
It solves the above problems necessary.
Summary of the invention
The purpose of the present invention is to solve above-mentioned the deficiencies in the prior art, provide in a kind of metallic silicon tangsten silicide grid processing procedure
The production method of polysilicon resistance, comprising:
The present invention has the advantages that the obvious relatively low problem of metal silication tungsten resistive surface resistivity is overcome, it is obtained
Polysilicon resistance surface resistivity significantly improve, be conducive to greatly save chip area in this way, improve resistive performance, be suitable for
Produce in enormous quantities.
Detailed description of the invention
Fig. 1 is the polysilicon deposition schematic diagram according to embodiment of the present invention.
Fig. 2 is the polysilicon resistance mask plate schematic diagram according to embodiment of the present invention.
Fig. 3 is according to the Silica pattern schematic diagram after the hard mask etch of polysilicon resistance of embodiment of the present invention.
Fig. 4 is to deposit schematic diagram according to the silica of embodiment of the present invention.
Fig. 5 is the polysilicon gate grade mask plate schematic diagram according to embodiment of the present invention.
Fig. 6 is according to the figure after the etching of the silicon dioxide layer, polysilicon gate grade and polysilicon resistance of embodiment of the present invention
Case schematic diagram.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts every other
Embodiment shall fall within the protection scope of the present invention.
Polysilicon resistance manufacture craft and polysilicon resistance in a kind of metallic silicon tangsten silicide grid processing procedure designed by the present invention,
The manufacture craft specifically include the following steps:
Step 1: as shown in Figure 1: provide one with carrying out local oxide isolation structure silicon substrate 1, the silicon substrate 1 it is active
Area is isolated by the selective oxidation, and the selective oxidation is local field oxygen (LOCOS) or shallow groove field oxygen (STI), in substrate 1
Polysilicon layer 2 is carried out on material to deposit, and layer of silicon dioxide film is then deposited, as polysilicon resistance layer (Poly Resistor
Mask hard mask layer)；
Step 2: as shown in Fig. 2, photoresist is also known as photoresist, by photosensitive in silicon oxide film surface resist coating
The photosensitive mixing liquid of resin, three kinds of main components of sensitizer (see spectral sensitizing dye) and solvent composition.Photosensitive tree
Rouge can soon be sent out after illumination in exposure region
Third contact of a total solar or lunar eclipse curing reaction, so that the generations such as the physical property of this material, especially dissolubility, affinity obviously become
Change, handled through solvent appropriate, dissolve soluble part, obtain required image, and uses polysilicon resistance layer as mask plate, into
Row exposure and imaging obtains polysilicon mask 3 shown in Fig. 2；
Step 3: as shown in figure 3, there is highly selective etch process using to silica and polysilicon, it will be as hard
The silicon dioxide film of mask layer is etched to the Silica pattern 4 as the hard exposure mask of polysilicon resistance, i.e. the first hard mask layer；
Step 4: as shown in figure 4, in the plating metal on surface tungsten silicide of the resulting polysilicon layer of step 3 and silicon dioxide pattern
(WSI) layer 5, and the second hard mask layer is used as in metal silication tungsten layer surface deposition second layer silicon dioxide layer 6；
Step 5: as shown in figure 5, using polysilicon gate grade as exposure mask in second layer silicon oxide film surface resist coating
Version, is exposed and develops, obtain polysilicon gate mask layer 7；
Step 6: as shown in fig. 6, there is high selection using to silicon dioxide layer 6, polysilicon layer 2 and metal silication tungsten layer 5
Property etch process, second layer silicon dioxide layer 6, metal silication tungsten layer and polysilicon layer 2 are etched, formed polysilicon gate
Pole (there is metal silication tungsten layer) and polysilicon resistance (not having metal silication tungsten layer).
Polysilicon resistance obtained is as shown in fig. 6, include the polysilicon layer 2, Yi Jiduo on substrate 1 through the above steps
As the silicon dioxide layer 4 of hard exposure mask on crystal silicon layer 2.Metallic silicon tangsten silicide grid obtained successively has more upwards from substrate 1
Crystal silicon layer, metal silication tungsten layer 5 and silicon dioxide layer 6.The polysilicon of the polysilicon layer of the polysilicon resistance and the grid
Layer is by the etched formation of the same polysilicon layer.
The present invention has the advantages that the obvious relatively low problem of metal silication tungsten resistive surface resistivity is overcome, it is obtained
Polysilicon resistance surface resistivity significantly improve, be conducive to greatly save chip area in this way, improve resistive performance, be suitable for
Produce in enormous quantities.
Finally, it should be noted that the foregoing is only a preferred embodiment of the present invention, it is not intended to restrict the invention,
Although the present invention is described in detail referring to the foregoing embodiments, for those skilled in the art, still may be used
To modify the technical solutions described in the foregoing embodiments or equivalent replacement of some of the technical features,
All within the spirits and principles of the present invention, any modification, equivalent replacement, improvement and so on should be included in of the invention
Within protection scope.
Claims (7)
1. polysilicon resistance production method in a kind of metallic silicon tangsten silicide grid processing procedure, it is characterised in that: the production method is specific
Include the following steps:
Step 1: carrying out polysilicon layer on substrate material, then deposit layer of silicon dioxide film, for being used as polysilicon
The hard mask layer of resistive layer；
Step 2: in silicon oxide film surface resist coating, and using polysilicon resistance layer as mask plate, be exposed and develop；
Step 3: there is highly selective etch process using to polysilicon, silicon dioxide film is etched to as polysilicon resistance
The pattern of the hard exposure mask of layer；
Step 4: in the plating metal on surface tungsten silicide layer of the resulting polysilicon layer of step 3 and silicon dioxide pattern, and in metal
Tungsten silicide layer surface deposits second layer silicon dioxide film；
Step 5: in second layer silicon oxide film surface resist coating, using polysilicon gate grade as mask plate, be exposed and show
Shadow；
Step 6: there is highly selective etching using to silicon dioxide layer (6), polysilicon layer (2) and metal silication tungsten layer (5)
Technique is etched second layer silicon dioxide layer (6), metal silication tungsten layer and polysilicon layer (2), and being formed has metal silication
The polysilicon gate of tungsten and polysilicon resistance without metal silication tungsten.
2. the method according to claim 1, wherein the substrate material is Si.
3. the method according to claim 1, wherein the polycrystalline silicon metal tungsten silicide grid from substrate upwards according to
It is secondary that there is polysilicon layer, metal silication tungsten layer and silicon dioxide layer.
4. the method according to claim 1, wherein the polysilicon resistance successively has polycrystalline from substrate upwards
Silicon layer and silicon dioxide layer as the hard exposure mask of polysilicon resistance.
5. a kind of polysilicon resistance that the method using one of the claims makes, which is characterized in that the polysilicon electricity
Resistance includes the silicon dioxide layer on the polysilicon layer and polysilicon layer of substrate as hard exposure mask.
6. polysilicon resistance according to claim 5, which is characterized in that the grid successively has polycrystalline from substrate upwards
Silicon layer, metal silication tungsten layer and silicon dioxide layer.
7. polysilicon resistance according to claim 5, which is characterized in that the polysilicon layer of the polysilicon resistance with it is described
The polysilicon layer of grid is by the etched formation of the same polysilicon layer.
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| CN201710729961.XA CN107731674B (en) | 2017-08-23 | 2017-08-23 | Polysilicon resistance production method and polysilicon resistance in metallic silicon tangsten silicide grid processing procedure |
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| CN201710729961.XA CN107731674B (en) | 2017-08-23 | 2017-08-23 | Polysilicon resistance production method and polysilicon resistance in metallic silicon tangsten silicide grid processing procedure |
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| CN107731674A CN107731674A (en) | 2018-02-23 |
| CN107731674B true CN107731674B (en) | 2018-12-14 |
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Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6054359A (en) * | 1999-06-14 | 2000-04-25 | Taiwan Semiconductor Manufacturing Company | Method for making high-sheet-resistance polysilicon resistors for integrated circuits |
| JP5520102B2 (en) * | 2010-03-26 | 2014-06-11 | 旭化成エレクトロニクス株式会社 | Manufacturing method of semiconductor device |
| US8569141B2 (en) * | 2011-08-31 | 2013-10-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Polysilicon resistor formation in a gate-last process |
| CN103578949B (en) * | 2012-07-30 | 2016-11-02 | 上海华虹宏力半导体制造有限公司 | Grid polycrystalline silicon and polysilicon resistance integrated manufacturing method |
| CN103779199B (en) * | 2012-10-26 | 2016-10-19 | 上海华虹宏力半导体制造有限公司 | The manufacture method of polysilicon resistance in metal silication tungsten grid technology |
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