CN107729204B - Test equipment and test method - Google Patents

Test equipment and test method Download PDF

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Publication number
CN107729204B
CN107729204B CN201711096198.8A CN201711096198A CN107729204B CN 107729204 B CN107729204 B CN 107729204B CN 201711096198 A CN201711096198 A CN 201711096198A CN 107729204 B CN107729204 B CN 107729204B
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electronic device
address
test
tested
error warning
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CN107729204A (en
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朱从涛
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Inventec Pudong Technology Corp
Inventec Corp
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Inventec Pudong Technology Corp
Inventec Corp
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2273Test methods
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2268Logging of test results
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2284Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing by power-on test, e.g. power-on self test [POST]

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  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Telephone Function (AREA)

Abstract

The invention discloses a test method which is suitable for an electronic device to be tested. The test method comprises the following steps: executing a test program, and indicating the electronic device to be tested to be selectively started or shut down according to the test program; providing a connection request signal according to a preset address, wherein the preset address is an internet protocol address; when a connection confirmation signal is not received in a preset time interval after the connection request signal is provided, providing the connection request signal again according to the preset address; and when receiving an error warning address provided by the electronic device to be tested, updating the preset address into the error warning address, and providing the required connection signal according to the updated preset address. The invention also discloses a test device.

Description

Test equipment and test method
Technical Field
The invention relates to a test device and a test method.
Background
Before shipping, the electronic device under test usually needs to go through a series of tests to ensure the quality of the product. These tests may be full disk tests involving software, hardware, or firmware. Whether the electronic device to be tested has defects or not is detected by simulating the use under various situations.
However, conventionally, when an on/off test is performed on an electronic device to be tested (such as a motherboard, a computer, or a server), a series of operations are often executed by a preset test program. When the electronic device to be tested fails and is forced to be shut down, the electronic device to be tested is temporarily not powered, so that the failure phenomenon of the electronic device to be tested cannot be reserved, and a tester can not analyze the failure phenomenon.
Disclosure of Invention
The invention provides a test device and a test method, which are used for overcoming the problem that the fault phenomenon cannot be reserved when the power on/off test is carried out in the prior art.
The invention discloses a test device. The test equipment comprises a first communication circuit, a processing circuit and a second communication circuit. The first communication circuit is in communication connection with an electronic device to be tested. The processing circuit is electrically connected with the first communication circuit. The processing circuit is used for executing a test program and providing a power-on and power-off instruction to the electronic device to be tested through the first communication circuit, wherein the power-on and power-off instruction is used for indicating the electronic device to be tested to be selectively powered on or powered off. The second communication circuit is electrically connected with the processing circuit and used for providing a connection request signal according to a preset address, and the preset address is an Internet Protocol address (ip address). When the first communication circuit receives an error warning address provided by the electronic device to be tested, the processing circuit updates the preset address to the error warning address, and the second communication circuit is used for providing a connection request signal according to the updated preset address.
The invention discloses a test method. The testing method is suitable for an electronic device to be tested. The test method comprises the following steps: executing a test program, and indicating an electronic device to be tested to be selectively started or shut down according to the test program; providing a connection request signal according to a preset address, wherein the preset address is an internet protocol address; when a connection confirmation signal is not received in a preset time interval after the connection request signal is provided, providing the connection request signal again according to the preset address; and when receiving an error warning address provided by the electronic device to be tested, updating the preset address into the error warning address, and providing a connection request signal according to the updated preset address.
The foregoing summary of the invention, as well as the following detailed description of the embodiments, is provided to illustrate and explain the principles and spirit of the invention, and to provide further explanation of the invention as claimed.
Drawings
Fig. 1 is a functional block diagram of a testing apparatus according to an embodiment of the invention.
Fig. 2 is a flowchart illustrating a testing method according to an embodiment of the invention.
Fig. 3 is a flowchart illustrating a state of an electronic device under test in a testing method according to an embodiment of the invention.
Fig. 4 is a flowchart illustrating a state of a test apparatus in a test method according to another embodiment of the invention.
Fig. 5 is a functional block diagram of a testing apparatus according to another embodiment of the invention.
Wherein, the reference numbers:
1. 5 test equipment
12. 52 first communication circuit
14. 54 processing circuit
16. 56 second communication circuit
2 electronic device to be tested
3. 4 external electronic device
58 supply circuit
Detailed Description
The detailed features and advantages of the present invention are described in detail in the following embodiments, which are sufficient for a person skilled in the art to understand the technical contents of the present invention and to implement the present invention, and the related objects and advantages of the present invention can be easily understood by those skilled in the art from the disclosure of the present specification, claims and drawings. The following examples further illustrate aspects of the present invention in detail, but are not intended to limit the scope of the present invention in any way.
Referring to fig. 1, fig. 1 is a functional block diagram of a testing apparatus according to an embodiment of the invention. As shown in fig. 1, the test apparatus 1 includes a first communication circuit 12, a processing circuit 14 and a second communication circuit 16. The first communication circuit 12 is communicatively connected to an electronic device 2 under test. The processing circuit 14 is electrically connected to the first communication circuit 12 and the second communication circuit 16.
The processing circuit 14 is configured to execute a test program, and the processing circuit 14 is configured to provide a power on/off instruction to the electronic device 2 to be tested through the first communication circuit 12, where the power on/off instruction is used to instruct the electronic device 2 to be tested to selectively power on or power off. The test program is, for example, an execution file (exe) or other types of programs, and is not limited herein.
More specifically, the electronic device 2 under test is executed with an Operating System (OS), for example. The operating system is, for example, a linux system or a windows system, and is not limited herein. In an embodiment, the electronic device under test 2 further executes a program under the operating system, for example, to perform a test in cooperation with the test equipment 1. The test apparatus 1 provides a power on/off command to the electronic device 2 to be tested according to the test program through the processing circuit 14, so that the electronic device 2 to be tested is selectively powered on/off according to the power on/off command. In practice, the testing device 1 can also provide other testing instructions to the electronic device 2 according to the testing program, so that the electronic device 2 can perform other testing items while being turned on or off, thereby improving the testing flexibility.
Continuing with the above, the second communication circuit 16 is used to provide a connection request signal according to a predetermined address. From another perspective, the second communication circuit 16 is configured to provide a connection request signal to the destination pointed by the predetermined address in order to establish a connection with the destination pointed by the predetermined address. In this embodiment, the predetermined address points to the external electronic device 3. Details of the external electronic device 3 will be described later. The preset address is an internet protocol address (IP address). In practice, the communication link is referred to as "ping", which is a common practice in the industry. In this embodiment, when the second communication circuit 16 fails to establish a connection with the destination pointed by the predetermined address, the second communication circuit 16 repeatedly provides the connection request signal to the destination pointed by the predetermined address. The connection may be a normal connection or a real-time connection. For example, the communication connection may be established according to a TCP (Transmission Control Protocol) through a port 84 (port 84) or may transmit information according to an IDP (Internet data Protocol), which is not limited herein.
Ideally, the test equipment 1 cannot be connected to the external electronic device 3 to which the predetermined address is directed. The test apparatus 1 cannot "ping" the external electronic device 3 in industry terminology. In one embodiment, the external electronic device 3 may be a physical machine and corresponds to the predetermined address. In this embodiment, the external electronic device 3 is set to be unable to establish a communication connection with the test apparatus 1. For example, the relevant port of the external electronic device 3 is closed, or the system of the external electronic device 3 has blacklisted the test equipment 1 as a connection rejection according to the relevant information of the test equipment 1. In another embodiment, the external electronic device 3 may be a hypothetical machine that does not exist, and in this embodiment, the predetermined address does not actually point to any machine. Therefore, the test apparatus 1 cannot establish a connection with any machine according to the predetermined address. Since the external electronic device 3 may be a physical machine or a non-existing machine, the external electronic device 3 is drawn by a dotted line in fig. 1.
However, when the first communication circuit 12 receives an error warning address provided by the electronic device under test 2, the processing circuit 14 updates the predetermined address to the error warning address. That is, at this time, the second communication circuit 16 attempts to connect to the external electronic device 4 corresponding to the error warning address. The error warning address points to an external electronic device 4 which opens a communication connection to the test apparatus 1. In other words, when the electronic device under test 2 provides the error warning address to the test apparatus 1, the test apparatus 1 can establish a connection with the external electronic device 4 according to the error warning address. More specifically, when the external electronic device 4 receives the connection request signal provided by the test equipment 1, the external electronic device 4 provides a connection confirmation signal. When the second communication circuit 16 receives the connection confirmation signal provided by the external electronic device 4, the second communication circuit 16 establishes a connection with the external electronic device 4 according to the updated preset position. As mentioned above, when the second communication circuit 16 does not receive the connection confirmation signal within a predetermined time interval during which the connection request signal is sent, the second communication circuit 16 provides the connection request signal according to the predetermined address again.
Therefore, in practice, the electronic device under test 2 is configured to provide the error warning address to the test apparatus 1 when an error occurs. That is, for the test apparatus 1, when the test apparatus 1 cannot establish a connection with the external electronic device 3, the test apparatus 1 determines that the test process of the electronic device 2 to be tested is still normal; when the test equipment 1 can be connected with the external electronic device 3, the test equipment 1 determines that an error occurs in the test process of the electronic device 2 to be tested. Therefore, the test equipment 1 can determine whether to perform an error response procedure on the electronic device 2 to be tested according to whether to establish a connection with the destination pointed by the preset address.
The external electronic device 4 may be a computer or a Baseboard Management Controller (BMC) in a server. Those skilled in the art can define the suitable electronic device as the external electronic device 4 according to the actual needs and the type of the electronic device 2 to be tested.
As mentioned above, the present invention further provides a testing method, which is described with reference to fig. 2, and fig. 2 is a flowchart illustrating steps of the testing method according to an embodiment of the present invention. In step S201, a test program is executed, and the electronic device to be tested is selectively turned on or off according to the test program. In step S203, a request connection signal is provided according to a predetermined address. In step S205, when a connection confirmation signal is not received within a predetermined time interval after the connection request signal is provided, the connection request signal is provided again according to the predetermined address. In step S207, when an error warning address provided by the electronic device under test is received, the predetermined address is updated to the error warning address, and a connection request signal is provided according to the updated predetermined address.
Referring to fig. 3 and fig. 4 again, fig. 3 is a flow chart illustrating a state of an electronic device under test in a testing method according to an embodiment of the invention, and fig. 4 is a flow chart illustrating a state of a testing apparatus in a testing method according to another embodiment of the invention. As shown in fig. 3, for the electronic device 2 under test, in step S301, the electronic device 2 under test is tested according to the instructions of the testing equipment, and in step S303, the electronic device 2 under test determines whether an error occurs during the testing process. In practice, the steps S301 and S303 may be performed simultaneously. That is, the electronic device under test 2 determines whether an error occurs during the test process while performing the test according to the instruction of the test equipment. Alternatively, in another implementation, the electronic device under test 2 determines whether an error occurs during the test process at a plurality of preset time points according to the instruction of the test equipment. From another perspective, the runtime interval of step S301 and the runtime interval of step S303 may be completely overlapped, partially overlapped, or not overlapped.
Continuing the above, when the electronic device 2 under test determines that no error occurs during the test, the electronic device 2 under test continues to perform the test according to the indication of the test equipment until the test is finished. When the electronic device under test 2 determines that an error occurs during the test, the electronic device under test 2 generates an error warning address (step S305). And, the electronic device under test 2 provides the error warning address to the testing apparatus 1, so that the testing apparatus 1 updates the preset address according to the error warning address. In practice, the error warning address may be pre-stored in the storage device of the electronic device 2 to be tested, or may be generated by the electronic device 2 to be tested in real time.
As shown in fig. 4, in step S401, the test apparatus 1 executes a test program to instruct the electronic device 2 to be tested to perform test items such as a power on/off test. In step S403, the test apparatus 1 tries to establish a communication connection with the external electronic device pointed by the preset address according to the preset address, and the test apparatus 1 further determines whether the connection with the external electronic device is successfully established. When the test apparatus 1 judges that the connection with the external electronic device is not successfully established, the test apparatus 1 continues to execute the test program. When the test apparatus 1 determines that the connection with the external electronic device is successfully established, the test apparatus proceeds to step S405. Similar to steps S301 and S303, steps S401 and S403 may be different steps or the same step, and details thereof are not repeated herein.
Continuing from the above, in step S405, the test apparatus 1 stops the test procedure, and in step S407, the test apparatus 1 stops instructing the electronic device 2 to be tested to perform the test. Therefore, the electronic device 2 to be tested is prevented from eliminating the fault phenomenon due to the indication of the test equipment 1. In practice, the testing apparatus 1 can further instruct the electronic device 2 to be tested to maintain the power-on state or the working state, so as to prevent the electronic device 2 to be tested from entering the sleep mode or being automatically powered off due to other factors, so that the error phenomenon is eliminated.
When the electronic device 2 under test does not provide the error warning address to the test apparatus 1 with reference to the state change of the electronic device 2 under test, the test apparatus 1 continues to perform step S401 or step S403. When the electronic device under test 2 provides the error warning address to the test apparatus 1, the test apparatus 1 proceeds from step S403 to step S405 and then to step S407.
Referring to fig. 5 again, fig. 5 is a functional block diagram of a testing apparatus according to another embodiment of the invention. In this embodiment, the test equipment 5 further comprises a power supply circuit 58. The power supply circuit 58 is electrically connected to the processing circuit 54 and the electronic device 2 under test. The processing circuit 54 is further configured to instruct the power supply circuit 58 to selectively supply power to the electronic device 2 under test according to the test procedure. In addition, when the processing circuit 54 determines that the second communication circuit 56 establishes a communication connection with another external electronic device (the external electronic device 4) corresponding to the error warning address, the processing circuit 54 interrupts the test procedure, and the processing circuit 54 instructs the electronic device 2 to be tested to maintain the power-on state, and the power supply circuit 58 continuously supplies power to the electronic device 2 to be tested. The circuit architecture of the power supply circuit 58 is related to the specification of the electronic device 2 to be tested, and is not limited herein.
In summary, the present invention provides a test apparatus and a test method. In the case of the test equipment, the test equipment continuously attempts to establish a connection with an external electronic device having a predetermined location during the test process. When an error occurs in the testing process, the testing equipment receives an error warning position provided by the electronic device to be tested, and the testing equipment replaces the preset address with the error warning address. In another aspect, when the test equipment receives the error warning address, the test equipment will attempt to establish a connection with another external electronic device corresponding to the error warning location. When the test equipment is successfully connected with another external electronic device, namely a problem occurs in the test process, the test equipment can perform corresponding measures so as to avoid the fault phenomenon caused by repeated startup and shutdown.
Although the present invention has been described with reference to the above embodiments, it is not intended to limit the invention. All changes and modifications that come within the spirit and scope of the invention are desired to be protected by the following claims. With regard to the scope of protection defined by the present invention, reference should be made to the appended claims.

Claims (6)

1. A test apparatus, comprising:
the first communication circuit is in communication connection with an electronic device to be tested;
the processing circuit is used for executing a test program and providing a power-on and power-off instruction for the electronic device to be tested through the first communication circuit, and the power-on and power-off instruction is used for indicating the electronic device to be tested to be selectively started or shut down;
the second communication circuit is electrically connected with the processing circuit and used for providing a connection request signal according to a preset address, and the preset address is an internet protocol address;
when the first communication circuit receives an error warning address provided by the electronic device to be tested, the processing circuit updates the preset address to the error warning address, and the second communication circuit is used for providing the connection request signal according to the updated preset address.
2. The apparatus of claim 1, wherein the second communication circuit is configured to connect to an external electronic device corresponding to the error warning address when the second communication circuit receives a connection confirmation signal corresponding to the error warning address, and the processing circuit stops the test procedure and instructs the electronic device under test to maintain a power-on state when the processing circuit determines that the second communication circuit is connected to the external electronic device corresponding to the error warning address.
3. The test apparatus as claimed in claim 2, further comprising a power supply circuit electrically connected to the processing circuit and the electronic device under test, the processing circuit further being configured to instruct the power supply circuit to selectively supply power to the electronic device under test according to the test program;
when the processing circuit judges that the second communication circuit establishes a communication connection with the external electronic device corresponding to the error warning address, the processing circuit interrupts the test program, the processing circuit indicates the electronic device to be tested to maintain a starting state, and the power supply circuit continuously supplies power to the electronic device to be tested.
4. A test method is suitable for an electronic device to be tested, and is characterized by comprising the following steps:
executing a test program, and indicating the electronic device to be tested to be selectively started or shut down according to the test program;
providing a connection request signal according to a preset address, wherein the preset address is an internet protocol address;
when a connection confirmation signal is not received in a preset time interval after the connection request signal is provided, providing the connection request signal again according to the preset address; and
when an error warning address provided by the electronic device to be tested is received, the preset address is updated to the error warning address, and the required connection signal is provided according to the updated preset address.
5. The test method of claim 4, further comprising:
judging whether a communication connection is established with an external electronic device corresponding to the error warning address; and
and stopping the test program and indicating the electronic device to be tested to maintain the starting state when judging that the communication connection is established with the external electronic device corresponding to the error warning address.
6. The test method of claim 4, further comprising:
selectively supplying power to the electronic device to be tested according to the test program;
judging whether a communication connection is established with an external electronic device corresponding to the error warning address; and
and when the communication connection with the external electronic device corresponding to the error warning address is judged to be established, interrupting the test program, indicating the electronic device to be tested to maintain a starting state and continuously supplying power to the electronic device to be tested.
CN201711096198.8A 2017-11-09 2017-11-09 Test equipment and test method Active CN107729204B (en)

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1453708A (en) * 2002-04-27 2003-11-05 神达电脑股份有限公司 Automatic periodic test system and method for power switch of computer equipment
CN102045211A (en) * 2009-10-19 2011-05-04 英业达股份有限公司 Power supply circulating pressure testing method
CN102087625A (en) * 2009-12-04 2011-06-08 鸿富锦精密工业(深圳)有限公司 Boot test system and test method
CN102540105A (en) * 2011-12-31 2012-07-04 曙光信息产业股份有限公司 Method for testing AC and DC on/off machines
CN103106128A (en) * 2011-11-14 2013-05-15 英业达科技有限公司 Cold startup switch machine test method and cold starting switch machine test system

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7661023B2 (en) * 2007-07-18 2010-02-09 International Business Machines Corporation System and method for verification of cache snoop logic and coherency between instruction & data caches for processor design verification and validation
US9324433B2 (en) * 2011-04-25 2016-04-26 Microsoft Technology Licensing, Llc Intelligent flash reprogramming

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1453708A (en) * 2002-04-27 2003-11-05 神达电脑股份有限公司 Automatic periodic test system and method for power switch of computer equipment
CN102045211A (en) * 2009-10-19 2011-05-04 英业达股份有限公司 Power supply circulating pressure testing method
CN102087625A (en) * 2009-12-04 2011-06-08 鸿富锦精密工业(深圳)有限公司 Boot test system and test method
CN103106128A (en) * 2011-11-14 2013-05-15 英业达科技有限公司 Cold startup switch machine test method and cold starting switch machine test system
CN102540105A (en) * 2011-12-31 2012-07-04 曙光信息产业股份有限公司 Method for testing AC and DC on/off machines

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