CN106130815B - Board level testing method and device - Google Patents
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Abstract
The embodiment of the invention relates to a board level test method, which comprises the following steps: when a system kernel starting notice sent by a mainboard is received, sending a test instruction for testing a target component to the mainboard; and when receiving operation data generated by the target component executing the test instruction within a preset time, determining whether the connection of the target component is normal or not according to the operation data. The embodiment of the invention also discloses a board-level testing device. Compared with the prior art, the technical scheme of the embodiment of the invention can carry out board level test on the mainboard after the system kernel of the equipment system is started without waiting for the equipment system to be completely started, thereby advancing the starting time of the board level test, further shortening the test time and improving the test efficiency.
Description
Technical Field
The embodiment of the invention relates to the technical field of testing, in particular to a board level testing method and device.
Background
The mainboard is used as the brain of the equipment operation and is a main circuit board for bearing a processor, a hard disk, a memory, an external equipment interface and the like of the equipment, wherein each functional part on the mainboard is respectively formed by welding different circuit components. Because the operation of the device depends on each functional module provided by the motherboard, in order to ensure that the device can normally operate, in the related art, after the motherboard is manufactured and before the motherboard is put into use, the connection condition of circuit components on the motherboard is usually tested, which is called board level test in the related art.
Taking the mainboard test of android equipment as an example, generally, technical staff sets up test APP (Application) in advance, after the mainboard preparation is accomplished, calls test APP to each functional module of mainboard is triggered through the different functions of operation test APP, thereby can be through the operation conditions of each functional module on the mainboard, whether the connection of the relevant circuit components of definite functional module is normal, reaches the purpose of board level test.
During the course of research and practice, the inventors found that the above-mentioned related art has at least the following problems:
because the operation of APP depends on the normal operation of the android system, and the android system is located on the uppermost layer of the equipment system of the android equipment, therefore, before the test APP is called and operated, the equipment system of the android equipment needs to be completely started at first, and after the equipment system is completely started, the test APP can be called, so that the time required by the test is long, and the test efficiency is low.
Disclosure of Invention
The embodiment of the invention provides a board level test method and device, which can solve the problems of long test time and low test efficiency of the related technology.
In a first aspect, an embodiment of the present invention provides a board level testing method, where the method includes:
when a system kernel starting notice sent by a mainboard is received, sending a test instruction for testing a target component to the mainboard;
and when receiving operation data generated by the target component executing the test instruction within a preset time, determining whether the connection of the target component is normal or not according to the operation data.
Preferably, after sending a test instruction for testing a target component to the motherboard, before determining whether the target component is normally connected according to the operation data, the method further includes:
judging whether the operation data is received or not according to a preset interval duration;
when the operation data is not received, accumulating the total duration of the operation data which is not received;
judging whether the total time length is greater than or equal to the preset time length or not;
if the total duration is greater than or equal to the preset duration, determining the target component as abnormal connection;
and if the total duration is less than the preset duration, repeatedly executing the step of judging whether the running data is received according to the preset interval duration.
Preferably, the determining whether the connection of the target component is normal according to the operation data includes:
and when the operating data is an error code obtained by the target component executing the test instruction, determining the target component as abnormal connection.
Preferably, the determining whether the connection of the target component is normal according to the operation data includes:
when the operation data is a result value obtained by the target component executing the test instruction, judging whether the result value is the same as a standard value;
if the result value is the same as the standard value, determining the target component as being normally connected;
and if the result value is not the same as the standard value, determining the target component as abnormal connection.
Preferably, the determining whether the connection of the target component is normal according to the operation data includes:
when the operation data is a result value obtained by the target component executing the test instruction, judging whether the result value is within a standard range;
if the result value is not in the standard range, determining the target component as abnormal connection;
if the result value is within the standard range, subtracting the result value from the maximum value in the standard range to obtain a first difference value, and determining the normal grade parameter of the target component according to the first difference value; or subtracting the minimum value in the standard range from the result value to obtain a second difference value, and determining the normal grade parameter of the target component according to the second difference value.
In a second aspect, an embodiment of the present invention provides a board level testing apparatus, where the apparatus includes:
the system comprises a sending module, a receiving module and a processing module, wherein the sending module is used for sending a test instruction of a test target component to a mainboard when receiving a system kernel starting notice sent by the mainboard;
and the first determining module is used for determining whether the connection of the target component is normal or not according to the operation data when the operation data generated by the target component executing the test instruction is received within a preset time length.
Preferably, the method further comprises the following steps: the first judgment module is used for judging whether the operation data is received or not according to the preset interval duration;
the calculation module is used for accumulating the total time length of the operation data which is not received when the operation data is not received;
the second judgment module is used for judging whether the total time length calculated by the calculation module is greater than or equal to the preset time length or not;
the second determining module is used for determining the target component as abnormal connection when the second judging module judges that the total duration is greater than or equal to the preset duration;
the first judging module is further configured to judge whether the operation data is received according to a preset interval duration when the second judging module judges that the total duration is smaller than the preset duration.
Preferably, the first determining module includes: a first determination unit, wherein,
the first determining unit is configured to determine that the target component is abnormal in connection when the operation data is an error code obtained by the target component executing the test instruction.
Preferably, the first determining module further comprises: a first judging unit and a second determining unit, wherein,
the first judging unit is used for judging whether the result value is the same as a standard value or not when the operation data is the result value obtained by the target component executing the test instruction;
the second determining unit is used for determining the target component as being normally connected when the result value is the same as the standard value; and the target component is determined to be abnormal in connection when the result value is different from the standard value.
Preferably, the first determining module further comprises: a second determination unit, a third determination unit, a calculation unit, and a fourth determination unit, wherein,
the second judging unit is configured to judge whether the result value is within a standard range when the operation data is the result value obtained by the target component executing the test instruction;
the third determining unit is configured to determine that the target component is abnormal in connection when the result value is not within the standard range;
the calculation unit is used for subtracting the result value from the maximum value in the standard range to obtain a first difference value when the result value is in the standard range;
the fourth determining unit is used for determining a normal grade parameter of the target component according to the first difference;
the calculation unit is further configured to subtract a minimum value in the standard range from the result value to obtain a second difference value when the result value is within the standard range;
and the fourth determining unit is further configured to determine a normal grade parameter of the target component according to the second difference.
In a third aspect, an embodiment of the present invention provides a board level testing apparatus, where the apparatus includes: a processor and a memory, wherein,
the memory is stored with operation information which can be executed by the processor;
the processor reads the operation information in the memory to realize the following method:
when a system kernel starting notice sent by a mainboard is received, sending a test instruction for testing a target component to the mainboard;
and when receiving operation data generated by the target component executing the test instruction within a preset time, determining whether the connection of the target component is normal or not according to the operation data.
Compared with the prior art, the technical scheme provided by the embodiment has the following advantages and characteristics:
in the scheme provided by the embodiment of the invention, in order to solve the problems of long test time and low test efficiency of the related technology, when a system kernel starting notice sent by a mainboard is received, a test server sends a test instruction for testing a target component to the mainboard, and when operation data generated by the target component running the test instruction is received within a preset time, whether the connection of the target component is normal or not is determined according to the operation data. That is, according to the technical solution of the embodiment of the present invention, after the system kernel of the device system is started, the board level test can be performed on the motherboard without waiting for the complete start of the device system, so that the start time of the board level test can be advanced, the test time can be further shortened, and the test efficiency can be improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.
Fig. 1 is a flowchart of a board level testing method according to an embodiment of the present invention.
Fig. 2 is a flowchart of another board level testing method according to an embodiment of the present invention.
Fig. 3 is a schematic diagram of board level test information interaction according to an embodiment of the present invention.
Fig. 4 is a schematic diagram of a board level testing apparatus according to an embodiment of the present invention.
Fig. 5 is a schematic diagram of another board level testing apparatus according to an embodiment of the present invention.
Detailed Description
The connection state of the circuit components on the mainboard is uncertain before board-level testing, and the starting and running of the equipment system depend on the normal running of the circuit components, so that under the condition that the connection state of the circuit components is unstable, the higher the level of the equipment system is started, the more unstable factors exist, the larger the influence of the equipment system on the test result of the board-level testing is, and the poorer the accuracy of the test result is further caused. The technical scheme of the embodiment of the invention can also solve the technical problems.
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Fig. 1 is a flowchart of a board level testing method according to an embodiment of the present invention. The board level test method shown in fig. 1 can test the main board without waiting for the complete start of the equipment system, thereby shortening the test time and improving the test efficiency. The method comprises the following steps.
And S101, when a system kernel starting notice sent by a mainboard is received, sending a test instruction of a test target component to the mainboard.
It should be noted that the device system start-up of the android device includes three stages: a first stage, bootloader (start loading), namely initializing hardware equipment and establishing a memory space mapping chart, and preparing a correct operating environment for starting a subsequent stage, wherein the operating environment is the bottommost layer of the system; the second phase, kernel (system kernel), which is the core part of the device operating system; and the third stage, android system. The kernel layer comprises a core operation module of the device operation system, and after the kernel layer is completely started, the device system can execute corresponding functions according to operation instructions. Based on this, the technical scheme of the embodiment of the invention can carry out board level test on the mainboard after the kernel is started.
Specifically, in the technical scheme of the embodiment of the invention, the test server is arranged, and during testing, the test server can be connected with the communication interface of the mainboard so as to perform information interaction with the mainboard. Referring to fig. 3, fig. 3 is a schematic diagram illustrating board-level test information interaction according to an embodiment of the present invention, in this embodiment, a notification module is disposed inside a motherboard, and in a process of starting an equipment system, when a last module of a kernel is started, the notification module is triggered, so that the notification information of the kernel start is sent to a test server, so that the test server starts testing the motherboard.
In this embodiment, the test instruction is an operation instruction for triggering a target function of the device; the target component refers to execution hardware on the mainboard corresponding to the target function. It should be noted that the target component may be a plurality of circuit components, and the embodiment of the present invention is not limited thereto. The board level test is a test for testing whether the connection of the circuit components on the mainboard is normal or not, and each circuit component on the mainboard is hardware for executing the system function, and different functions correspond to different execution hardware. Therefore, in this embodiment, after receiving the notification information that the kernel is started and sent by the motherboard, as shown in fig. 3, the test server sends a test instruction to the motherboard, so as to trigger a corresponding target function through the test instruction, and further enable the motherboard to test a corresponding target component by executing the target function.
It should be noted that the test instruction is an operation instruction, for example, a click instruction. In this embodiment, after receiving a system kernel start notification sent by the motherboard, the test server may send test instructions to the motherboard one by one, so that the motherboard executes corresponding functions through the target electrical component, and completes the test on the target electrical component. Specifically, the test server may store the test instruction in a table, and select the test instruction to be sent item by item through a pointer.
According to the description of the embodiment, different test instructions correspond to different target components, so that the circuit components of the mainboard can be tested respectively, the test process is more flexible, and compared with a mode of calling the test APP in the related technology, the test can be more targeted for the circuit components, and the accuracy of the test result is improved.
In addition, since the startup of the kernel also depends on the normal operation of the hardware, after the mainboard is powered on, the kernel may not be started due to the hardware defect, so that the test server cannot receive the kernel startup notification information sent by the mainboard, and further cannot perform further test. Therefore, when the mainboard is powered on, the test server can receive the power-on notification information of the mainboard and start timing, and if the kernel start notification sent by the mainboard is not received within a certain time, the circuit components of the mainboard are determined to be abnormal in connection. For example, in a preferred example of the present invention, after receiving a power-on notification of a motherboard, if the notification information of the startup of a kernel sent by the motherboard is not received within 15s, the test server may determine that a circuit component of the motherboard is abnormal in connection.
And S102, when receiving operation data generated by the target component executing the test instruction within a preset time, determining whether the connection of the target component is normal or not according to the operation data.
According to the above description, after the main board receives the test instruction, the main board executes the corresponding operation according to the content of the test instruction, and can generate the operation data within the preset time. Because the operation data can reflect the connection status of the target component, please refer to fig. 3, after the motherboard generates the operation data, the motherboard sends the operation data to the test server, and the test server can determine whether the connection of the target component is abnormal according to the operation data.
The preset time length may be set in advance according to a conventional timeout time length for the device to execute the test instruction, for example, in a preferred example of the present invention, the preset time length may be 20 s.
It should be noted that, when the target component is abnormally connected, the motherboard cannot normally execute the test instruction through the target component, so that the obtained operation data is different from the correct operation data, in this embodiment, the test server may store the correct operation data corresponding to each test instruction in advance, and after receiving the operation data sent by the target component, the test server may compare the received operation data with the corresponding correct operation data, so as to determine the connection status of the target component according to the relationship between the received operation data and the corresponding correct operation data. In addition, the operation data obtained by the motherboard executing different test instructions is also different, and generally, the operation data may be two types of data: a result value obtained by executing the test instruction, and a status code of the result obtained by executing the test instruction. The following is a detailed description of the above two types of operation data, respectively.
When the operation data is the state code, the test server can read the content of the state code and judge whether the operation data is the error state code, if the operation data is the error state code, the test server indicates that the target component cannot normally execute the test instruction, and further indicates that the target component is abnormal in connection, so that the target component can be determined to be abnormal in connection; if the state code is correct, the target component is indicated to normally execute the test instruction, and the target component is normally connected, the target component can be determined to be normally connected.
For example, the test instruction is a "click" instruction, in this embodiment, the function triggered by the "click" instruction is a "send" function, if the target component normally executes the "click" instruction, the "send" function is successfully triggered, the generated operation data may be a status code that successfully triggers "send", and the test server may determine that the target component is normally connected after receiving the status code that successfully triggers "send". If the target component cannot normally execute the "click" instruction, the "send" function cannot be triggered, the generated operating data is an error code, for example, the error code 303 may be the error code, and the test server may determine that the target component is abnormal in connection after receiving the error status code 303.
In another embodiment, when the operation data is a result value, since the standard data types obtained by normally executing the test instruction under different operation scenarios may include two types, a standard value and a standard range, the embodiment is described based on the two standard data types, respectively.
When the operation data corresponding to the normally executed test instruction is a standard value, after receiving the result value of the target component, the test server can judge whether the result value is the same as the corresponding standard value, if the result value is the same as the corresponding standard value, the test instruction is normally executed, and the target component is determined to be normally connected; and if the result value is not the same as the corresponding standard value, the test instruction is not normally executed, and the target component is determined to be abnormal in connection.
For example, when the test instruction is "acquire current time", the relevant target component on the motherboard calculates the current time, and sends the calculated time to the test server. If the standard time stored in the test server is 9:30, if the received time is 9:30, the calculation of the target component is correct, and the target component can be determined to be normally connected; if the received time is not 9:30, indicating that the target component is miscalculated, the target component may be determined to be a connection anomaly.
When the operation data corresponding to the normally executed test instruction is in the standard range, after receiving the result value of the target component, the test server can judge whether the result value is in the standard range, if the result value is in the standard range, the test instruction is normally executed, and the target component is determined to be normally connected; and if the result value is not in the standard range, the test instruction is not normally executed, and the target component is determined to be abnormal in connection.
For example, when the test instruction is "send message", the corresponding target component starts timing when executing the "send" function, and stops timing when the sending is successful, so as to obtain a sending duration, and sends the sending duration to the test server. In this embodiment, it is assumed that the standard range of the sending duration is recorded as 0.5s to 3s, and if the sending duration received by the test server is 1.5s, the sending duration is considered to be within the normal range, and the connection can be determined to be normal; if the sending time length received by the test server is 3.5s, the sending time length is considered to be beyond the normal range, and the connection abnormality can be determined.
It should be noted that, in order to facilitate recording the test result, the technical solution of the embodiment of the present invention may use, but is not limited to, the identifier to indicate that the connection is normal and the connection is abnormal. For example, in a preferred example of the present invention, parameters 0 and 1 may be used for representation, where parameter 0 represents connection abnormality and parameter 1 represents connection normality.
Furthermore, when the operation data corresponding to the normally executed test command is in the standard range, although the connection of the target component is normal when the result value is within the standard range, if the result value is larger or smaller, it may indicate that there is a potential risk in the connection of the target component. Therefore, in this embodiment, the normal level parameter may also be preset, and when the result value is within the standard range, a first difference value is obtained by subtracting the result value from the maximum value in the standard range, and the normal level parameter of the target component is determined according to the first difference value; or subtracting the minimum value in the standard range from the result value to obtain a second difference value, and determining the normal grade parameter of the target component according to the second difference value. It should be noted that, the corresponding relationship between the normal level parameter and the first difference or the second difference may be preset according to the requirement of the operation scenario, and the normal level parameter of the target component may be recorded according to the size of the first difference or the second difference.
For example, taking the sending time period as an example, it is assumed that the preset normal level parameter range is 0.2-0.9, wherein the larger the value is, the larger the degree of normality is. Since the present embodiment is a sending duration, generally, the shorter the sending duration is, the closer to the ideal state is indicated, and therefore, the closer the sending duration received by the test server is to the minimum value of the standard range, the larger the normal level parameter is. That is, in this embodiment, the larger the first difference or the smaller the second difference, the larger the normal level parameter is, for example, the received transmission time length is 0.8s, and the normal level parameter may be set to 0.9; and the smaller the first difference or the larger the second difference, the smaller the normal level parameter, e.g., the received transmission time period is 2.5s, the normal level parameter may be set to 0.3.
Of course, the above embodiment is only one preferred example of the present invention, and in the technical solution of the embodiment of the present invention, the corresponding relationship between the normal level parameter and the first difference and/or the second difference may be set according to the requirements of the application scenario. For example, when the standard range defines the frequency of data processing, and in this scenario, the higher the frequency is, the closer the frequency is to the ideal state, then in this embodiment, the smaller the first difference value is or the larger the second difference value is, the larger the corresponding normal level parameter is; the larger the first difference value is or the smaller the second difference value is, the smaller the corresponding normal level parameter is. Specifically, the embodiment of the present invention is not limited to this.
As can be seen from the description of this embodiment, the board level testing method according to this embodiment can perform board level testing on the motherboard after the kernel of the motherboard system is started, and does not need to wait for the complete start of the device system, so that the start time of the board level testing can be advanced, the testing time can be shortened, and the testing efficiency can be improved.
On the basis of the above embodiments, in order to enable those skilled in the art to more clearly and more specifically understand the present solution, another embodiment is provided in the embodiments of the present invention. Referring to fig. 2, fig. 2 is a flowchart of another board level testing method according to an embodiment of the present invention.
It should be noted that, in the present embodiment, a supplementary description is provided for the above embodiment, so that the same contents in fig. 2 as those in fig. 1 can be referred to the corresponding description in fig. 1, and the details of the present embodiment are not repeated herein. With respect to the embodiment shown in fig. 1, the embodiment shown in fig. 2 further includes the following steps after step S101:
step S103, judging whether the operation data is received or not according to a preset interval time length, and executing step S102 when the operation data generated by the target component executing the test instruction is received within the preset interval time length; when the operation data is not received, step S104 is executed.
In view of the fact that the execution of the test instruction depends on the normal operation of the target component, and whether the target component can normally operate cannot be determined in the current scenario, in this embodiment, after the test server sends the test instruction to the motherboard, whether the operation data of the target component is received or not can be detected according to a certain interval duration, so that whether the time for the target component to execute the test instruction exceeds the timeout duration or not can be determined, and a more comprehensive judgment standard can be provided for whether the target component is normally connected or not.
It should be noted that, in this embodiment, the preset interval duration may be set according to a conventional duration for the motherboard to normally execute the test instruction, for example, a duration required for normally executing the function corresponding to the test instruction is 0.2s, and in this embodiment, the preset interval duration may be set to 0.2 s.
And step S104, accumulating the total duration of the operation data which is not received.
In order to record the time length of the target component for executing the test instruction and provide reference data for the subsequent test process, when the running data of the target component is not received, the total time length of the unreceived running data is accumulated.
Step S105, judging whether the total duration is greater than or equal to the preset duration, and executing step S106 when the total duration is greater than or equal to the preset duration; and when the total duration is less than the preset duration, executing step S103.
In this embodiment, it is not determined whether the target component can normally operate, and therefore, there may be a case that the target component does not respond when the target component is overtime, so that for smooth performance of other test items, the test server may determine whether the total duration reaches the overtime duration, and if the total duration does not reach the overtime duration and the test server receives the operation data, determine whether the connection of the target component is normal according to the operation data, specifically, refer to the description of the above embodiment; if the total duration does not reach the timeout duration, but the test server does not receive the operation data, whether the operation data is received or not is continuously detected until the operation data is received in the timeout duration, or the total duration reaches or exceeds the timeout duration.
Based on the description of the above embodiment, a preset time length is set in the embodiment of the present invention, and the preset time length may be set in advance according to a conventional timeout length for executing the test instruction by the device, that is, the preset time length in the embodiment of the present invention is the timeout length for executing the test instruction by the target component.
And step S106, determining the target component as abnormal connection.
Based on the above description, when the total time length that the test server does not receive the operation data reaches or exceeds the preset time length, the target component can be considered to be incapable of executing the test instruction normally, and the target component is determined to be abnormal in connection.
Therefore, according to the technical scheme of the embodiment, the test server can detect the total time of the target component responding to the test instruction after sending the test instruction, and when the total time reaches the timeout time, the target component is determined to be abnormal in connection, so that a more comprehensive data basis can be provided for the test, and the test efficiency can be improved.
Further, in order to facilitate the maintenance of the motherboard by the technician, during the test, the target component with abnormal connection may be marked in a focused manner, for example, in this embodiment, the target component with normal connection may be marked with a common song body, the target component with abnormal connection may be marked with a red and thickened song body, and for the target component with a normal grade parameter lower than a certain value, the target component with a normal grade parameter lower than a certain value may be marked with a yellow and thickened song body. Specifically, the setting may be flexible, and the embodiment of the present invention is not limited thereto.
To sum up, in order to solve the problems of long test time and low test efficiency in the related art, the board-level test method provided in the embodiment of the present invention includes sending a test instruction for testing a target device to a motherboard when receiving a system kernel start notification sent by the motherboard, and determining whether connection of the target device is normal according to operation data when receiving operation data generated by the target device running the test instruction within a preset time period. That is, according to the technical solution of the embodiment of the present invention, after the system kernel of the device system is started, the board level test can be performed on the motherboard without waiting for the complete start of the device system, so that the start time of the board level test can be advanced, the test time can be further shortened, and the test efficiency can be improved.
Corresponding to the implementation method, the embodiment of the invention also provides a board-level testing device. Referring to fig. 4, fig. 4 is a schematic diagram of a board level testing apparatus according to an embodiment of the present invention. The apparatus comprises a sending module 11 and a first determining module 12, wherein: the system comprises a sending module 11, a test module and a control module, wherein the sending module is used for sending a test instruction of a test target component to a mainboard when receiving a system kernel starting notice sent by the mainboard; the first determining module 12 is configured to determine whether connection of the target component is normal according to operation data generated when the target component executes the test instruction within a preset time period.
Furthermore, the apparatus further comprises: and the first judgment module is used for judging whether the operation data is received or not according to the preset interval duration.
And the calculating module is used for accumulating the total time length of not receiving the operation data when the operation data is not received.
And the second judgment module is used for judging whether the total time length calculated by the calculation module is greater than or equal to the preset time length.
And the second determining module is used for determining the target component as abnormal connection when the second judging module judges that the total duration is greater than or equal to the preset duration.
The first judging module is further configured to judge whether the operation data is received according to a preset interval duration when the second judging module judges that the total duration is smaller than the preset duration.
It should be noted that, in a specific embodiment, the first determining module 12 includes: the first determining unit is configured to determine that the target component is abnormal in connection when the operation data is an error code obtained by the target component executing the test instruction.
In another embodiment, the first determination module 12 includes: the device comprises a first judging unit and a second determining unit, wherein the first judging unit is used for judging whether the result value is the same as a standard value or not when the operation data is the result value obtained by the target component executing the test instruction.
The second determining unit is used for determining the target component as being normally connected when the result value is the same as the standard value; and the target component is determined to be abnormal in connection when the result value is different from the standard value.
Furthermore, in another embodiment, the first determining module 12 may further include: a second determination unit, a third determination unit, a calculation unit, and a fourth determination unit, wherein,
and the second judging unit is used for judging whether the result value is in a standard range or not when the operation data is the result value obtained by the target component executing the test instruction.
And the third determining unit is used for determining the target component as abnormal connection when the result value is not in the standard range.
And the calculating unit is used for subtracting the result value from the maximum value in the standard range to obtain a first difference value when the result value is in the standard range.
And the fourth determining unit is used for determining the normal grade parameters of the target component according to the first difference.
The calculating unit is further configured to use the result value to subtract a minimum value in the standard range to obtain a second difference value when the result value is within the standard range.
And the fourth determining unit is further configured to determine a normal grade parameter of the target component according to the second difference.
With regard to the apparatus in the above embodiments, the specific manner in which each module and unit performs operations has been described in detail in the embodiments related to the method, and will not be described in detail here.
Therefore, in the solution provided by the embodiment of the present invention, in order to solve the problems of long test time and low test efficiency of the related art, the technical solution of the embodiment of the present invention can perform board level test on the motherboard after the system kernel of the device system is started, and does not need to wait for the complete start of the device system, so that the start time of the board level test can be advanced, the test time can be further shortened, and the test efficiency can be improved.
Based on the above description, an embodiment of the present invention further provides a board level testing apparatus, and referring to fig. 5, a schematic diagram of another board level testing apparatus provided in an embodiment of the present invention is shown. The device includes: a processor 21 and a memory 22, wherein,
the memory 22 stores operation information that the processor can execute.
The processor 21 reads the operation information in the memory 22 for implementing the following method:
and when a system kernel starting notice sent by the mainboard is received, sending a test instruction for testing the target component to the mainboard.
And when receiving operation data generated by the target component executing the test instruction within a preset time, determining whether the connection of the target component is normal or not according to the operation data.
In summary, in the solution provided in the embodiment of the present invention, to solve the problems of long test time and low test efficiency in the related art, when a system kernel start notification sent by a motherboard is received, a test server sends a test instruction for testing a target device to the motherboard, and when operation data generated by the target device running the test instruction is received within a preset time period, determines whether connection of the target device is normal according to the operation data. That is, according to the technical solution of the embodiment of the present invention, after the system kernel of the device system is started, the board level test can be performed on the motherboard without waiting for the complete start of the device system, so that the start time of the board level test can be advanced, the test time can be further shortened, and the test efficiency can be improved.
The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and all the changes or substitutions should be covered within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (9)
1. A board level testing method, the method comprising:
when a system kernel starting notice sent by a mainboard is received, sending a test instruction for testing a target component to the mainboard;
when receiving operation data generated by the target component executing the test instruction within a preset time, determining whether the connection of the target component is normal or not according to the operation data;
after sending a test instruction for testing a target component to the motherboard, before determining whether the target component is normally connected according to the operation data, the method further includes:
judging whether the operation data is received or not according to a preset interval duration;
when the operation data is not received, accumulating the total duration of the operation data which is not received;
judging whether the total time length is greater than or equal to the preset time length or not;
if the total duration is greater than or equal to the preset duration, determining the target component as abnormal connection;
and if the total duration is less than the preset duration, repeatedly executing the step of judging whether the running data is received according to the preset interval duration.
2. The board level testing method of claim 1, wherein the determining whether the target component connection is normal based on the operational data comprises:
and when the operating data is an error code obtained by the target component executing the test instruction, determining the target component as abnormal connection.
3. The board level testing method of claim 1, wherein the determining whether the target component connection is normal based on the operational data comprises:
when the operation data is a result value obtained by the target component executing the test instruction, judging whether the result value is the same as a standard value;
if the result value is the same as the standard value, determining the target component as being normally connected;
and if the result value is not the same as the standard value, determining the target component as abnormal connection.
4. The board level testing method of claim 1, wherein the determining whether the target component connection is normal based on the operational data comprises:
when the operation data is a result value obtained by the target component executing the test instruction, judging whether the result value is within a standard range;
if the result value is not in the standard range, determining the target component as abnormal connection;
if the result value is within the standard range, subtracting the result value from the maximum value in the standard range to obtain a first difference value, and determining the normal grade parameter of the target component according to the first difference value; or subtracting the minimum value in the standard range from the result value to obtain a second difference value, and determining the normal grade parameter of the target component according to the second difference value.
5. A board level test apparatus, the apparatus comprising:
the system comprises a sending module, a receiving module and a processing module, wherein the sending module is used for sending a test instruction of a test target component to a mainboard when receiving a system kernel starting notice sent by the mainboard;
the first determining module is used for determining whether the connection of the target component is normal or not according to the operation data when the operation data generated by the target component executing the test instruction is received within a preset time length:
the first judgment module is used for judging whether the operation data is received or not according to the preset interval duration;
the calculation module is used for accumulating the total time length of the operation data which is not received when the operation data is not received;
the second judgment module is used for judging whether the total time length calculated by the calculation module is greater than or equal to the preset time length or not;
the second determining module is used for determining the target component as abnormal connection when the second judging module judges that the total duration is greater than or equal to the preset duration;
the first judging module is further configured to judge whether the operation data is received according to a preset interval duration when the second judging module judges that the total duration is smaller than the preset duration.
6. The board level test apparatus of claim 5, wherein the first determining module comprises:
the first determining unit is configured to determine that the target component is abnormal in connection when the operation data is an error code obtained by the target component executing the test instruction.
7. The board level test apparatus of claim 5, wherein the first determining module further comprises:
a first judging unit and a second determining unit, wherein,
the first judging unit is used for judging whether the result value is the same as a standard value or not when the operation data is the result value obtained by the target component executing the test instruction;
the second determining unit is used for determining the target component as being normally connected when the result value is the same as the standard value; and the target component is determined to be abnormal in connection when the result value is different from the standard value.
8. The board level test apparatus of claim 5, wherein the first determining module further comprises:
a second determination unit, a third determination unit, a calculation unit, and a fourth determination unit, wherein,
the second judging unit is configured to judge whether the result value is within a standard range when the operation data is the result value obtained by the target component executing the test instruction;
the third determining unit is configured to determine that the target component is abnormal in connection when the result value is not within the standard range;
the calculation unit is used for subtracting the result value from the maximum value in the standard range to obtain a first difference value when the result value is in the standard range;
the fourth determining unit is used for determining a normal grade parameter of the target component according to the first difference;
the calculation unit is further configured to subtract a minimum value in the standard range from the result value to obtain a second difference value when the result value is within the standard range;
and the fourth determining unit is further configured to determine a normal grade parameter of the target component according to the second difference.
9. A board level test apparatus, the apparatus comprising: a processor and a memory, wherein,
the memory is stored with operation information which can be executed by the processor;
the processor reads the operation information in the memory to realize the following method:
when a system kernel starting notice sent by a mainboard is received, sending a test instruction for testing a target component to the mainboard;
and when receiving operation data generated by the target component executing the test instruction within a preset time, determining whether the connection of the target component is normal or not according to the operation data.
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| CN110727552B (en) * | 2019-10-12 | 2023-10-31 | 深圳市元征科技股份有限公司 | Equipment testing method, system, electronic equipment and storage medium |
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