CN107656099A - A kind of pressure fixture for crimp type semiconductor chip electrical characteristics test - Google Patents

A kind of pressure fixture for crimp type semiconductor chip electrical characteristics test Download PDF

Info

Publication number
CN107656099A
CN107656099A CN201710845789.4A CN201710845789A CN107656099A CN 107656099 A CN107656099 A CN 107656099A CN 201710845789 A CN201710845789 A CN 201710845789A CN 107656099 A CN107656099 A CN 107656099A
Authority
CN
China
Prior art keywords
pressure
type semiconductor
emitter stage
crimp type
semiconductor chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201710845789.4A
Other languages
Chinese (zh)
Inventor
莫申扬
袁文迁
赵志斌
崔翔
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
North China Electric Power University
Original Assignee
North China Electric Power University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by North China Electric Power University filed Critical North China Electric Power University
Priority to CN201710845789.4A priority Critical patent/CN107656099A/en
Publication of CN107656099A publication Critical patent/CN107656099A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/04Housings; Supporting members; Arrangements of terminals
    • G01R1/0408Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets
    • G01R1/0425Test clips, e.g. for IC's
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851Testing of integrated circuits [IC]
    • G01R31/2853Electrical testing of internal connections or -isolation, e.g. latch-up or chip-to-lead connections

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Engineering & Computer Science (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

The invention discloses a kind of pressure fixture for crimp type semiconductor chip electrical characteristics test.The pressure fixture includes:Insulating base, the calibrating terminal located at the insulating base lower surface, the pressure frame located at the insulating base upper surface and pressure stud;The insulating base forms an accommodating cavity with the pressure frame, and the accommodating cavity is used to house crimp type semiconductor chip;The pressure stud is arranged in the top of the pressure frame, and the crimp type semiconductor chip is pressed.Crimp type semiconductor chip can be pressed using pressure fixture provided by the present invention.

Description

A kind of pressure fixture for crimp type semiconductor chip electrical characteristics test
Technical field
The present invention relates to semiconductor chip electrical characteristics test field, and crimp type semiconductor core is directed to more particularly to one kind The pressure fixture of piece electrical characteristics test.
Background technology
Traditional welding formula semiconductor chip only needs to realize that its electrical contact can be used by key and line.Due to crimp type Semiconductor chip (such as crimp type IGBT (Insulated Gate BipolarTranslator) chips and crimp type FRD (Fast Recovery Diode) chip) to the particular/special requirement of pressure, it is necessary to it can just realize that it respectively extremely electrically connects by the fixture that presses Touch, when electrical characteristics test equipment tests the electrical characteristic of IGBT device, traditional pressure fixture uses the pressure of stud rotation The pressure mode of mode or hydraulic pressurization ensures the electrical contact between IGBT module terminal.But traditional pressure fixture is all pin Whole IGBT module is designed, volume is larger, due to smaller, the larger clamp structure of the pressure requirements of crimp type semiconductor chip Chip may be caused to damage in pressure, therefore, traditional pressure fixture can not press to crimp type semiconductor chip.
The content of the invention
It is an object of the invention to provide a kind of pressure fixture for crimp type semiconductor chip electrical characteristics test, with solution The problem of certainly pressure fixture can not press to crimp type semiconductor chip in the prior art.
To achieve the above object, the invention provides following scheme:
A kind of pressure fixture for crimp type semiconductor chip electrical characteristics test, including:Insulating base, located at described The calibrating terminal of insulating base lower surface, the pressure frame located at the insulating base upper surface and pressure stud;
The insulating base forms an accommodating cavity with the pressure frame, and the accommodating cavity is used to house crimp type semiconductor Chip;The pressure stud is arranged in the top of the pressure frame, and the crimp type semiconductor chip is pressed.
Optionally, specifically included inside the accommodating cavity:
Emitter stage convex board locating slot on the insulating base, in the emitter stage convex board locating slot Emitter stage convex board, the boss on the emitter stage convex board and the gate pcb;The grid printing Circuit board center is provided with the perforation to match with the shape of the boss, and the gate pcb is arranged by the perforation In boss periphery;
The crimp type semiconductor chip is sheathed on the boss and in the gate pcb;The grid Printed circuit board (PCB) is in contact with the grid of the crimp type semiconductor chip, the boss and the crimp type semiconductor chip Emitter stage is in contact.
Optionally, the pressure clamp body includes:One the first transverse arm and two the first vertical arm;Each first vertical arm Fixing end be vertically connected at the end of first transverse arm, the free end of each first vertical arm is provided with positioning stud, institute State the first transverse arm and be provided with pressure circular hole, the pressure stud is arranged in the pressure circular hole.
Optionally, the contact face that the pressure stud is in contact with the crimp type semiconductor chip is hemisphere face.
Optionally, the material of the gate pcb is insulating materials, the gate pcb and the pressure The contact surface that direct type semiconductor chip is in contact has layers of copper.
Optionally, the insulating base, is specifically included:The lower surface of the insulating base is provided with emitter stage test board, grid Pole test board and pressure frame planker;
The both ends of the emitter stage test board are provided with emitter stage calibrating terminal, and the emitter stage test board is provided with the first hair Emitter-base bandgap grading instrument connection, the emitter stage convex board locating slot is interior to be provided with the second emitter stage corresponding with the first emitter stage instrument connection Instrument connection, the emitter stage calibrating terminal by the first emitter stage instrument connection, the second emitter stage instrument connection with it is described Boss is connected, and the emitter stage calibrating terminal is used for the emitter stage for testing the crimp type semiconductor chip;
The both ends of the grid test board are provided with grid calibrating terminal, and the grid test board is tested provided with first grid Hole, the upper surface of the insulating base are provided with second grid instrument connection corresponding with the first grid instrument connection, the grid Calibrating terminal is connected by the first grid instrument connection, the second grid instrument connection with the gate pcb, The grid calibrating terminal is used for the grid for testing the crimp type semiconductor chip;
The both ends of the pressure frame planker are provided with the first pressure frame positioning hole, and the pressure frame planker is surveyed provided with colelctor electrode Terminal is tried, the upper surface of the insulating base is provided with the second pressure frame positioning hole corresponding with the described first pressure frame positioning hole, When the pressure stud presses to the crimp type semiconductor chip, the pressure stud and the crimp type semiconductor chip Colelctor electrode be in contact, the colelctor electrode calibrating terminal by the described first pressure frame positioning hole, the second pressure frame positioning hole with The positioning stud is connected, and the colelctor electrode calibrating terminal is used for the colelctor electrode for testing the crimp type semiconductor chip.
Optionally, the emitter stage calibrating terminal includes emitter power signal terminal and emitter stage test signal end Son;
The grid calibrating terminal includes gate power signal terminal and signal calibrating terminal;
The colelctor electrode calibrating terminal includes Power of collector signal terminal and colelctor electrode test signal terminal.
Optionally, the pressure fixture also includes:Location nut;
The positioning stud sequentially passes through the second pressure frame positioning hole and the first pressure frame positioning hole by institute State location nut fastening.
Optionally, the emitter stage convex board is detachable;The boss is detachable;The gate pcb is removable Unload.
According to specific embodiment provided by the invention, the invention discloses following technique effect:The present invention provides a kind of energy Enough pressure fixtures to crimp type semiconductor chip pressure, crimp type semiconductor chip is placed in inside pressure fixture, due to applying Press the lifting surface area of stud smaller, it is also smaller to the pressure of the crimp type semiconductor chip, therefore, it is possible to pass through the stud that presses Directly crimp type semiconductor chip is pressed and the crimp type semiconductor chip will not be caused to damage.
Brief description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, below will be to institute in embodiment The accompanying drawing needed to use is briefly described, it should be apparent that, drawings in the following description are only some implementations of the present invention Example, for those of ordinary skill in the art, without having to pay creative labor, can also be according to these accompanying drawings Obtain other accompanying drawings.
Fig. 1 is pressure fixture schematic diagram provided by the present invention;
Fig. 2 is accommodating cavity cleavage map provided by the present invention;
Fig. 3 is the structure chart of insulating base upper surface provided by the present invention;
Fig. 4 is the structure chart of insulating base lower surface provided by the present invention;
Fig. 5 is pressure fixture cleavage map provided by the present invention;
Fig. 6 is the upward view of pressure fixture provided by the present invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete Site preparation describes, it is clear that described embodiment is only part of the embodiment of the present invention, rather than whole embodiments.It is based on Embodiment in the present invention, those of ordinary skill in the art are obtained every other under the premise of creative work is not made Embodiment, belong to the scope of protection of the invention.
, can it is an object of the invention to provide a kind of pressure fixture for crimp type semiconductor chip electrical characteristics test Crimp type semiconductor chip is pressed and crimp type semiconductor chip will not be caused to damage.
In order to facilitate the understanding of the purposes, features and advantages of the present invention, it is below in conjunction with the accompanying drawings and specific real Applying mode, the present invention is further detailed explanation.
Fig. 1 is pressure fixture schematic diagram provided by the present invention, as shown in figure 1, a kind of be directed to crimp type semiconductor chip The pressure fixture of electrical characteristics test, including:Insulating base 1-1, the calibrating terminal 1- located at the insulating base 1-1 lower surfaces 2nd, located at the pressure frame 1-3 and pressure stud 1-4 of the insulating base 1-1 upper surfaces;
The insulating base 1-1 forms an accommodating cavity with the pressure frame 1-3, and the accommodating cavity is used to house crimp type Semiconductor chip;The pressure stud 1-4 is arranged in the top of the pressure frame 1-3, and the crimp type semiconductor chip is applied Pressure.
Following advantage be present using pressure fixture provided by the present invention:
First, when traditional pressure fixture is to crimp type semiconductor die testing, to ensure crimp type semiconductor chip not By direct pressure destruction, it is necessary to which crimp type semiconductor chip is placed in device package, traditional pressure fixture is caused to apply During pressure, to the accurate pressure of crimp type semiconductor chip in uncontrollable shell, easily produce at crimp type semiconductor chip and press The excessive failure of power or chip do not have the situation of electrical contact.The present invention by directly being pressed to crimp type semiconductor chip, Ensure that stress is accurate during chip testing;
Secondly, traditional pressure clamp product is larger, can not be arranged on inside test equipment, according to traditional pressure fixture Or device for exerting is (such as:Fixture or forcing press etc.), the wire that press needs to grow very much between fixture and test equipment connects as signal Connect, then the parasitic parameter of wire will largely effect on test result.And the invention provides simplifying compact single boss to press fixture, Pressure fixture provided by the present invention can be integrated into test equipment, it is not necessary to which very long wire connects as signal, subtracts While small stray parameter, test operation is facilitated.
Fig. 2 is accommodating cavity cleavage map provided by the present invention, as shown in Fig. 2 in actual measurement process, the accommodating cavity Inside specifically includes:Emitter stage convex board locating slot 2-1 on the insulating base 1-1, located at the emitter stage boss Emitter stage convex board 2-2 in plate locating slot 2-1, the boss 2-3 on the emitter stage convex board 2-2 and the grid Printed circuit board (PCB) 2-4;The gate pcb 2-4 centers are provided with the perforation to match with the shape of the boss 2-3, institute State gate pcb 2-4 and the boss 2-3 peripheries are sheathed on by the perforation;
The crimp type semiconductor chip 2-5 is sheathed on the boss 2-3 and is located at the gate pcb 2-4 On;The gate pcb 2-4 is in contact with the grid of the crimp type semiconductor chip 2-5, the boss 2-3 and institute The emitter stage for stating crimp type semiconductor chip 2-5 is in contact.
In actual applications, the pressure frame 1-3 is specifically included:One the first transverse arm and two the first vertical arm;Each institute The fixing end for stating the first vertical arm is vertically connected at the end of first transverse arm, and the free end of each first vertical arm, which is provided with, determines Position stud 2-6, first transverse arm are provided with pressure circular hole 2-7, the pressure stud 1-4 and are arranged in the pressure circular hole 2-7; The pressure stud 1-4 is hemisphere face with the crimp type semiconductor chip 2-5 contact faces being in contact.
In actual applications, the material of the gate pcb 2-4 is insulating materials, the gate pcb 2-4 has layers of copper with the crimp type semiconductor chip 2-5 contact surfaces being in contact.
In actual applications, as shown in Figure 3-Figure 5, the insulating base 1-1, is specifically included:The insulating base 1-1's Lower surface is provided with emitter stage test board 4-1, grid test board 4-2 and pressure frame planker 4-3;
The both ends of the emitter stage test board 4-1 are provided with emitter stage calibrating terminal, and the emitter stage test board 4-1 is provided with It is provided with and the first emitter stage instrument connection 4-4 in first emitter stage instrument connection 4-4, the emitter stage convex board locating slot 2-1 Corresponding second emitter stage instrument connection 3-1, the emitter stage calibrating terminal pass through the first emitter stage instrument connection 4-4, described Second emitter stage instrument connection 3-1 is connected with the boss 2-3, and the emitter stage calibrating terminal is used to test the crimp type half Conductor chip 2-5 emitter stage;
The both ends of the grid test board 4-2 are provided with grid calibrating terminal, and the grid test board 4-2 is provided with the first grid Pole instrument connection 4-5, the insulating base 1-1 upper surface are provided with second grid corresponding with the first grid instrument connection 4-5 Instrument connection 3-2, the grid calibrating terminal pass through the first grid instrument connection 4-5, the second grid instrument connection 3-2 and institute State gate pcb 2-4 to be connected, the grid calibrating terminal is used for the grid for testing the crimp type semiconductor chip 2-5 Pole;
The both ends of the pressure frame planker 4-3 are provided with the first pressure frame positioning hole 4-6, the pressure frame planker 4-3 and set There is a colelctor electrode calibrating terminal, the upper surface of the insulating base 1-1 is provided with corresponding with the described first pressure frame positioning hole 4-6 the Two pressure frame positioning hole 3-3, when the pressure stud 1-4 presses to the crimp type semiconductor chip 2-5, the pressure spiral shell Post 1-4 is in contact with the colelctor electrode of the crimp type semiconductor chip 2-5, and the colelctor electrode calibrating terminal is applied by described first Pressure rack positioning hole 4-6, the second pressure frame positioning hole 3-3 are connected with the positioning stud 2-6, and the colelctor electrode calibrating terminal is used In the colelctor electrode for testing the crimp type semiconductor chip 2-5.
Fig. 6 is the upward view of pressure fixture provided by the present invention, as shown in fig. 6, the emitter stage calibrating terminal 6-1 bags Include emitter power signal terminal and emitter stage test signal terminal;The grid calibrating terminal 6-2 believes including gate power Number terminal and signal calibrating terminal;The colelctor electrode calibrating terminal 6-3 includes Power of collector signal terminal and collection Electrode test signal terminal.
In actual applications, the pressure fixture also includes:Location nut 6-4;The positioning stud 2-6 sequentially passes through institute State the second pressure frame positioning hole 3-3 and the first pressure frame positioning hole 4-6 is fastened by the location nut 6-4.
During actual test, the emitter stage convex board 2-2 is detachable;The boss 2-3 is detachable;The grid Printed circuit board (PCB) 2-4 is detachable;For the crimp type semiconductor chip of different voltage models, the crimp type semiconductor core slice, thin piece There is also difference, traditional device for exerting can only be used as crimp type by changing the shell of different model device partly leads the size of module Body chip testing carrier, cost is higher, and the present invention can directly change emitter stage convex board, boss and gate pcb, The test to different model crimp type semiconductor chip is realized, reduces testing cost.
Each embodiment is described by the way of progressive in this specification, what each embodiment stressed be and other The difference of embodiment, between each embodiment identical similar portion mutually referring to.
Specific case used herein is set forth to the principle and embodiment of the present invention, and above example is said It is bright to be only intended to help the method and its core concept for understanding the present invention;Meanwhile for those of ordinary skill in the art, foundation The thought of the present invention, in specific embodiments and applications there will be changes.In summary, this specification content is not It is interpreted as limitation of the present invention.

Claims (9)

  1. A kind of 1. pressure fixture for crimp type semiconductor chip electrical characteristics test, it is characterised in that including:Insulation bottom Plate, the calibrating terminal located at the insulating base lower surface, the pressure frame located at the insulating base upper surface and pressure spiral shell Post;
    The insulating base forms an accommodating cavity with the pressure frame, and the accommodating cavity is used to house crimp type semiconductor core Piece;The pressure stud is arranged in the top of the pressure frame, and the crimp type semiconductor chip is pressed.
  2. 2. pressure fixture according to claim 1, it is characterised in that specifically included inside the accommodating cavity:
    Emitter stage convex board locating slot on the insulating base, the transmitting in the emitter stage convex board locating slot Pole convex board, the boss on the emitter stage convex board and the gate pcb;The grid printed circuit Plate center is provided with the perforation to match with the shape of the boss, and the gate pcb is sheathed on institute by the perforation State boss periphery;
    The crimp type semiconductor chip is sheathed on the boss and in the gate pcb;The grid printing Circuit board is in contact with the grid of the crimp type semiconductor chip, the transmitting of the boss and the crimp type semiconductor chip Pole is in contact.
  3. 3. pressure fixture according to claim 1, it is characterised in that the pressure clamp body includes:One the first transverse arm With two the first vertical arm;The fixing end of each first vertical arm is vertically connected at the end of first transverse arm, each described The free end of first vertical arm is provided with positioning stud, and first transverse arm is provided with pressure circular hole, and the pressure stud is arranged in institute State pressure circular hole.
  4. 4. pressure fixture according to claim 2, it is characterised in that the pressure stud and the crimp type semiconductor core The contact face that piece is in contact is hemisphere face.
  5. 5. pressure fixture according to claim 2, it is characterised in that the material of the gate pcb is insulation material Material, the contact surface that the gate pcb is in contact with the crimp type semiconductor chip have layers of copper.
  6. 6. pressure fixture according to claim 1, it is characterised in that the insulating base, specifically include:The insulation bottom The lower surface of plate is provided with emitter stage test board, grid test board and pressure frame planker;
    The both ends of the emitter stage test board are provided with emitter stage calibrating terminal, and the emitter stage test board is provided with the first emitter stage Instrument connection, the emitter stage convex board locating slot is interior to be provided with the second emitter stage corresponding with the first emitter stage instrument connection test Hole, the emitter stage calibrating terminal pass through the first emitter stage instrument connection, the second emitter stage instrument connection and the boss It is connected, the emitter stage calibrating terminal is used for the emitter stage for testing the crimp type semiconductor chip;
    The both ends of the grid test board are provided with grid calibrating terminal, and the grid test board is provided with first grid instrument connection, The upper surface of the insulating base is provided with second grid instrument connection corresponding with the first grid instrument connection, the grid test Terminal is connected by the first grid instrument connection, the second grid instrument connection with the gate pcb, described Grid calibrating terminal is used for the grid for testing the crimp type semiconductor chip;
    The both ends of the pressure frame planker are provided with the first pressure frame positioning hole, and the pressure frame planker is provided with colelctor electrode test lead Son, the upper surface of the insulating base are provided with the second pressure frame positioning hole corresponding with the described first pressure frame positioning hole, work as institute Pressure stud is stated when press to the crimp type semiconductor chip, the collection of the pressure stud and the crimp type semiconductor chip Contact electrode, the colelctor electrode calibrating terminal by the described first pressure frame positioning hole, the second pressure frame positioning hole with it is described Positioning stud is connected, and the colelctor electrode calibrating terminal is used for the colelctor electrode for testing the crimp type semiconductor chip.
  7. 7. pressure fixture according to claim 6, it is characterised in that the emitter stage calibrating terminal includes emitter power Signal terminal and emitter stage test signal terminal;
    The grid calibrating terminal includes gate power signal terminal and signal calibrating terminal;
    The colelctor electrode calibrating terminal includes Power of collector signal terminal and colelctor electrode test signal terminal.
  8. 8. pressure fixture according to claim 6, it is characterised in that the pressure fixture also includes:Location nut;
    The positioning stud sequentially passes through the second pressure frame positioning hole and the first pressure frame positioning hole by described fixed Position nut fastening.
  9. 9. pressure fixture according to claim 2, it is characterised in that the emitter stage convex board is detachable;The boss Detachably;The gate pcb is detachable.
CN201710845789.4A 2017-09-19 2017-09-19 A kind of pressure fixture for crimp type semiconductor chip electrical characteristics test Pending CN107656099A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201710845789.4A CN107656099A (en) 2017-09-19 2017-09-19 A kind of pressure fixture for crimp type semiconductor chip electrical characteristics test

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201710845789.4A CN107656099A (en) 2017-09-19 2017-09-19 A kind of pressure fixture for crimp type semiconductor chip electrical characteristics test

Publications (1)

Publication Number Publication Date
CN107656099A true CN107656099A (en) 2018-02-02

Family

ID=61130424

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201710845789.4A Pending CN107656099A (en) 2017-09-19 2017-09-19 A kind of pressure fixture for crimp type semiconductor chip electrical characteristics test

Country Status (1)

Country Link
CN (1) CN107656099A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116500321A (en) * 2023-06-28 2023-07-28 深圳市微特精密科技股份有限公司 Composite clamp for testing printed circuit board assembly

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101144845A (en) * 2007-11-06 2008-03-19 株洲南车时代电气股份有限公司 Electric power semiconductor chip gate cathode junction pressurization test method and device
CN102621470A (en) * 2012-03-31 2012-08-01 中国电子科技集团公司第十三研究所 Method for testing performance of semiconductor microwave power chip packaging shell
CN106680546A (en) * 2017-02-22 2017-05-17 西安派瑞功率半导体变流技术股份有限公司 Adaptive power semiconductor chip test adapter
CN107728032A (en) * 2016-08-16 2018-02-23 株洲中车时代电气股份有限公司 A kind of test device of crimp type power semiconductor

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101144845A (en) * 2007-11-06 2008-03-19 株洲南车时代电气股份有限公司 Electric power semiconductor chip gate cathode junction pressurization test method and device
CN102621470A (en) * 2012-03-31 2012-08-01 中国电子科技集团公司第十三研究所 Method for testing performance of semiconductor microwave power chip packaging shell
CN107728032A (en) * 2016-08-16 2018-02-23 株洲中车时代电气股份有限公司 A kind of test device of crimp type power semiconductor
CN106680546A (en) * 2017-02-22 2017-05-17 西安派瑞功率半导体变流技术股份有限公司 Adaptive power semiconductor chip test adapter

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
张睿: "《压接型IGBT封装寄生参数对芯片开通过程中的均流影响分析》", 《智能电网》 *
申雅茹: "《压力对换流阀用压接型 IGBT 器件功率损耗的影响》", 《半导体技术》 *
邓二平: "《压接型IGBT器件与焊接式IGBT模块热阻测试方法对比研究》", 《智能电网》 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116500321A (en) * 2023-06-28 2023-07-28 深圳市微特精密科技股份有限公司 Composite clamp for testing printed circuit board assembly
CN116500321B (en) * 2023-06-28 2023-08-18 深圳市微特精密科技股份有限公司 Composite clamp for testing printed circuit board assembly

Similar Documents

Publication Publication Date Title
CN107728032B (en) Testing device for crimping type power semiconductor device
CN203445108U (en) Chip packaging and switching board and circuit board with chip packaging and switching board
CN103852707B (en) A kind of power semiconductor chip test fixture
CN108120853A (en) Chip test fixture
CN208672690U (en) A kind of half-bridge DBC test fixture inside IGBT module
CN201322759Y (en) Bare chip testing for discrete device and aging temporary encapsulation carrier
CN109031102A (en) A kind of apparatus for testing chip
CN107656099A (en) A kind of pressure fixture for crimp type semiconductor chip electrical characteristics test
CN212625492U (en) LED chip detection device
CN202394845U (en) Insulativity testing device for plastic encapsulated microelectronic device
CN201555926U (en) Insulation testing equipment of packaged semiconductor device plastic-sealed body
CN216411361U (en) Test fixture for parallel testing IGBT (insulated Gate Bipolar transistor) chip and FRD (fast recovery diode) chip
CN219834152U (en) Radio frequency transmission performance detection device
CN109192675B (en) Package detection method
CN206270455U (en) A kind of power semiconductor modular measurement jig
CN103543337A (en) Capacitive test device and method for capacitive testing a component
CN104764909A (en) Convenient and fast chip testing base capable of being used for extremely-low temperature measuring
CN206148403U (en) IGBT chip screening structure based on switch characteristics measurement
CN205374651U (en) Short -circuit test carrier is opened to base plate
CN107305852B (en) IGBT chip screening structure based on switching characteristic measurement
CN203037746U (en) Testing device for two-unit 73 mm power device module capacitance
CN212965280U (en) Test platform suitable for chip test system
CN209640378U (en) The adapter base structure of test fixture
CN109192677B (en) Package inspection device
CN208674067U (en) Packaging body detection device

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication
RJ01 Rejection of invention patent application after publication

Application publication date: 20180202