CN107632953A - A kind of GPU casees PCIE extends interconnection topology device - Google Patents
A kind of GPU casees PCIE extends interconnection topology device Download PDFInfo
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- CN107632953A CN107632953A CN201710826191.0A CN201710826191A CN107632953A CN 107632953 A CN107632953 A CN 107632953A CN 201710826191 A CN201710826191 A CN 201710826191A CN 107632953 A CN107632953 A CN 107632953A
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Abstract
The invention discloses a kind of GPU casees PCIE to extend interconnection topology device, including GPU casees, and the GPU casees include the GPU of 8 groups of interconnections, and, the cpu server being connected with GPU, and, PCIE switch modules;The PCIE switch modules install interconnection cable clamp at a high speed by PCIE slot, realize the interconnection between different GPU casees;Connected between the GPU by PCIE switch modules;The cpu server is connected by PCIE links with GPU casees;The PCIE switch modules expand to PCIE links the connection that 8 groups of PCIE X16 links realize cpu server and 8 groups of GPU.The present invention realizes the independent design of standard PCIE interface GPU casees, and GPU performance guarantees maximize, and transmission delay is low, favorable expandability, can be arranged in pairs or groups and used with flexible configuration, there is provided the GPU casees design required for a kind of high-performance and artificial intelligence.
Description
Technical field
The present invention relates to server board design field, especially a kind of GPU casees PCIE extensions interconnection topology device.
Background technology
With artificial intelligence and the rise of high-performance calculation, GPU (Graphics Processor Unit video-stream processors
Unit) computing advantage it is more and more obvious in the embodiment of high-performance computer, compared to traditional CPU processor, superelevation goes out
Carry out core, be more suitable for the artificial intelligence and high performance requirements for more crossing concurrent operation, it is next fast that GPU servers have become server
Fast growth point.
Present GPU designs substantially use universal PC IE (peripheral component interconnect
Express high speed serialization computers expansion bus) slot interface, it is substantially all and is integrated into server internal, and server sheet
Body is bound, and is sold as GPU servers or high-performance server.The PCIE interfaces of standard are the conventional designs of generic server
Mode, but because GPU designs need more power supplys and structure space, when server only has single GPU in itself, design is
Have no problem, but more GPU processors are needed to use now applied to artificial intelligence and high performance server, it is more
GPU designs are exactly that server can be made to become huger, and bad with other mark card design compatibilities, same so PCIE knots
Structure will turn into the bottleneck of data exchange processing between GPU, have a strong impact on that the performance of more GPU under more GPU architectures plays.
GPU and CPU processor Integrated design, GPU and CPU application scenarios are bound, once used using GPU is reached
The upper limit when, distributed interconnection scheme can only be done by network, the process performance of such server in itself will be stuck in Netowrk tape
In wide and delay, the performance of raising server that can not be higher.
Interconnection architecture between CPU and GPU is fixed, can not be adjusted according to different application scenarios suitable CPU and
An interconnection topology between GPU, matched somebody with somebody with reaching a floating-point operation (GPU advantages item) and the reasonable of integer arithmetic (CPU advantages item)
Put.
The content of the invention
It is an object of the invention to provide a kind of GPU casees PCIE to extend interconnection topology device, solves the mutual UNICOM between GPU
Road wideband delay problem, realize the elasticity design that topological structure is interconnected between GPU and CPU.
To achieve the above object, the present invention uses following technical proposals:
A kind of GPU casees PCIE extends interconnection topology device, including GPU casees, and the GPU casees include 8 groups of interconnections
GPU, and, the cpu server being connected with GPU, and, PCIE switch modules;The PCIE switch modules pass through PCIE
Slot installations interconnect at a high speed cable clamp, realize the interconnection between different GPU casees;Pass through PCIE switch moulds between the GPU
Block connects;The cpu server is connected by PCIE links with GPU casees;The PCIE switch modules extend PCIE links
Cpu server and 8 groups of GPU connection are realized for 8 groups of PCIE X16 links.
Further, the PCIE switch modules include the first PCIE switch chips, the 2nd PCIE switch cores
Piece, when two groups of PCIE X16 ports of uplink port configuration of the GPU casees are connected with cpu server, the first PCIE
The port S0 of switch chips is connected by PCIE slot1 with the first High Speed Interconnect Lines cable card, the first PCIE switch
The port S1 of chip is connected by slimline interfaces with cpu server, and the port S0 of the 2nd PCIE switch chips leads to
Cross PCIE slot2 to be connected with the second High Speed Interconnect Lines cable card, the port S1 of the 2nd PCIE switch chips passes through
Slimline interfaces are connected with cpu server.
Further, the PCIE switch modules include the first PCIE switch chips, the 2nd PCIE switch cores
Piece, when one group of PCIE X16 port of uplink port configuration of the GPU casees is connected with cpu server, the first PCIE
The port S0 of switch chips, the port S1 of the 2nd PCIE switch chips turns slimline adapters by PCIE and CPU takes
The slimline interfaces connection of business device.
Further, port S2, port S3, port S4, the port S5 of the first PCIE switch chips pass through respectively
PCIE X16 links are connected with GPU0, GPU1, GPU2, GPU3;
Port S2, port S3, port S4, the port S5 of the 2nd PCIE switch chips pass through PCIE X16 respectively
Link is connected with GPU4, GPU5, GPU6, GPU7.
Further, the power connector end of the first PCIE switch chips and GPU power connector end connect;Institute
The power connector end of the power connector end and GPU of stating the 2nd PCIE switch chips connects.
Further, the clock end of the cpu server is connected with the clock end of the first PCIE switch chips, described
The clock end of first PCIE switch the chips clock end with the 2nd PCIE switch chips, the first High Speed Interconnect Lines cable respectively
Card, the second High Speed Interconnect Lines cable card, GPU0, GPU1, GPU2, GPU3, GPU4, GPU5, GPU6, GPU7 connection.
Further, I2C buses are divided into two-way by the cpu server by slimline interfaces, are opened all the way by I2C
Chip 8 groups of I2C links of extension are closed to be connected with GPU0, GPU1, GPU2, GPU3, GPU4, GPU5, GPU6, GPU7 successively;Another way
By simulate detecting chip successively with GPU0POWER, GPU1POWER, GPU2POWER, GPU3POWER, GPU4POWER,
GPU5POWER, GPU6POWER, GPU7POWER are connected.
The effect provided in the content of the invention is only the effect of embodiment, rather than whole effects that invention is all, above-mentioned
A technical scheme in technical scheme has the following advantages that or beneficial effect:
The present invention is designed using standard PCIE interfaces GPU, and GPU models can be according to customer demand flexible configuration;Between GPU
Directly interconnected and accessed by PCIE SWITCH, speed is up to 16GB/s between GPU;It can be realized between GPU casees by IB cards more
Cabinet interconnects, and interconnection speed reaches 100Gbps, data delay us ranks;Uplink port realizes standard slimline interfaces, can be with
It is adapted to obstructed server, and uplink port flexibly configurable is into two groups of PCIE X16 and one group of PCIE X16.This hair
The bright independent design for realizing standard PCIE interface GPU casees, GPU performance guarantees maximize, and transmission delay is low, favorable expandability,
It can be arranged in pairs or groups and used with flexible configuration, there is provided the GPU casees design required for a kind of high-performance and artificial intelligence.
Brief description of the drawings
Fig. 1 is the structural representation of the embodiment of the present invention one;
Fig. 2 is clock isolation design principle figure of the present invention;
Fig. 3 is I2C bus assignments schematic diagram of the present invention.
Embodiment
For the technical characterstic for illustrating this programme can be understood, below by embodiment, and its accompanying drawing is combined, to this hair
It is bright to be described in detail.Following disclosure provides many different embodiments or example is used for realizing the different knots of the present invention
Structure.In order to simplify disclosure of the invention, hereinafter the part and setting of specific examples are described.In addition, the present invention can be with
Repeat reference numerals and/or letter in different examples.This repetition is that for purposes of simplicity and clarity, itself is not indicated
Relation between various embodiments are discussed and/or set.It should be noted that part illustrated in the accompanying drawings is not necessarily to scale
Draw.Present invention omits the description to known assemblies and treatment technology and process to avoid being unnecessarily limiting the present invention.
Embodiment one
As shown in figure 1, including GPU casees, cpu server, the first PCIE switch chips PEX9797, the 2nd PCIE
Switch chips PEX9797, GPU case include the GPU of 8 groups of interconnections, and the uplink port of GPU casees configures two groups of PCIE X16 ends
When mouth is connected with cpu server, the first PCIE switch chips PEX9797 port S0 is high by PCIE slot1 and first
Fast interconnection cable card connection, the first PCIE switch chips PEX9797 port S1 are serviced by slimline interfaces and CPU
Device connects, and the first PCIE switch chips PEX9797 port S2, port S4 are connected to PCIE connection terminals, PCIE connection ends
Son is connected by 2*PCIE Gen 3X16 buses with another PCIE connection terminals, and another PCIE connection terminals pass through two-way
PCIE X16 buses are connected with two PCIE slot chips, two PCIE slot chips respectively by PCIE X16 buses with
GPU0, GPU1 are connected, likewise, the first PCIE switch chips PEX9797 port S3, port S5 are realized and GPU2, GPU3
Connection.
2nd PCIE switch chips PEX9797 port S0 passes through PCIE slot2 and the second High Speed Interconnect Lines cable card
Connection, the 2nd PCIE switch chips PEX9797 port S1 are connected by slimline interfaces with cpu server, and second
PCIE switch chips PEX9797 port S2, port S3, port S4, port S5 respectively by PCIE X16 links with
GPU4, GPU5, GPU6, GPU7 are connected.
First PCIE switch chips PEX9797 power connector end and GPU power connector end connect;Described second
PCIE switch chips PEX9797 power connector end and GPU power connector end connect.
As shown in Fig. 2 the clock end of cpu server passes through clock buffer chip and the first PCIE switch chips
PEX9797A clock end connection, the clock end of the first PCIE switch chips PEX9797A respectively with the 2nd PCIE
Switch chips PEX9797 clock end, the first High Speed Interconnect Lines cable card, the second High Speed Interconnect Lines cable card, GPU0, GPU1,
GPU2, GPU3, GPU4, GPU5, GPU6, GPU7 clock end connection.
As shown in figure 3, I2C buses are divided into two-way by cpu server by slimline interfaces, switched all the way by I2C
Chip extends 8 groups of I2C links and is connected successively with GPU0, GPU1, GPU2, GPU3, GPU4, GPU5, GPU6, GPU7;Another way is led to
Cross simulation detecting chip successively with GPU0POWER, GPU1POWER, GPU2POWER, GPU3POWER, GPU4POWER,
GPU5POWER, GPU6POWER, GPU7POWER are connected.
Embodiment two
The difference of embodiment two and embodiment one is that GPU casees uplink port configures one group of PCIE X16 port and taken with CPU
During business device connection, the port S0 of the first PCIE switch chips, the port S1 of the 2nd PCIE switch chips pass through PCIE and turned
The slimline interfaces of slimline adapters and cpu server connect.
Although above-mentioned the embodiment of the present invention is described with reference to accompanying drawing, model not is protected to the present invention
The limitation enclosed, one of ordinary skill in the art should be understood that on the basis of technical scheme those skilled in the art are not
Need to pay various modifications or deformation that creative work can make still within protection scope of the present invention.
Claims (7)
1. a kind of GPU casees PCIE extends interconnection topology device, it is characterized in that, including GPU casees, the GPU casees be mutually connected including 8 groups
The GPU connect, and, the cpu server being connected with GPU, and, PCIE switch modules;The PCIE switch modules pass through
PCIE slot installations interconnect at a high speed cable clamp, realize the interconnection between different GPU casees;Pass through PCIE between the GPU
Switch modules connect;The cpu server is connected by PCIE links with GPU casees;The PCIE switch modules are by PCIE
Link expands to the connection that 8 groups of PCIE X16 links realize cpu server and 8 groups of GPU.
2. a kind of GPU casees PCIE extensions interconnection topology device as claimed in claim 1, it is characterized in that, the PCIE switch
Module includes the first PCIE switch chips, the 2nd PCIE switch chips, and the uplink port of the GPU casees configures two groups
When PCIE X16 ports are connected with cpu server, the port S0 of the first PCIE switch chips by PCIE slot1 with
First High Speed Interconnect Lines cable card is connected, and the port S1 of the first PCIE switch chips is taken by slimline interfaces and CPU
Business device connection, the port S0 of the 2nd PCIE switch chips passes through PCIE slot2 and the second High Speed Interconnect Lines cable card connects
Connect, the port S1 of the 2nd PCIE switch chips is connected by slimline interfaces with cpu server.
3. a kind of GPU casees PCIE extensions interconnection topology device as claimed in claim 1, it is characterized in that, the PCIE switch
Module includes the first PCIE switch chips, the 2nd PCIE switch chips, and the uplink port of the GPU casees configures one group
When PCIE X16 ports are connected with cpu server, port S0, the 2nd PCIE switch of the first PCIE switch chips
The slimline interfaces that the port S1 of chip turns slimline adapters and cpu server by PCIE connect.
4. a kind of GPU casees PCIE extensions interconnection topology device as claimed in claim 2 or claim 3, it is characterized in that, the first PCIE
The port S2 of switch chips, port S3, port S4, port S5 respectively by PCIE X16 links and GPU0, GPU1, GPU2,
GPU3 connections;
Port S2, port S3, port S4, the port S5 of the 2nd PCIE switch chips pass through PCIE X16 links respectively
It is connected with GPU4, GPU5, GPU6, GPU7.
5. a kind of GPU casees PCIE extensions interconnection topology device as claimed in claim 2 or claim 3, it is characterized in that, the first PCIE
The power connector end of switch chips and GPU power connector end connect;The power supply connection of the 2nd PCIE switch chips
End is connected with GPU power connector end.
6. a kind of GPU casees PCIE extensions interconnection topology device as claimed in claim 2 or claim 3, it is characterized in that, the CPU services
The clock end of device is connected with the clock end of the first PCIE switch chips, the clock end point of the first PCIE switch chips
Clock end, the first High Speed Interconnect Lines cable card, the second High Speed Interconnect Lines cable card, GPU0 not with the 2nd PCIE switch chips,
GPU1, GPU2, GPU3, GPU4, GPU5, GPU6, GPU7 are connected.
7. a kind of GPU casees PCIE extensions interconnection topology device as claimed in claim 2 or claim 3, it is characterized in that, the CPU services
I2C buses are divided into two-way by device by slimline interfaces, all the way by I2C switch chips extend 8 groups of I2C links successively with
GPU0, GPU1, GPU2, GPU3, GPU4, GPU5, GPU6, GPU7 are connected;Another way by simulate detecting chip successively with GPU0
POWER、GPU1 POWER、GPU2 POWER、GPU3 POWER、GPU4 POWER、GPU5 POWER、GPU6 POWER、GPU7
POWER connections.
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CN108463077A (en) * | 2018-04-03 | 2018-08-28 | 郑州云海信息技术有限公司 | A kind of interconnection board combination |
CN108460719A (en) * | 2018-03-13 | 2018-08-28 | 山东超越数控电子股份有限公司 | A kind of graphics workstation system based on Domestic Platform |
CN108540319A (en) * | 2018-04-02 | 2018-09-14 | 郑州云海信息技术有限公司 | A kind of Heterogeneous Computing topology switching method, system and board |
CN108845970A (en) * | 2018-05-30 | 2018-11-20 | 郑州云海信息技术有限公司 | A kind of device and method of free switching GPU topology server |
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CN108540319A (en) * | 2018-04-02 | 2018-09-14 | 郑州云海信息技术有限公司 | A kind of Heterogeneous Computing topology switching method, system and board |
CN108463077A (en) * | 2018-04-03 | 2018-08-28 | 郑州云海信息技术有限公司 | A kind of interconnection board combination |
CN108845970A (en) * | 2018-05-30 | 2018-11-20 | 郑州云海信息技术有限公司 | A kind of device and method of free switching GPU topology server |
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CN109002411A (en) * | 2018-07-24 | 2018-12-14 | 郑州云海信息技术有限公司 | Automatically configure the method, system and the GPU extension box that can be automatically configured of GPU extension box |
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US10747280B2 (en) | 2018-11-27 | 2020-08-18 | International Business Machines Corporation | Reconfigurble CPU/GPU interconnect to mitigate power/thermal throttling |
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US10867363B2 (en) | 2019-01-25 | 2020-12-15 | Shenzhen Fugui Precision Ind. Co., Ltd. | Device and method for accelerating graphics processor units, and computer readable storage medium |
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WO2020199560A1 (en) * | 2019-04-03 | 2020-10-08 | 华为技术有限公司 | Ai training network and method |
CN110401466B (en) * | 2019-06-25 | 2021-06-29 | 苏州浪潮智能科技有限公司 | Data transmission method, device and medium based on high-speed signal switching chip |
CN110401466A (en) * | 2019-06-25 | 2019-11-01 | 苏州浪潮智能科技有限公司 | A kind of data transmission method, device and medium based on high speed signal switching chip |
CN110389928A (en) * | 2019-06-25 | 2019-10-29 | 苏州浪潮智能科技有限公司 | A kind of data transmission method, device and medium based on high speed signal switching chip |
CN111352787A (en) * | 2020-03-13 | 2020-06-30 | 浪潮商用机器有限公司 | GPU (graphics processing unit) topological connection detection method, device, equipment and storage medium |
CN111352787B (en) * | 2020-03-13 | 2023-08-18 | 浪潮商用机器有限公司 | GPU topology connection detection method, device, equipment and storage medium |
CN111563058A (en) * | 2020-05-13 | 2020-08-21 | 浪潮商用机器有限公司 | Device for switching PCIE Gen4 in server |
CN111737181A (en) * | 2020-06-19 | 2020-10-02 | 苏州浪潮智能科技有限公司 | Heterogeneous processing equipment, system, port configuration method, device and storage medium |
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