CN108463077A - A kind of interconnection board combination - Google Patents
A kind of interconnection board combination Download PDFInfo
- Publication number
- CN108463077A CN108463077A CN201810296818.0A CN201810296818A CN108463077A CN 108463077 A CN108463077 A CN 108463077A CN 201810296818 A CN201810296818 A CN 201810296818A CN 108463077 A CN108463077 A CN 108463077A
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- Prior art keywords
- lifting plate
- high speed
- pcie
- cpu
- gpu
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K7/00—Constructional details common to different types of electric apparatus
- H05K7/02—Arrangements of circuit components or wiring on supporting structure
- H05K7/10—Plug-in assemblages of components, e.g. IC sockets
Abstract
This application provides a kind of combinations of interconnection board, including：Mainboard, include the first CPU and the 2nd CPU on mainboard, first CPU on mainboard the first high speed connecting line and the second high speed connector be connected respectively by PCIE interfaces, the 2nd CPU on mainboard third high speed connecting line and the 4th high speed connector be connected by PCIE interfaces；GPU bottom plates, include the 5th high speed connector and the 6th high speed connector on GPU bottom plates, 5th high speed connector and the 6th high speed connector be used for on mainboard the first CPU or the 2nd CPU connect, the GPU mainboards include two PCIE Switch, each PCIE Switch include at least 4 downlink ports, and described two PCIE Switch are used to respectively be connected with 8 GPU by the first lifting plate and the second lifting plate；Two the first lifting plates and two the second lifting plates, wherein first lifting plate is used cooperatively with second lifting plate.
Description
Technical field
This application involves computer realms, and are combined more particularly, to a kind of interconnection board.
Background technology
At the beginning of being born from computer, artificial intelligence is exactly ultimate pursuit of the mankind to computer.With computer in recent years
Horizontal swift and violent promotion, speech recognition, big data operation, automatic driving function, even go field, artificial intelligence all achievements
Striking, these applications are all based on deep learning algorithm, and the hardware platform of the algorithm is supported to be all based on image processor greatly at present
(English：Graphics Processing Unit, write a Chinese character in simplified form：GPU) powerful concurrent operation ability.
To meet the needs of superpower operational capability, current more CPU of server design generally use and at least 4U height
Chassis design, the GPU card of multiple standards is integrated in cabinet inside.It is designed specifically to：The high speed serialization computer of CPU extends
Bus standard (English：Peripheral component interconnect express, write a Chinese character in simplified form PCIE) resource directly with
PCIE slots (PCIE Slot) interconnect, and GPU is mounted on PCIE Slot and realizes that more GPU's is integrated.
Existing multi -CPU scheme not only increases hardware development cost, also increases client's purchase cost；And 4U design schemes
It is serious to reduce space availability ratio, the space cost of bigger is needed when client being caused to dispose computer room.Based on above-mentioned 2 points, it is unfavorable for
The marketing of this type server.
Every CPU maximum of Intel Purley platforms supports 48 channels (Lane), for traditional server application
Obviously requirement is cannot be satisfied through enough, but for high density server, macrooperation application.In general, high-end video card is because of 3D fortune
Calculation handling capacity is huge to usually require the channels X16, and such server platform has specific demand, PCIE exchange chips to PCIE resources
(PCIE Switch) is to cope with number of channels Limit exploitation.
In traditional exploitation design, PCIE Slot are located at GPU BOX boards, vertical with chassis bottom, and more GPU are parallel
PCIE Slot are inserted into case side wall, therefore cabinet needs at least 4U height.
Therefore, how 8 GPU are integrated in the cabinet of 2U height, and can be placed at the server machine of standard
It is current urgent problem to be solved in frame.
Invention content
The application provides a kind of interconnection board combination, and 8 GPU can be integrated in the cabinet of 2U height.
On the one hand, a kind of interconnection board combination is provided, including：Mainboard includes the first CPU and second on the mainboard
CPU, the first CPU on the mainboard the first high speed connecting line and the second high speed connector pass through PCIE interface phases respectively
Even, the 2nd CPU on the mainboard third high speed connecting line and the 4th high speed connector be connected by PCIE interfaces；
GPU bottom plates, include the 5th high speed connector and the 6th high speed connector on the GPU bottom plates, the 5th high speed connector and
6th high speed connector be used for on the mainboard the first CPU or the 2nd CPU connect, the GPU mainboards are including two
PCIE Switch, each PCIE Switch include at least 4 downlink ports, and described two PCIE Switch are for leading to
The first lifting plate and the second lifting plate is crossed respectively to be connected with 8 GPU；Two the first lifting plates and two the second lifting plates, wherein
Two PCIe card slots in first lifting plate are located at described first with the high speed connector on first lifting plate and are promoted
The both sides of plate, the high speed connectors of two PCIe card slots and second lifting plate in second lifting plate are located at described the
The both sides of two lifting plates, include area of knockout on first lifting plate, and first lifting plate is matched with second lifting plate
It closes and uses, the area of knockout on first lifting plate is used to place the PCIe card slot on second lifting plate.
With reference to first aspect, in the first possible realization method of first aspect, the second lifting plate length ratio
The short 13cm of first lifting plate length.
With reference to first aspect and its above-mentioned realization method, described in second of possible realization method of first aspect
PCIE Switch are PEX9797 chips.
With reference to first aspect and its above-mentioned realization method, described in the third possible realization method of first aspect
PCIE Switch be include 5 downlink ports, wherein 4 downlink ports are for extending GPU card, and 1 downlink port is for expanding
Open up infinite bandwidth IB cards.
Second aspect provides a kind of lifting plate combination, including the first lifting plate and the second lifting plate, wherein described first
Two PCIe card slots in lifting plate are located at the both sides of first lifting plate with the high speed connector on first lifting plate,
The high speed connector of two PCIe card slots and second lifting plate in second lifting plate is located at second lifting plate
Both sides, include area of knockout on first lifting plate, first lifting plate is used cooperatively with second lifting plate, institute
The area of knockout on the first lifting plate is stated to be used to place the PCIe card slot on second lifting plate.
8 GPU can be integrated in the cabinet of 2U height, and can put by the application by changing Design of Hardware Architecture
It sets in the server rack of standard, facilitates client's installation, dismounting.
Description of the drawings
Fig. 1 shows the interconnection board of the application one embodiment.
Fig. 2 shows the interconnection boards of another embodiment of the application.
Fig. 3 shows the promotion card of the application one embodiment.
Fig. 4 shows the promotion card of another embodiment of the application
Specific implementation mode
Below in conjunction with attached drawing, the technical solution in the application is described.
Fig. 1 shows a kind of interconnection board combination, including：Mainboard includes the first CPU and the 2nd CPU, institute on the mainboard
State the first CPU on the mainboard the first high speed connecting line and the second high speed connector be connected respectively by PCIE interfaces, institute
State the 2nd CPU on the mainboard third high speed connecting line and the 4th high speed connector be connected by PCIE interfaces；The bottoms GPU
Plate, includes the 5th high speed connector and the 6th high speed connector on the GPU bottom plates, the 5th high speed connector and described the
Six high speed connectors be used for on the mainboard the first CPU or the 2nd CPU connect, the GPU mainboards include two PCIE
Switch, each PCIE Switch include at least 4 downlink ports, and described two PCIE Switch are used to pass through first
Lifting plate and the second lifting plate are connected with 8 GPU respectively.
Fig. 2 shows the combination of the interconnection board of another embodiment, including GPU mainboards shown in Fig. 1, two first promotions
Plate and two the second lifting plates, wherein two PCIe card slots in first lifting plate and the height on first lifting plate
Fast connector is located at the both sides of first lifting plate, and two PCIe card slots in second lifting plate are promoted with described second
The high speed connector of plate is located at the both sides of second lifting plate, includes area of knockout on first lifting plate, and described first
Lifting plate is used cooperatively with second lifting plate, and the area of knockout on first lifting plate is promoted for placing described second
PCIe card slot on plate.
Specifically, GPU mainboards shown in figure 2 respectively by four high speed connectors respectively with two the first lifting plates
It is connected with two the second lifting plates, wherein the PCIE Switch in GPU can be connect by 32PCIE line with each high speed
Device connects.
Optionally, as the application one embodiment, the second lifting plate length is shorter than the first lifting plate length
13cm。
Optionally, as the application one embodiment, the PCIE Switch are PEX9797 chips.
Optionally, as the application one embodiment, the PCIE Switch be include 5 downlink ports, wherein 4
Downlink port is for extending GPU card, and 1 downlink port is for extending infinite bandwidth IB cards.
Specifically, first, every CPU can be configured to 3 groups of PCIE X16 by BIOS.The patent uses two (equal positions CPU
In mainboard), it is interconnected by high-speed cable HS CONN (cable) and GPU bottom plates；Synchronization only has 2 groups of PCIE of a CPU
X16root port interconnect either the first CPU or the 2nd CPU with GPU bottom plates.
Specifically, such as GPU bottom plates are used for PCIE resource expansions using two PEX9797 chips.PEX9797 includes 97
The PCIE Lane resources of Gen 3 at most can configure 6 groups of X16PCIE, and user establishes high-performance according to demand, low latency is answered
With.
For example, in a particular embodiment, every PEX9797 amounts to 5 downstream PCIE X16port, wherein 4
For extending, GPU card, 1 for extending IB cards.Consider that space limitation, conceptual design are selected highdensity high speed connector and carried
The interconnection of lift slab Riser boards, wherein every two groups of PCIE X16 share one group of high speed connector.
The mechanism that all GPU are parallel to case side wall different from 4U cabinets designs, this patent uses 2U standard rack types
Server size.Riser plates interconnect and are parallel to case side wall by high speed connector and GPU bottom plates, and PCIE Slot hang down
Directly in Riser plates (or case side wall), be parallel to chassis bottom.To meet space requirement, this patent designs two kinds of lifting plates
Riser boards：Riser A, that is, the first lifting plate in above-described embodiment, Riser B, that is, in above-described embodiment
Second lifting plate.
Optionally, as the application one embodiment, interconnection board structure includes the first lifting plate and the second lifting plate,
In, two PCIe card slots in first lifting plate are carried with the high speed connector on first lifting plate positioned at described first
The both sides of lift slab, the high speed connectors of two PCIe card slots and second lifting plate in second lifting plate are located at described
The both sides of second lifting plate include area of knockout, first lifting plate and second lifting plate on first lifting plate
It is used cooperatively, the area of knockout on first lifting plate is used to place the PCIe card slot on second lifting plate.
As shown in figure 3, showing first lifting plate of the application one embodiment, Fig. 4 shows one implementation of the application
Second lifting plate of example.
Wherein, the first lifting plate, i.e. in Fig. 3 in Riser A boards, high speed connector, PCIE Slot (dotted line generations in figure
Epitope is in board other side) it is located at the both sides of board, high speed connector and the interconnection of GPU bottom plates, PCIE Slot and GPU
Interconnection.It is hollowed out among Riser A boards, the PCIE Slot convenient for Riser B boards are passed through from area of knockout.
Second lifting plate, i.e. it is about 13cm that Riser B boards in Fig. 4, which are shorter in length than Riser A boards, and high speed connects
Device, PCIE Slot are also located at board both ends (dotted line, which represents, in figure is located at board other side), high speed connector and GPU
Bottom plate interconnection, PCIE Slot and GPU interconnections.
Riser A, Riser B boards are screwed on bracket and are located at bracket both sides, Riser B's
PCIE Slot will pass through Riser A area of knockout.Front ends GPU on Riser A boards are towards cabinet rear end, Riser B boards
On the front ends GPU towards cabinet front end, in this way, the GPU on two boards have on two-dimensional space overlapping but on three dimensions not
There are any mechanical interferences, and space is utilized to integrate the GPU card of 8 PCIE standards in 2U cabinets to greatest extent.
Therefore, in the practical application of server, two CPU are at most used：When an only CPU, two groups of PCIE X16 are equal
From the first CPU；When having two CPU, two groups of PCIE X16 are all from the 2nd CPU, are interconnected respectively with two PCIE Switch,
And the first CPU is for extending ten thousand Broadcom of NVME hard disks or IB.It improves cpu busy percentage from certain angle while reducing hardware and set
Count cost.
Two PCIE Switch chips are each configured to Base Mode patterns, 6 groups of PCIE X16port, upstream
Port and CPU root port interconnections, downstream port and GPU are interconnected.To meet 8 GPU of High Density Integration, use
2U height rack generic servers solve the problems, such as Steric clashes on hardware using GPU bottom plates, two kinds of GPU Riser plates collocation.
The application range, reduction R＆D costs, raising space availability ratio of the server will be significantly greatly increased in this.
Those of ordinary skill in the art may realize that lists described in conjunction with the examples disclosed in the embodiments of the present disclosure
Member and algorithm steps can be realized with the combination of electronic hardware or computer software and electronic hardware.These functions are actually
It is implemented in hardware or software, depends on the specific application and design constraint of technical solution.Professional technician
Each specific application can be used different methods to achieve the described function, but this realization is it is not considered that exceed
The scope of the present invention.
It is apparent to those skilled in the art that for convenience and simplicity of description, the system of foregoing description,
The specific work process of device and unit, can refer to corresponding processes in the foregoing method embodiment, and details are not described herein.
In several embodiments provided herein, it should be understood that disclosed systems, devices and methods, it can be with
It realizes by another way.For example, the apparatus embodiments described above are merely exemplary, for example, the unit
It divides, only a kind of division of logic function, formula that in actual implementation, there may be another division manner, such as multiple units or component
It can be combined or can be integrated into another system, or some features can be ignored or not executed.Another point, it is shown or
The mutual coupling, direct-coupling or communication connection discussed can be the indirect coupling by some interfaces, device or unit
It closes or communicates to connect, can be electrical, machinery or other forms.
The unit illustrated as separating component may or may not be physically separated, aobvious as unit
The component shown may or may not be physical unit, you can be located at a place, or may be distributed over multiple
In network element.Some or all of unit therein can be selected according to the actual needs to realize the mesh of this embodiment scheme
's.
In addition, each functional unit in each embodiment of the present invention can be integrated in a processing unit, it can also
It is that each unit physically exists alone, it can also be during two or more units be integrated in one unit.
It, can be with if the function is realized in the form of SFU software functional unit and when sold or used as an independent product
It is stored in a computer read/write memory medium.Based on this understanding, technical scheme of the present invention is substantially in other words
The part of the part that contributes to existing technology or the technical solution can be expressed in the form of software products, the meter
Calculation machine software product is stored in a storage medium, including some instructions are used so that a computer equipment (can be
People's computer, server or the second equipment etc.) it performs all or part of the steps of the method described in the various embodiments of the present invention.
And storage medium above-mentioned includes：USB flash disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), arbitrary access are deposited
The various media that can store program code such as reservoir (RAM, Random Access Memory), magnetic disc or CD.
The above description is merely a specific embodiment, but scope of protection of the present invention is not limited thereto, any
Those familiar with the art in the technical scope disclosed by the present invention, can easily think of the change or the replacement, and should all contain
Lid is within protection scope of the present invention.Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (5)
1. a kind of interconnection board combination, which is characterized in that including：
Mainboard, includes the first CPU and the 2nd CPU on the mainboard, and the first CPU is connect at a high speed with first on the mainboard
Line and the second high speed connector are connected by PCIE interfaces respectively, and the 2nd CPU is connect with the third high speed on the mainboard
Line and the 4th high speed connector are connected by PCIE interfaces；
GPU bottom plates, include the 5th high speed connector and the 6th high speed connector on the GPU bottom plates, and the 5th high speed connects
Device and the 6th high speed connector be used for on the mainboard the first CPU or the 2nd CPU connect, the GPU mainboards include
Two PCIE Switch, each PCIE Switch include at least 4 downlink ports, and described two PCIE Switch are used
It is connected respectively with 8 GPU in by the first lifting plate and the second lifting plate；
Two the first lifting plates and two the second lifting plates, wherein two PCIe card slots in first lifting plate with it is described
High speed connector on first lifting plate is located at the both sides of first lifting plate, two PCIe cards in second lifting plate
The high speed connector of slot and second lifting plate is located at the both sides of second lifting plate, includes digging on first lifting plate
Empty region, first lifting plate are used cooperatively with second lifting plate, and the area of knockout on first lifting plate is used for
Place the PCIe card slot on second lifting plate.
2. according to the method described in claim 1, it is characterized in that, the second lifting plate length is longer than first lifting plate
Spend short 13cm.
3. method according to claim 1 or 2, which is characterized in that the PCIE Switch are PEX9797 chips.
4. according to the method in any one of claims 1 to 3, which is characterized in that the PCIE Switch be include 5
Downlink port, wherein 4 downlink ports are for extending GPU card, and 1 downlink port is for extending infinite bandwidth IB cards.
5. a kind of lifting plate combination, which is characterized in that including the first lifting plate and the second lifting plate, wherein described first is promoted
Two PCIe card slots in plate are located at the both sides of first lifting plate with the high speed connector on first lifting plate, described
The high speed connector of two PCIe card slots and second lifting plate in second lifting plate is located at the two of second lifting plate
Side includes area of knockout on first lifting plate, and first lifting plate is used cooperatively with second lifting plate, and described the
Area of knockout on one lifting plate is used to place the PCIe card slot on second lifting plate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810296818.0A CN108463077A (en) | 2018-04-03 | 2018-04-03 | A kind of interconnection board combination |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810296818.0A CN108463077A (en) | 2018-04-03 | 2018-04-03 | A kind of interconnection board combination |
Publications (1)
| Publication Number | Publication Date |
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| CN108463077A true CN108463077A (en) | 2018-08-28 |
Family
ID=63234614
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| CN201810296818.0A Pending CN108463077A (en) | 2018-04-03 | 2018-04-03 | A kind of interconnection board combination |
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Cited By (7)
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| CN110389928A (en) * | 2019-06-25 | 2019-10-29 | 苏州浪潮智能科技有限公司 | A kind of data transmission method, device and medium based on high speed signal switching chip |
| CN110401466A (en) * | 2019-06-25 | 2019-11-01 | 苏州浪潮智能科技有限公司 | A kind of data transmission method, device and medium based on high speed signal switching chip |
| CN111159078A (en) * | 2019-12-30 | 2020-05-15 | 联想长风科技(北京)有限公司 | Electronic equipment |
| CN111221391A (en) * | 2020-01-03 | 2020-06-02 | 英业达科技有限公司 | Graphics processor box |
| CN111563058A (en) * | 2020-05-13 | 2020-08-21 | 浪潮商用机器有限公司 | Device for switching PCIE Gen4 in server |
| WO2022021298A1 (en) * | 2020-07-31 | 2022-02-03 | Nvidia Corporation | Multi-format graphics processing unit docking board |
| US11395431B2 (en) | 2020-06-26 | 2022-07-19 | Hewlett Packard Enterprise Development Lp | Compute node having a chassis with front installed GPU tray |
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Application publication date: 20180828 |