CN107529292A - A kind of random layer interconnection PCB preparation method - Google Patents

A kind of random layer interconnection PCB preparation method Download PDF

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Publication number
CN107529292A
CN107529292A CN201710739194.0A CN201710739194A CN107529292A CN 107529292 A CN107529292 A CN 107529292A CN 201710739194 A CN201710739194 A CN 201710739194A CN 107529292 A CN107529292 A CN 107529292A
Authority
CN
China
Prior art keywords
core plate
conductive material
hdi
disc
bonding sheet
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201710739194.0A
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Chinese (zh)
Inventor
冷科
马仁声
黄世清
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shennan Circuit Co Ltd
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Shennan Circuit Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shennan Circuit Co Ltd filed Critical Shennan Circuit Co Ltd
Priority to CN201710739194.0A priority Critical patent/CN107529292A/en
Publication of CN107529292A publication Critical patent/CN107529292A/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/06Lamination
    • H05K2203/068Features of the lamination press or of the lamination process, e.g. using special separator sheets

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

The invention discloses a kind of random layer interconnection PCB preparation method, including:The multi-disc core plate and multi-disc bonding sheet for forming PCB are provided;The core plate is drilled, plating and inner figure processing, conductive material is set in the docking location of the core plate surface;The bonding sheet is slotted, opens up the position correspondence of groove in the conductive material;Bonding sheet described in core plate described in multi-disc and multi-disc is spaced stacking in order, in obtained stepped construction, the conductive material on the core plate is accommodated in the groove on the bonding sheet;The stepped construction is pressed, it is interlayer connection conductor to make the conductive material melting solidify afterwards, realizes the interlayer interconnection of core plate described in multi-disc, and random layer interconnection PCB is made.The present invention only needs to carry out core plate simple preprocessing cooperation one step press flow, it is possible to random layer interconnection PCB is made, simplifies manufacture craft, shortens technological process, improve processing efficiency, reduce cost of manufacture.

Description

A kind of random layer interconnection PCB preparation method
Technical field
The present invention relates to PCB manufacture technology fields, and in particular to a kind of random layer interconnection PCB preparation method.
Background technology
Random layer interconnects PCB(Printed Circuit Board, printed circuit board)All levels be high density interconnection (High Density Interconnector, HDI)Layer, the conductor of each layer can be stacked by HDI holes freely to be connected.For hand Hold and mobile device on possibility provided using highly complex big pin device;For example, CPU etc. provides reliable interconnection Solution.
Random layer interconnection technique is widely used in high-performance smart mobile phone field;But its price is by main electronics The restriction of carrier High density of PCB cost;This kind of High density of PCB is often added using the conventional lay-up method technique of random layer interconnection technique Work makes, and technological process is extremely long, therefore directly results in the rising of process cost and scrap cost, and then directly affects such circuit The cost of panel products.
The content of the invention
The embodiment of the present invention provides a kind of random layer interconnection PCB preparation method, for simplifying manufacture craft, shortens technique Flow, processing efficiency is improved, reduce cost of manufacture.
Used technical scheme is:
A kind of random layer interconnection PCB preparation method, including:The multi-disc core plate and multi-disc bonding sheet for forming PCB are provided;To described Core plate is drilled, and plating and inner figure processing, conductive material is set in the docking location of the core plate surface;To described viscous Sheeting is slotted, and opens up the position correspondence of groove in the conductive material;By described in the multi-disc by above-mentioned steps processing Bonding sheet is spaced stacking in order described in core plate and multi-disc, and in obtained stepped construction, the conductive material on the core plate is held It is contained in the groove on the bonding sheet;The stepped construction is pressed, it is layer to make the conductive material melting solidify afterwards Between connect conductor, realize core plate described in multi-disc interlayer interconnection, be made random layer interconnection PCB.
Wherein, the core plate is drilled, plating and inner figure processing, set in the docking location of the core plate surface The step of putting conductive material, it can specifically include:HDI holes are processed on the core plate using laser drilling process, to the HDI Hole carries out filling perforation plating;Through pad pasting, exposure, development and etching step, inner figure is processed in the core plate surface, wherein, HDI connection pads are formed in the position in HDI holes, the HDI connections pad is the docking location;In the core plate surface Conductive material is set on HDI connection pads, and the conductive material is the electrocondution slurry of semi-solid preparation state.
Optionally, the conductive material is specially tin slurry or copper slurry or silver paste or conductive bond piece.
Optionally, the groove on the bonding sheet is more unilateral big 4mil than the HDI connection pads of the core plate surface.
Optionally, using silk-screen or plating or manual mode, set on the HDI connection pads of the core plate surface conductive Material.
Optionally, the thickness of the conductive material is between 25 ~ 80 microns.
Optionally, the core plate includes the middle dielectric layer for exotic material and the copper foil layer on two sides, the dielectric layer Thickness between 2 ~ 4mil.
Optionally, the parameter of the pressing step is:180 DEG C ~ 330 DEG C of temperature;Pressure 200PSI ~ 600PSI.
As can be seen from the above technical solutions, the embodiment of the present invention has advantages below:
The present invention is using the surface that conductive material is arranged on to core plate, and melting and solidification is interlayer connection conductor after pressing, so as to real The technical scheme of existing interlayer interconnection, it is only necessary to simple preprocessing is carried out to core plate and coordinates one step press flow, it is possible to is made Random layer interconnection PCB is obtained, manufacture craft is simplified, can greatly shorten the technological process of random layer interconnection technique, improve Processing efficiency, reduces cost of manufacture, realizes the reduction of such cost of circuit panel products more than 300%.Wherein, HDI rank Number is more, saves efficiency and cost is more.
Brief description of the drawings
Technical scheme in order to illustrate the embodiments of the present invention more clearly, below will be to institute in embodiment and description of the prior art The accompanying drawing needed to use is briefly described, it should be apparent that, drawings in the following description are only some implementations of the present invention Example, for those of ordinary skill in the art, on the premise of not paying creative work, can also be obtained according to these accompanying drawings Obtain other accompanying drawings.
Fig. 1 is existing processing technology step schematic diagram;
Fig. 2 is the schematic flow sheet of the preparation method for the random layer interconnection PCB that one embodiment of the invention provides;
Fig. 3 is the processing step schematic diagram in one embodiment of the invention.
Embodiment
In order that those skilled in the art more fully understand the present invention program, below in conjunction with the embodiment of the present invention Accompanying drawing, the technical scheme in the embodiment of the present invention is clearly and completely described, it is clear that described embodiment is only The embodiment of a part of the invention, rather than whole embodiments.Based on the embodiment in the present invention, ordinary skill people The every other embodiment that member is obtained under the premise of creative work is not made, it should all belong to the model that the present invention protects Enclose.
Term " first ", " second ", " the 3rd " in description and claims of this specification and above-mentioned accompanying drawing etc. are For distinguishing different objects, rather than for describing particular order.In addition, term " comprising " and " having " and they are any Deformation, it is intended that cover non-exclusive include.Such as contain the process of series of steps or unit, method, system, product Or equipment the step of being not limited to list or unit, but the step of alternatively also include not listing or unit, or can Selection of land is also included for the intrinsic other steps of these processes, method, product or equipment or unit.
Below by specific embodiment, it is described in detail respectively.
For ease of understanding technical scheme, below, existing processing technology is introduced with reference to accompanying drawing first, The solution of the present invention is introduced in conjunction with accompanying drawing.
Existing processing technology is to process HDI holes on core plate to realize that interlayer interconnects, and then presses increasing layer, is pressed newly Core plate on process HDI holes and realize that interlayer interconnects, press increasing layer again ... ..., repeat the above steps, required for processing The PCB of the number of plies.
As shown in figure 1, old process may include:
Internal layer:Blanking core plate → 1 → filling perforation of laser drill plating 1 → pattern transfer, 1 → matching board 1+ laminations 1
After pressing 1 time:2 → filling perforation of → laser drill plating 2 → pattern transfer, 2 → matching board 2+ laminations 2
After pressing 2 times:3 → filling perforation of → laser drill plating 3 → pattern transfer, 3 → matching board 3+ laminations 3
After pressing 3 times:4 → filling perforation of → laser drill plating 4 → pattern transfer, 4 → matching board 4+ laminations 4
……
Outer layer:Welding resistance → end.
As described above, existing processing technology needs very more pressing steps, PCB layer number is more, required pressing Step is also more, and cost is higher, and precision is poorer, is more easily reduced product quality.
To solve the above problems, the present invention provides a kind of random layer interconnection PCB preparation method, it is only necessary to one step press, It can be prepared by the random layer interconnection PCB of the required number of plies.
As shown in Fig. 2 it is the schematic flow sheet of the preparation method for the random layer interconnection PCB that one embodiment of the invention provides; As shown in figure 3, it is the processing step schematic diagram of the embodiment.
The flow of the preparation method mainly includes in the embodiment of the present invention:
1st, internal layer:
Core plate:Blanking → laser drill → filling perforation plating → pattern transfer → upper conductive material(Silk-screen or plating are manual)→ (Matching board)
Bonding sheet(PP):Blanking → milling/brill, fluting →(Matching board)
2nd, outer layer:→ pressing → welding resistance →...
The following detailed description of.
It refer to Fig. 2 and Fig. 3, random layer interconnection PCB provided in an embodiment of the present invention preparation method, it may include:
The 21st, the multi-disc core plate and multi-disc bonding sheet for forming PCB are provided.
Blanking forms PCB core plate and bonding sheet first, and core plate can be double face copper, and bonding sheet can be semi-solid preparation Piece(PP).In the present embodiment, core plate of the thickness of dielectric layers for 2mil to 4mil exotic material is preferably selected on request, with And select the prepreg of exotic material.Mil (Chinese transliteration:Mil), i.e. mil, equal to 0.0254mm (millis Rice).
Optionally, the core plate includes the middle dielectric layer for exotic material and the copper foil layer on two sides, the dielectric layer Thickness between 2 ~ 4mil.
22nd, the core plate is drilled, plating and inner figure processing, set in the docking location of the core plate surface Conductive material.
In some embodiments, step 22 specifically may include:
2201st, HDI holes are processed on the core plate using laser drilling process, filling perforation plating is carried out to the HDI holes;First, Designed using laser drill and burn laser hole pass, laser drilling parameters routinely control;Then, will be metallized in HDI holes And electric plated with copper, HDI holes are filled up.
2202nd, through pad pasting, exposure, development and etching step, inner figure is processed in the core plate surface, wherein, The position in HDI holes forms HDI connection pads, and the HDI connections pad is the docking location;This step purpose is to need client The image hotpoint wanted is on PCB single level.
The 2203rd, conductive material is set on the HDI connection pads of the core plate surface, the conductive material is semi-solid preparation state Electrocondution slurry.
Optionally, the conductive material is specially tin slurry or copper slurry or silver paste or conductive bond piece.
Optionally, can select to use silk-screen or plating or manual mode, in the core plate surface according to pattern situations Conductive material is set on HDI connection pads.
Optionally, the thickness of the conductive material is between 25 ~ 80 microns.
Optionally, the thickness of the conductive material is not less than the thickness of the bonding sheet.
23rd, the bonding sheet is slotted, opens up the position correspondence of groove in the conductive material;Specifically, with The position correspondence of HDI connection pads;Position corresponding to each HDI connection pads will slot.
Optionally, the groove on the bonding sheet is more unilateral big 4mil than the HDI connection pads of the core plate surface.
24th, the wall in order of bonding sheet described in core plate described in the multi-disc that above-mentioned steps 22 and 23 are processed and multi-disc will be passed through Folded, in obtained stepped construction, the conductive material on the core plate is accommodated in the groove on the bonding sheet.
It is pointed out that the inner figure on every chip is processed as needed, the internal layer figure on different core plates Shape is different, and may also there be difference the position of HDI connection pads.
25th, the stepped construction is pressed, it is interlayer connection conductor to make the conductive material melting solidify afterwards, is realized The interlayer interconnection of core plate described in multi-disc, random layer interconnection PCB is made.
It is critical workflow to press step, using HTHP, while bonding sheet is solidified, is also melted conductive material again Solidification so that the HDI connection pads of adjacent level are soldered, and play the effect of interconnection.Preferably, the pressing step Parameter is:180 DEG C ~ 330 DEG C of temperature;Pressure 200PSI ~ 600PSI.
Subsequently, the conventional flowsheet of welding resistance can also be included, normal control, be no longer described in detail herein.
In summary, the embodiment of the invention discloses a kind of random layer interconnection PCB preparation method, using by conductive material The surface of the core plate of internal layer is arranged on, melting and solidification is interlayer connection conductor after pressing, so as to realize the technical side of interlayer interconnection Case.Key problem in technology point is:1st, the technological process simplified;2nd, using extraordinary material, such as the conduction of the electrocondution slurry of semi-solid preparation state Material, carry out the PCB construction of interior welds;3rd, specific process control method and parameter.
Using technical solution of the present invention, it is only necessary to carry out simple preprocessing to core plate and coordinate one step press flow, so that it may To be made to random layer interconnection PCB, manufacture craft is simplified, can greatly shorten the technique stream of random layer interconnection technique Journey, processing efficiency is improved, reduce cost of manufacture, realize the reduction of such cost of circuit panel products more than 300%.Wherein, HDI exponent number is more, saves efficiency and cost is more.
Technical solution of the present invention is applied to high-density circuit board processing and fabricating field, the cell phone lines plate that is particularly suitable for use in processing The fields such as making.
In the above-described embodiments, the description to each embodiment all emphasizes particularly on different fields, and is not described in some embodiment Part, may refer to the associated description of other embodiments.
Above-described embodiment is merely illustrative of the technical solution of the present invention, rather than its limitations;The ordinary skill people of this area Member should be understood:It can still modify to the technical scheme described in the various embodiments described above, or to which part skill Art feature carries out equivalent substitution;And these modifications or replacement, the essence of appropriate technical solution is departed from each reality of the present invention Apply the spirit and scope of a technical scheme.

Claims (8)

  1. A kind of 1. random layer interconnection PCB preparation method, it is characterised in that including:
    The multi-disc core plate and multi-disc bonding sheet for forming PCB are provided;
    The core plate is drilled, plating and inner figure processing, conduction material is set in the docking location of the core plate surface Material;
    The bonding sheet is slotted, opens up the position correspondence of groove in the conductive material;
    Bonding sheet described in core plate described in multi-disc by above-mentioned steps processing and multi-disc is spaced stacking in order, obtained stacking In structure, the conductive material on the core plate is accommodated in the groove on the bonding sheet;
    The stepped construction is pressed, it is interlayer connection conductor to make the conductive material melting solidify afterwards, realizes multi-disc institute The interlayer interconnection of core plate is stated, random layer interconnection PCB is made.
  2. 2. according to the method for claim 1, it is characterised in that the core plate is drilled, plating and inner figure add Work, conductive material is set to include in the docking location of the core plate surface:
    HDI holes are processed on the core plate using laser drilling process, filling perforation plating is carried out to the HDI holes;
    Through pad pasting, exposure, development and etching step, inner figure is processed in the core plate surface, wherein, in the position in HDI holes Put to form HDI connection pads, the HDI connections pad is the docking location;
    Conductive material is set on the HDI connection pads of the core plate surface, and the conductive material is the conductive paste of semi-solid preparation state Material.
  3. 3. according to the method for claim 2, it is characterised in that
    The conductive material is specially tin slurry or copper slurry or silver paste or conductive bond piece.
  4. 4. according to the method for claim 2, it is characterised in that
    Groove on the bonding sheet is more unilateral big 4mil than the HDI connection pads of the core plate surface.
  5. 5. according to the method for claim 2, it is characterised in that
    Using silk-screen or plating or manual mode, conductive material is set on the HDI connection pads of the core plate surface.
  6. 6. according to the method for claim 1, it is characterised in that
    The thickness of the conductive material is between 25 ~ 80 microns.
  7. 7. according to the method for claim 1, it is characterised in that
    The core plate includes the middle dielectric layer for exotic material and the copper foil layer on two sides, the thickness of the dielectric layer between 2 ~ Between 4mil.
  8. 8. according to the method for claim 1, it is characterised in that
    It is described pressing step parameter be:180 DEG C ~ 330 DEG C of temperature;Pressure 200PSI ~ 600PSI.
CN201710739194.0A 2017-08-25 2017-08-25 A kind of random layer interconnection PCB preparation method Pending CN107529292A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
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Application Number Priority Date Filing Date Title
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Publications (1)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111479391A (en) * 2020-04-16 2020-07-31 广东通元精密电路有限公司 HDI board manufacturing method for any-order interconnection and HDI board
CN111970844A (en) * 2020-09-07 2020-11-20 深圳市星河电路股份有限公司 Manufacturing process flow method of HDI board with any layer
CN112714558A (en) * 2020-12-01 2021-04-27 景旺电子科技(珠海)有限公司 Method for manufacturing multilayer circuit board
CN112711929A (en) * 2021-01-18 2021-04-27 广州兴森快捷电路科技有限公司 Blind groove glue overflow control method and device, electronic equipment and storage medium

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5258094A (en) * 1991-09-18 1993-11-02 Nec Corporation Method for producing multilayer printed wiring boards
JP2001053438A (en) * 1999-08-16 2001-02-23 Sony Corp Method for manufacturing multi-layer printed wiring board
CN1906985A (en) * 2004-10-08 2007-01-31 松下电器产业株式会社 Multilayer circuit board manufacturing method
CN102281712A (en) * 2010-06-10 2011-12-14 富士通株式会社 Laminated circuit board, bonding sheet, laminated-circuit-board producing method, and bonding-sheet producing method
CN103578804A (en) * 2013-11-01 2014-02-12 电子科技大学 Method for manufacturing rigidity and flexibility combined printed circuit board

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5258094A (en) * 1991-09-18 1993-11-02 Nec Corporation Method for producing multilayer printed wiring boards
JP2001053438A (en) * 1999-08-16 2001-02-23 Sony Corp Method for manufacturing multi-layer printed wiring board
CN1291858A (en) * 1999-08-16 2001-04-18 索尼公司 Multilayer printing distribution board and its making method
CN1906985A (en) * 2004-10-08 2007-01-31 松下电器产业株式会社 Multilayer circuit board manufacturing method
CN102281712A (en) * 2010-06-10 2011-12-14 富士通株式会社 Laminated circuit board, bonding sheet, laminated-circuit-board producing method, and bonding-sheet producing method
CN103578804A (en) * 2013-11-01 2014-02-12 电子科技大学 Method for manufacturing rigidity and flexibility combined printed circuit board

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111479391A (en) * 2020-04-16 2020-07-31 广东通元精密电路有限公司 HDI board manufacturing method for any-order interconnection and HDI board
CN111970844A (en) * 2020-09-07 2020-11-20 深圳市星河电路股份有限公司 Manufacturing process flow method of HDI board with any layer
CN112714558A (en) * 2020-12-01 2021-04-27 景旺电子科技(珠海)有限公司 Method for manufacturing multilayer circuit board
CN112711929A (en) * 2021-01-18 2021-04-27 广州兴森快捷电路科技有限公司 Blind groove glue overflow control method and device, electronic equipment and storage medium
CN112711929B (en) * 2021-01-18 2024-03-26 广州兴森快捷电路科技有限公司 Blind groove glue overflow control method and device, electronic equipment and storage medium

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