CN110602900A - Multilayer and multistage HDI plate manufacturing method and device - Google Patents
Multilayer and multistage HDI plate manufacturing method and device Download PDFInfo
- Publication number
- CN110602900A CN110602900A CN201910874879.5A CN201910874879A CN110602900A CN 110602900 A CN110602900 A CN 110602900A CN 201910874879 A CN201910874879 A CN 201910874879A CN 110602900 A CN110602900 A CN 110602900A
- Authority
- CN
- China
- Prior art keywords
- holes
- board
- hdi
- blind holes
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09509—Blind vias, i.e. vias having one side closed
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/0959—Plated through-holes or plated blind vias filled with insulating material
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
The invention discloses a method and a device for manufacturing a multilayer and multistage HDI plate, wherein the method comprises the following steps: the laminate provided with the buried holes is an H/Hoz core plate; the buried holes are plugged in a pressing glue filling mode, a 1080 semi-solidified glue film is used as a glue filling layer, and the resin content is RC 68%; the blind holes are arranged on the bonding pads of the ball grid array, and the holes of the blind holes are filled and leveled by adopting electroplating copper plating. The apparatus is for performing a method. According to the embodiment of the invention, the laminated board provided with the buried holes is the H/Hoz core board, the thickness of the multilayer HDI board can be reduced, the buried holes are plugged in a pressing glue filling mode, the glue filling layer uses 1080 semi-cured glue, the resin content is RC 68%, the balance of hardness and processing efficiency can be met, the blind holes are arranged on the bonding pads of the ball grid array, and the holes of the blind holes are filled by electroplating copper plating, so that the influence of welding on the flatness can be reduced.
Description
Technical Field
The invention relates to the technical field of PCBs, in particular to a method and a device for manufacturing a multilayer multi-order HDI board.
Background
With the increasing market demand of electronic consumer products in the world, the functions of the electronic products are more and more complex, the performances of the electronic products are more and more excellent, and the electronic products are smaller and lighter. Therefore, the demand for the printed board is higher and higher. The HDI board is highlighted in wide application of the HDI board, and the HDI board is widely applied to the fields of navigation, medical treatment, transportation, remote communication and the like. The demand for such HDI-made boards is increasing with the widespread use of small-sized packaged portable electronic devices and with high-density interconnects.
The early processing is mainly focused on the first-order HDI board and the base board without the overlapped holes, and along with the requirement of product development, the processing requirement of the overlapped holes further increases the HDI processing difficulty, and the product yield and the lead cycle face severe challenges. Therefore, the processing technology of the multilayer multi-stage hole-overlapping HDI plate is urgently needed to be developed, the processing requirement of the multi-stage hole-overlapping HDI plate is met by improving the processing technology of the real multi-stage hole-overlapping, and the market competitiveness of the product is improved.
Disclosure of Invention
Embodiments of the present invention aim to address, at least to some extent, one of the technical problems in the related art. Therefore, an object of the embodiments of the present invention is to provide a method and an apparatus for manufacturing a multilayer multi-level HDI board.
The technical scheme adopted by the invention is as follows:
in a first aspect, an embodiment of the present invention provides a method for manufacturing a multilayer multi-stage HDI board, including: the laminate provided with the buried holes is an H/Hoz core plate; the buried holes are plugged in a pressing glue filling mode, a 1080 semi-solidified glue film is used as a glue filling layer, and the resin content is RC 68%; the blind holes are arranged on the bonding pads of the ball grid array, and the holes of the blind holes are filled and leveled by adopting electroplating copper plating.
Preferably, the blind holes comprise stacked holes, and correspondingly, the lines of the laminate where the blind holes are located are provided with compensation coefficients.
Preferably, the specification of the inner layer circuit of the HDI board comprises that the minimum line width/line distance is 3/3mil, the distance from an inner layer hole to a line is 6mil, the aperture of a blind hole is 0.10mm, and the single side of a welding ring is 3 mil; correspondingly, 1/3oz copper foil is pressed in an inner-layer pressing mode and an outer-layer pressing mode.
Preferably, the HDI plate manufacturing step includes: cutting, drilling and burying holes, depositing copper, electroplating the whole board, transferring the pattern of a buried hole laminate, pressing, drilling blind holes by laser, depositing copper, electroplating and filling the blind holes, transferring the pattern of a non-buried hole laminate, pressing, electroplating the pattern, etching the outer layer circuit, welding resistance, characters, surface treatment, shape processing, electrical testing, and checking and packaging.
Preferably, the line is provided with a compensation factor comprising: IC compensation 1.2mil, ball grid array pad compensation 1.3mil, trace compensation 1.4 mil.
In a second aspect, an embodiment of the present invention provides a device for manufacturing a multilayer multi-stage HDI board, including: the board unit is used for enabling the laminate provided with the buried holes to be an H/Hoz core board; the buried hole unit is used for plugging the buried hole in a pressing glue filling mode, a 1080 semi-solidified glue film is used as a glue filling layer, and the resin content is RC 68%; and the blind hole unit is used for enabling the blind holes to be arranged on the bonding pads of the ball grid array, and the holes of the blind holes are filled and leveled by adopting electroplating copper plating.
Preferably, the blind holes comprise stacked holes, and correspondingly, the lines of the laminate where the blind holes are located are provided with compensation coefficients.
Preferably, the specification of the inner layer circuit of the HDI board comprises that the minimum line width/line distance is 3/3mil, the distance from an inner layer hole to a line is 6mil, the aperture of a blind hole is 0.10mm, and the single side of a welding ring is 3 mil; correspondingly, 1/3oz copper foil is pressed in an inner-layer pressing mode and an outer-layer pressing mode.
Preferably, the HDI plate manufacturing step includes: cutting, drilling and burying holes, depositing copper, electroplating the whole board, transferring the pattern of a buried hole laminate, pressing, drilling blind holes by laser, depositing copper, electroplating and filling the blind holes, transferring the pattern of a non-buried hole laminate, pressing, electroplating the pattern, etching the outer layer circuit, welding resistance, characters, surface treatment, shape processing, electrical testing, and checking and packaging.
Preferably, the line is provided with a compensation factor comprising: IC compensation 1.2mil, ball grid array pad compensation 1.3mil, trace compensation 1.4 mil.
The embodiment of the invention has the beneficial effects that:
according to the embodiment of the invention, the laminated board provided with the buried holes is the H/Hoz core board, the thickness of the multilayer HDI board can be reduced, the buried holes are plugged in a pressing glue filling mode, the glue filling layer uses 1080 semi-cured glue, the resin content is RC 68%, the balance of hardness and processing efficiency can be met, the blind holes are arranged on the bonding pads of the ball grid array, and the holes of the blind holes are filled by electroplating copper plating, so that the influence of welding on the flatness can be reduced.
Drawings
FIG. 1 is a flow chart of one embodiment of a method for manufacturing a multilayer multi-order HDI plate;
FIG. 2 is a schematic structural diagram of an eight-layer third-order HDI board;
FIG. 3 is a connection diagram of an embodiment of a device for manufacturing a multilayer multi-stage HDI plate.
Detailed Description
It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict.
The technical terms involved include:
pp sheets are prepregs (Prepreg is the acronym for Pre-preg), which are a sheet-like bonding material synthesized from resin and a carrier.
BGA: ball Grid Array packaging (Ball Grid Array).
The PAD is a PAD or a PAD.
HDI is an abbreviation for High Density interconnect (High Density interconnect) and is a technique for producing printed circuit boards, a relatively High line distribution Density circuit board using micro-blind buried via technology.
H/Hoz is half the thickness relative to 1 oz. Hoz the copper thickness was: 0.0354 mm.
1/3oz, oz (case free) is an abbreviation for the symbol spence (ounce).
Current density, ASD: ampere per square decimeter.
Example 1.
The embodiment provides a method for manufacturing a multilayer multi-order HDI plate, which comprises the following steps:
s1, the laminate provided with the buried holes is an H/Hoz core plate;
s2, plugging holes by adopting a pressing and glue filling mode in buried holes, wherein a 1080 semi-solidified glue film is used as a glue filling layer, and the resin content is RC 68%;
and S3, arranging the blind holes on the bonding pads of the ball grid array, and filling the holes of the blind holes by adopting electroplating copper plating.
Specifically, a manufacturing process of a multilayer (eight-layer) multi-level (three-order) stacked-via HDI printed circuit board shown in fig. 2 is taken as an illustration:
eight layers of three-order HDI boards (HDI boards for short) are provided with a L1-2 layer, a L2-3 layer, a L3-4 layer, a L5-6 layer, a L6-7 layer and a L7-8 layer, blind holes are formed in parts of the layers, overlapped holes are formed in parts of the layers, and holes are buried in a layer L4-5; the minimum copper thickness of each layer is required to be 24.9 um; the blind holes of the L1-2 layer and the L7-8 layer are designed on the bonding element PAD.
The finished product thickness of the HDI plate is 0.8+/-0.08mm, L4-5 layers are provided with buried holes, and in order to meet the requirement of the finished product thickness, L4-5 layers adopt core plates which do not contain copper and have the thickness of 0.10mm, and H/Hoz copper is added. The holes are filled in a hole embedding mode through pressing and filling glue, 1080(RC 68%) PP (polypropylene) is used as a glue filling layer, namely a 1080 model prepreg, and the specific resin content is RC 68%.
The blind holes of the L1-2 layer and the L7-8 layer are arranged on a BGA PAD (printed circuit board), the minimum distance between IC PADs in a (PCB) manuscript can be 0.08mm, and in order to ensure that the PADs are welded smoothly and welding cannot be influenced, electroplating copper plating is adopted in the blind holes for filling. The fabrication tool (i.e., the tool and instrument used in performing a specific PCB drawing, film, etc.) gives the IC 1.2mil compensation, the BGA PAD 1.3mil compensation, and the trace 1.4mil compensation. That is, the line is provided with compensation coefficients including: IC compensation 1.2mil, ball grid array pad compensation 1.3mil, trace compensation 1.4 mil. The method aims to improve the fault tolerance rate and reduce the reject ratio.
When the HDI board has the overlapped holes, in order to ensure that the overlapped holes are accurately aligned and no holes are caused in the blind holes after pressing, a compensation coefficient specified by a manufacturing tool of an inner layer circuit needs to be given, and meanwhile, the blind holes are completely filled by electroplating copper plating.
In the original of the inner layer circuit, the minimum line width/line distance is 3/3mil, the distance from the inner layer hole to the line is 6mil, the blind hole with the aperture of 0.10mm is provided, and the single side of the welding ring is 3 mil. In order to meet the design, 1/3oz copper foil is laminated on the inner layer and the outer layer, and interlayer alignment marks are added during circuit manufacturing to ensure accurate lamination alignment. The specifications of the inner layer circuit of the HDI board comprise that the minimum line width/line distance is 3/3mil, the line distance from an inner layer hole to a line is 6mil, the aperture of a blind hole is 0.10mm, and the single edge of a welding ring is 3 mil; correspondingly, 1/3oz copper foil is laminated by adopting an inner-layer laminating mode and an outer-layer laminating mode to form a conductive layer on the board.
For eight layers of third order HDI boards, specific process flow includes:
cutting → drilling four-five-layer buried holes → copper deposition/full-board electroplating → first pattern transfer → first pressing → laser drilling blind holes → copper deposition → blind hole electroplating filling → second pattern transfer → second pressing → laser drilling blind holes → copper deposition → blind hole electroplating filling → third pattern transfer → third pressing → drilling through holes → laser drilling blind holes → copper deposition/full-board electroplating → fourth pattern transfer → pattern electroplating → outer layer circuit etching → solder resist → surface processing → exterior processing → electrical test → inspection of package shipment.
The HDI board manufacturing step includes: cutting, drilling and burying holes, depositing copper, electroplating the whole board, transferring the pattern of a buried hole laminate, pressing, drilling blind holes by laser, depositing copper, electroplating and filling the blind holes, transferring the pattern of a non-buried hole laminate, pressing, electroplating the pattern, etching the outer layer circuit, welding resistance, characters, surface treatment, shape processing, electrical testing, and checking and packaging.
Wherein, the specific characteristic details include:
drilling a buried hole: a via hole is drilled between the fourth layer and the fifth layer (L4-5), which is also called a buried hole, because the hole is buried in the middle of the board.
Copper deposition/full-plate electroplating: a layer of copper for conduction is deposited and adsorbed on the hole wall through the reaction of chemical liquid medicine, and the whole plate surface of the whole plate is electroplated with copper to meet the requirement.
Pattern transfer one: the fourth and fifth layers of circuits are manufactured, dry films are manufactured, and film tools need to be compensated in a certain proportion, so that the whole alignment is accurate after pressing is guaranteed conveniently.
And (2) pattern transfer II: the third and sixth layers of circuits are manufactured, dry films are manufactured, and film tools need to be compensated in a certain proportion, so that the integral alignment after lamination is ensured to be accurate
And (3) pattern transfer: the second and seventh layers of circuits, the dry film and the film tool need to be compensated in a certain proportion, so that the whole alignment after the pressing is convenient to ensure
And (4) pattern transfer: and manufacturing a first layer circuit, an eighth layer circuit and a dry film.
Pattern electroplating: adopting the parameters of the electric current of the diagram: copper plating: 1.5ASD 60min, tin plating: 1.3ASD 10min meets the final pore copper requirement: hole copper: 31-32um surface copper: 35.4-40.1 um.
Laser drilling of blind holes: and drilling the corresponding number of blind holes by using a laser drilling machine. Holes that do not drill through to the other layer are blind holes.
Blind hole electroplating and filling: and electroplating copper in the blind hole through the reaction of electroplating liquid, so that the blind hole forms a flat hole plane.
The manufacturing method of the HDI plate classified as general purpose comprises the following steps:
cutting, drilling and burying holes, depositing copper, electroplating the whole board, transferring the pattern of a buried hole laminate, pressing, drilling blind holes by laser, depositing copper, electroplating and filling the blind holes, transferring the pattern of a non-buried hole laminate, pressing, electroplating the pattern, etching the outer layer circuit, welding resistance, characters, surface treatment, shape processing, electrical testing, and checking and packaging.
Example 2.
Fig. 3 shows a multilayer multistage HDI board making device, including:
the board unit 1 is used for enabling the laminate provided with the buried holes to be an H/Hoz core board;
the buried hole unit 2 is used for plugging buried holes in a pressing glue filling mode, a 1080 semi-solidified glue film is used as a glue filling layer, and the resin content is RC 68%;
and the blind hole unit 3 is used for arranging the blind holes on the bonding pads of the ball grid array, and the holes of the blind holes are filled and leveled by adopting electroplating copper plating.
While the preferred embodiments of the present invention have been illustrated and described, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (10)
1. A manufacturing method of a multilayer multi-order HDI plate is characterized by comprising the following steps:
the laminate provided with the buried holes is an H/Hoz core plate;
plugging the buried holes in a pressing and glue filling mode, wherein the glue filling layer is 1080PP, and the resin content is RC 68%;
the blind holes are arranged on the bonding pads of the ball grid array, and the holes of the blind holes are filled and leveled by adopting electroplating copper plating.
2. The method for manufacturing the multilayer multi-order HDI board as claimed in claim 1, wherein the blind holes comprise stacked holes, and the corresponding lines of the layer board where the blind holes are located are provided with compensation coefficients.
3. The method for manufacturing the multilayer multi-stage HDI board as claimed in claim 1, wherein the specification of the inner layer circuit of the HDI board includes that the minimum line width/line distance is 3/3mil, the inner layer hole-to-line distance is 6mil, the aperture of the blind hole is 0.10mm, and the unilateral of the solder ring is 3 mil;
correspondingly, 1/3oz copper foil is pressed in an inner-layer pressing mode and an outer-layer pressing mode.
4. The method for manufacturing the multilayer multi-stage HDI plate as claimed in claim 1, wherein the HDI plate manufacturing step comprises:
cutting, drilling and burying holes, depositing copper, electroplating the whole board, transferring the pattern of a buried hole laminate, pressing, drilling blind holes by laser, depositing copper, electroplating and filling the blind holes, transferring the pattern of a non-buried hole laminate, pressing, electroplating the pattern, etching the outer layer circuit, welding resistance, characters, surface treatment, shape processing, electrical testing, and checking and packaging.
5. The method for manufacturing the multilayer multi-order HDI board as claimed in claim 2, wherein the circuit is provided with a compensation factor comprising:
IC compensation 1.2mil, ball grid array pad compensation 1.3mil, trace compensation 1.4 mil.
6. The utility model provides a multistage HDI board making devices of multilayer, its characterized in that includes:
the board unit is used for enabling the laminate provided with the buried holes to be an H/Hoz core board;
the buried hole unit is used for plugging the buried hole in a pressing and glue filling mode, a glue filling layer is made of 1080PP, and the resin content is RC 68%;
and the blind hole unit is used for enabling the blind holes to be arranged on the bonding pads of the ball grid array, and the holes of the blind holes are filled and leveled by adopting electroplating copper plating.
7. The device for manufacturing the multilayer multi-order HDI board as claimed in claim 6, wherein the blind holes comprise stacked holes, and the corresponding lines of the layer board where the blind holes are located are provided with compensation coefficients.
8. The device for manufacturing the multilayer multi-stage HDI board as claimed in claim 6, wherein the specifications of the inner layer circuit of the HDI board include a minimum line width/line distance of 3/3mil, an inner layer hole-to-line distance of 6mil, a blind hole aperture of 0.10mm, and a single edge of a solder ring of 3 mil;
correspondingly, 1/3oz copper foil is pressed in an inner-layer pressing mode and an outer-layer pressing mode.
9. The device for manufacturing the multilayer multi-stage HDI plate as claimed in claim 6, wherein the HDI plate manufacturing step comprises:
cutting, drilling and burying holes, depositing copper, electroplating the whole board, transferring the pattern of a buried hole laminate, pressing, drilling blind holes by laser, depositing copper, electroplating and filling the blind holes, transferring the pattern of a non-buried hole laminate, pressing, electroplating the pattern, etching the outer layer circuit, welding resistance, characters, surface treatment, shape processing, electrical testing, and checking and packaging.
10. The device for manufacturing the multilayer multi-order HDI board as claimed in claim 7, wherein the circuit is provided with a compensation factor comprising:
IC compensation 1.2mil, ball grid array pad compensation 1.3mil, trace compensation 1.4 mil.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910874879.5A CN110602900A (en) | 2019-09-17 | 2019-09-17 | Multilayer and multistage HDI plate manufacturing method and device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910874879.5A CN110602900A (en) | 2019-09-17 | 2019-09-17 | Multilayer and multistage HDI plate manufacturing method and device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN110602900A true CN110602900A (en) | 2019-12-20 |
Family
ID=68860151
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910874879.5A Pending CN110602900A (en) | 2019-09-17 | 2019-09-17 | Multilayer and multistage HDI plate manufacturing method and device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110602900A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111343800A (en) * | 2020-03-18 | 2020-06-26 | 四川英创力电子科技股份有限公司 | Processing technology for local electroplating of blind buried hole |
| CN111885833A (en) * | 2020-07-28 | 2020-11-03 | 深圳市迅捷兴科技股份有限公司 | Through hole blind hole pressing glue filling method |
| CN112888199A (en) * | 2021-01-15 | 2021-06-01 | 浪潮电子信息产业股份有限公司 | Method for forming pin jack of multilayer PCB |
| CN113556886A (en) * | 2020-04-23 | 2021-10-26 | 深南电路股份有限公司 | Manufacturing method of multi-order blind hole circuit board and multi-order blind hole circuit board |
| CN116156741A (en) * | 2023-04-23 | 2023-05-23 | 南昌龙旗信息技术有限公司 | Printed circuit board and mobile device |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008192720A (en) * | 2007-02-02 | 2008-08-21 | Hitachi Communication Technologies Ltd | Method of manufacturing multilayer printed wiring board |
| CN102523704A (en) * | 2011-12-15 | 2012-06-27 | 深圳崇达多层线路板有限公司 | Production method of multi-stage HDI plate |
| CN103179812A (en) * | 2013-04-18 | 2013-06-26 | 梅州市志浩电子科技有限公司 | Manufacturing method of high-order multistage HDI (High Density Interconnection) printed circuit board |
| CN106455366A (en) * | 2016-11-17 | 2017-02-22 | 深圳崇达多层线路板有限公司 | Method for electroplating copper taphole in PCB |
| CN106793571A (en) * | 2016-11-15 | 2017-05-31 | 深圳崇达多层线路板有限公司 | A kind of the electroplates in hole filling perforation method |
-
2019
- 2019-09-17 CN CN201910874879.5A patent/CN110602900A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008192720A (en) * | 2007-02-02 | 2008-08-21 | Hitachi Communication Technologies Ltd | Method of manufacturing multilayer printed wiring board |
| CN102523704A (en) * | 2011-12-15 | 2012-06-27 | 深圳崇达多层线路板有限公司 | Production method of multi-stage HDI plate |
| CN103179812A (en) * | 2013-04-18 | 2013-06-26 | 梅州市志浩电子科技有限公司 | Manufacturing method of high-order multistage HDI (High Density Interconnection) printed circuit board |
| CN106793571A (en) * | 2016-11-15 | 2017-05-31 | 深圳崇达多层线路板有限公司 | A kind of the electroplates in hole filling perforation method |
| CN106455366A (en) * | 2016-11-17 | 2017-02-22 | 深圳崇达多层线路板有限公司 | Method for electroplating copper taphole in PCB |
Non-Patent Citations (1)
| Title |
|---|
| 白亚旭等: "新型盲孔填孔技术HDI板工艺流程研究", 《印制电路信息》 * |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111343800A (en) * | 2020-03-18 | 2020-06-26 | 四川英创力电子科技股份有限公司 | Processing technology for local electroplating of blind buried hole |
| CN113556886A (en) * | 2020-04-23 | 2021-10-26 | 深南电路股份有限公司 | Manufacturing method of multi-order blind hole circuit board and multi-order blind hole circuit board |
| CN111885833A (en) * | 2020-07-28 | 2020-11-03 | 深圳市迅捷兴科技股份有限公司 | Through hole blind hole pressing glue filling method |
| CN112888199A (en) * | 2021-01-15 | 2021-06-01 | 浪潮电子信息产业股份有限公司 | Method for forming pin jack of multilayer PCB |
| CN116156741A (en) * | 2023-04-23 | 2023-05-23 | 南昌龙旗信息技术有限公司 | Printed circuit board and mobile device |
| CN116156741B (en) * | 2023-04-23 | 2023-07-04 | 南昌龙旗信息技术有限公司 | Printed circuit board and mobile device |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN110602900A (en) | Multilayer and multistage HDI plate manufacturing method and device | |
| US20090277673A1 (en) | PCB having electronic components embedded therein and method of manufacturing the same | |
| JP2010157709A (en) | Printed wiring board and method for manufacturing the same | |
| US20160219713A1 (en) | Electronic component embedded printed circuit board and method of manufacturing the same | |
| CN110621123A (en) | Manufacturing method of heat-conducting PCB and PCB | |
| US7421779B2 (en) | Multilayer board manufacturing method | |
| CN110691466A (en) | HDI board manufacturing method and device | |
| JP2010016339A (en) | Module using multilayer flexible printed circuit board and method of manufacturing the same | |
| CN103874346A (en) | Method for manufacturing circuit board | |
| US7562446B2 (en) | Method for manufacturing substrate with cavity | |
| KR101109323B1 (en) | A method of manufacturing a printed circuit board | |
| TWI618462B (en) | Method for manufacturing embedded electronic component circuit board with dielectric directly attached | |
| US10219374B2 (en) | Printed wiring board | |
| KR100536315B1 (en) | Semiconductor packaging substrate and manufacturing method thereof | |
| TWI578873B (en) | Manufacturing method of high-density multilayer board | |
| CN103889169B (en) | Package substrate and preparation method thereof | |
| US8669481B2 (en) | Laminated circuit board and board producing method | |
| KR101147343B1 (en) | Integrated printed circuit board embedded with multiple component chip and manufacturing method thereof | |
| US9443830B1 (en) | Printed circuits with embedded semiconductor dies | |
| KR20030011433A (en) | Manufacturing method for hidden laser via hole of multi-layered printed circuit board | |
| KR20150030066A (en) | Printed circuit board | |
| CN220511317U (en) | Copper-buried structure of multilayer printed circuit board | |
| CN104284530A (en) | Method for manufacturing printed circuit board or integrated circuit package substrate through coreless board process | |
| CN213694310U (en) | Element embedded type packaging filling structure | |
| CN214154937U (en) | Integrated circuit component packaged by elements in different orientations |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20191220 |
|
| RJ01 | Rejection of invention patent application after publication |