CN107454008A - A kind of ether intercommunicating system of gigabit 10,000,000,000 and method - Google Patents
A kind of ether intercommunicating system of gigabit 10,000,000,000 and method Download PDFInfo
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- CN107454008A CN107454008A CN201710723780.6A CN201710723780A CN107454008A CN 107454008 A CN107454008 A CN 107454008A CN 201710723780 A CN201710723780 A CN 201710723780A CN 107454008 A CN107454008 A CN 107454008A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L47/00—Traffic control in data switching networks
- H04L47/70—Admission control; Resource allocation
- H04L47/78—Architectures of resource allocation
- H04L47/783—Distributed allocation of resources, e.g. bandwidth brokers
- H04L47/785—Distributed allocation of resources, e.g. bandwidth brokers among multiple network domains, e.g. multilateral agreements
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L47/00—Traffic control in data switching networks
- H04L47/10—Flow control; Congestion control
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L47/00—Traffic control in data switching networks
- H04L47/10—Flow control; Congestion control
- H04L47/12—Avoiding congestion; Recovering from congestion
- H04L47/125—Avoiding congestion; Recovering from congestion by balancing the load, e.g. traffic engineering
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L47/00—Traffic control in data switching networks
- H04L47/10—Flow control; Congestion control
- H04L47/24—Traffic characterised by specific attributes, e.g. priority or QoS
- H04L47/2441—Traffic characterised by specific attributes, e.g. priority or QoS relying on flow classification, e.g. using integrated services [IntServ]
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
- H04L69/08—Protocols for interworking; Protocol conversion
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Abstract
The invention discloses a kind of ether intercommunicating system of gigabit 10,000,000,000 and method, including gigabit ether transceiver interface module, 10,000,000,000 ether transceiver interface modules and logic module, wherein logic module configuration is between gigabit ether transceiver interface module and 10,000,000,000 ether transceiver interface modules, the logic module is used to the gigabit ether flow logic from gigabit ether transceiver interface module is converged into 10,000,000,000 ether transceiver interface modules and exported, and logic module can also be used to respectively export the ten thousand megastream amounts from 10,000,000,000 ether transceiver interface modules into gigabit ether transceiver interface module.A kind of ether intercommunicating system of gigabit 10,000,000,000 and method of the present invention is compared with prior art, solve under gigabit or 10,000,000,000 ether traffic environments, can not be with having selected 10,000,000,000 gigabit interfaces on network hardware equipment to be adapted to, flow can not access network device the problem of, the program has the characteristics of reasonable in design, simple, feasible, practical.
Description
Technical field
The present invention relates to digital communication technology field, specifically a kind of ether intercommunicating system of gigabit 10,000,000,000 and method.
Background technology
With the maturation of optical transport technology, various network traffics management and control and analytical equipment emerge in an endless stream, and the network equipment exists
The interface type supported during development ＆ production can be cured, but can run into equipment interface and be not adapted to network traffics when applying at the scene
The problem of, based on this, it is necessary to a kind of technology that can realize the intercommunication of gigabit 10,000,000,000.
The content of the invention
The technical assignment of the present invention is to be directed to above weak point, there is provided a kind of ether intercommunicating system of gigabit 10,000,000,000 and side
Method.
A kind of ether intercommunicating system of gigabit 10,000,000,000, including gigabit ether transceiver interface module, 10,000,000,000 ether transceiver interface moulds
The configuration of block and logic module, wherein logic module gigabit ether transceiver interface module and 10,000,000,000 ether transceiver interface modules it
Between, the logic module is used to the gigabit ether flow logic from gigabit ether transceiver interface module converging to 10,000,000,000 ether
Transceiver interface module simultaneously exports, and logic module can also be used to divide equally the ten thousand megastream amounts from 10,000,000,000 ether transceiver interface modules
Exported into gigabit ether transceiver interface module.
The logic module carries out behavioral scaling description by Verilog language, and compiling is formed under net meter file synthesis mapping
It is loaded onto in fpga chip, logic control is realized by the form of fpga chip.
The logic module includes the logical gate that gigabit turns 10,000,000,000, and the logical gate that the gigabit turns 10,000,000,000 includes receiving
Module, merging module and XGMII modules, wherein receiving module are responsible for connecing the flow that the transmission of gigabit ether transceiver interface module comes
Receive and parse effective message；Merging module is used to all datas on flows received being merged into be output to XGMII modules all the way；
XGMII modules are used to be packaged conversion to the merging data received, and dock output with 10,000,000,000 ether transceiver interface modules.
The merging module includes two groups, and one of which is used to all come from gigabit ether transceiver interface mould by what is received
Merged block is into two paths of data, and corresponding, this group of merging module includes two；Two paths of data is merged into a way by another group again
According to being output in XGMII modules.
The logic module includes the logical gate of 10,000,000,000 turns of gigabits, and the logical gate of 10,000,000,000 turns of gigabits includes ether
Packet parsing logic module, load balancing logic module, homologous chummage logic module, wherein, Ethernet message resolution logic module
For the data on flows from 10,000,000,000 ether transceiver interface modules to be parsed；Load balancing logic module is used for the report after parsing
Literary information is evenly distributed in gigabit ether transceiver interface module；Homologous chummage logic module is used for load balancing logic module
The data traffic of same source respectively is sent in same receiving device.
A kind of ether interoperability methods of gigabit 10,000,000,000, based on said system, its implementation process is：
Logic module is downloaded in fpga chip first；
Then by gigabit ether transceiver interface module, 10,000,000,000 ether transceiver interface modules the logic module phase with fpga chip respectively
Connection, the gigabit ether transceiver interface module, 10,000,000,000 ether transceiver interface modules are respectively connected with corresponding receiving device；
When gigabit ether transceiver interface module sends gigabit ether flow, logic module is completed to receive, then by all gigabits
Ether traffic aggregation is to 10,000,000,000 ether transceiver interface modules, then exports into connected receiving device；
When 10,000,000,000 ether transceiver interface modules send ten thousand megastream amounts, logic module is completed to receive, and then divides equally to gigabit ether
In transceiver interface module, then export into connected receiving device.
The process of gigabit ether transceiver interface module transmitted traffic to 10,000,000,000 ether transceiver interface modules is：
First gigabit ether transceiver interface module all or several simultaneously access flow and take as former state export it is tactful defeated
Go out to logic module, gigabit ether transceiver interface module is transmitted the flow come and received and parsed through by the receiving module in logic module
Effective message, crc field detection messages integrality is carried according to message, meanwhile, message is encapsulated as to each cycle 69bits number
According to data [68:0]；
Merging module is used to all datas on flows received being merged into be output to XGMII modules all the way；
XGMII modules are used to be packaged conversion to the merging data received, and are docked with 10,000,000,000 ether transceiver interface modules
Output.
The gigabit ether transceiver interface module is configured with 12, and 10,000,000,000 ether transceiver interface modules are configured with 1,
Corresponding, merging module includes two groups, and one of which includes two and can connect on six tunnels received from the transmitting-receiving of gigabit ether
The data on flows of mouth mold block is merged into the module of data on flows all the way, and another group is one and two paths of data is merged into a circuit-switched data
Module.
The detailed process of 10000000000 ether transceiver interface module transmitted traffic data to gigabit ether transceiver interface module is：
Ethernet message resolution logic module parses the data on flows from 10,000,000,000 ether transceiver interface modules first, according to reception
The IP address of Ethernet message carries out Hash calculation and obtains corresponding cryptographic Hash, and then tactful output interface table corresponding to lookup, is obtained
Output interface number is taken, is subsequently forwarded to corresponding output interface；In this process, after being parsed by load balancing logic module
Message information be evenly distributed in gigabit ether transceiver interface module, homologous chummage logic module is used for load balancing logic
The data traffic for the same source that module is divided equally is sent in same receiving device.
Ethernet message resolution logic module parsing data traffic detailed process be：
It is 72bits data data [71 by packet parsing during Ethernet message resolution logic module analytic message:0]；
Then by data data [71:0] data carry out data bit and significance bit separation, and are re-packaged into the 134bits monocycles
Processing data, for long packets of the data length more than 1518 bytes and the ultrashort bag less than 64 bytes, carry out discard processing；
Then the data after encapsulation process are parsed again, identifies Ethernet message, and the non-Ethernet message that will identify that is lost
Abandon, the Ethernet message identified needs to carry out the Ethernet message of Hash calculation.
Compared to the prior art a kind of ether intercommunicating system of gigabit 10,000,000,000 and method of the present invention, has below beneficial to effect
Fruit：
A kind of ether intercommunicating system of gigabit 10,000,000,000 and method of the present invention, is mainly solved in gigabit or 10,000,000,000 ether traffic environments
Under, can not with having selected 10,000,000,000 gigabit interfaces on network hardware equipment to be adapted to, flow can not access network device the problem of, the party
Case has the characteristics of reasonable in design, simple, feasible, supports the ultrashort bag attenuation function of non-Ethernet message, overlength；Support that gigabit mouth is defeated
Go out automatic load balancing, ensure that output flow will not overload and packet loss；Homologous chummage is supported, is rationally divided according to the IP address of message
With output interface, ensure the integrality of session, it is practical, it is applied widely, it is easy to spread.
Brief description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing
There is the required accompanying drawing used in technology description to be briefly described, it should be apparent that, drawings in the following description are only this
The embodiment of invention, for those of ordinary skill in the art, on the premise of not paying creative work, can also basis
The accompanying drawing of offer obtains other accompanying drawings.
Accompanying drawing 1 turns 10,000,000,000 ether interworking implementation schematic diagrames for the gigabit of the present invention.
Accompanying drawing 2 is 10,000,000,000 turns of gigabit ether interworking implementation schematic diagrames of the invention.
Embodiment
In order that those skilled in the art more fully understand the solution of the present invention, with reference to embodiment to this
Invention is described in further detail.Obviously, described embodiment is only part of the embodiment of the present invention, rather than all
Embodiment.Based on the embodiment in the present invention, those of ordinary skill in the art institute under the premise of creative work is not made
The every other embodiment obtained, belongs to the scope of protection of the invention.
As shown in accompanying drawing 1, Fig. 2, the present invention provides a kind of ether intercommunicating system of gigabit 10,000,000,000, including the transmitting-receiving of gigabit ether connects
Mouth mold block, 10,000,000,000 ether transceiver interface modules and logic module, wherein logic module are configured in gigabit ether transceiver interface module
Between 10,000,000,000 ether transceiver interface modules, the logic module be used for by the gigabit from gigabit ether transceiver interface module with
Too flow logic converges to 10,000,000,000 ether transceiver interface modules and exported, and logic module can also be used to receive from 10,000,000,000 ether
Ten thousand megastream amounts of hair interface module are divided equally to be exported into gigabit ether transceiver interface module.
The logic module carries out behavioral scaling description by Verilog language, and compiling is formed under net meter file synthesis mapping
It is loaded onto in fpga chip, logic control is realized by the form of fpga chip.
The logic module includes the logical gate that gigabit turns 10,000,000,000, and the logical gate that the gigabit turns 10,000,000,000 includes receiving
Module, merging module and XGMII modules, wherein receiving module are responsible for connecing the flow that the transmission of gigabit ether transceiver interface module comes
Receive and parse effective message；Merging module is used to all datas on flows received being merged into be output to XGMII modules all the way；
XGMII modules are used to be packaged conversion to the merging data received, and dock output with 10,000,000,000 ether transceiver interface modules.
The merging module includes two groups, and one of which is used to all come from gigabit ether transceiver interface mould by what is received
Merged block is into two paths of data, and corresponding, this group of merging module includes two；Two paths of data is merged into a way by another group again
According to being output in XGMII modules.
The logic module includes the logical gate of 10,000,000,000 turns of gigabits, and the logical gate of 10,000,000,000 turns of gigabits includes ether
Packet parsing logic module, load balancing logic module, homologous chummage logic module, wherein, Ethernet message resolution logic module
For the data on flows from 10,000,000,000 ether transceiver interface modules to be parsed；Load balancing logic module is used for the report after parsing
Literary information is evenly distributed in gigabit ether transceiver interface module；Homologous chummage logic module is used for load balancing logic module
The data traffic of same source respectively is sent in same receiving device.
The gigabit ether interface is applied to IEEE 802.3-2005 standards, and the 10G ether interfaces are applied to IEEE
802.3ae standard.
The gigabit mouth output holding load is balanced, supports homologous chummage to ensure integrity of sessions.
The EP2AGX125EF29I3 for the model Altera that fpga chip can use.
In the case that load balancing logic module is primarily referred to as to ensure that gigabit mouth do not load packet loss, make flow evenly
It is distributed to each output interface（Here one is that can play best performance for the Analysis server for connecting each output interface,
It is unlikely to some to operate at full capacity, some light duties, second, ensureing that session traffic is not lost without loss, information）.It is homologous same
Place logic module is primarily referred to as, to ensure that the flow of same session can be assigned to same output interface, connecing back-end server
Receive complete session（If the flow that the meaning between the lines is exactly same session is exported to two services from two different interfaces
Device, any one can not all obtain complete session, so as to parse " original meaning " of session）.
A kind of ether interoperability methods of gigabit 10,000,000,000, based on said system, its implementation process is：
Logic module is downloaded in fpga chip first；
Then by gigabit ether transceiver interface module, 10,000,000,000 ether transceiver interface modules the logic module phase with fpga chip respectively
Connection, the gigabit ether transceiver interface module, 10,000,000,000 ether transceiver interface modules are respectively connected with corresponding receiving device；
When gigabit ether transceiver interface module sends gigabit ether flow, logic module is completed to receive, then by all gigabits
Ether traffic aggregation is to 10,000,000,000 ether transceiver interface modules, then exports into connected receiving device；
When 10,000,000,000 ether transceiver interface modules send ten thousand megastream amounts, logic module is completed to receive, and then divides equally to gigabit ether
In transceiver interface module, then export into connected receiving device.
The process of gigabit ether transceiver interface module transmitted traffic to 10,000,000,000 ether transceiver interface modules is：
First gigabit ether transceiver interface module all or several simultaneously access flow and take as former state export it is tactful defeated
Go out to logic module, gigabit ether transceiver interface module is transmitted the flow come and received and parsed through by the receiving module in logic module
Effective message, crc field detection messages integrality is carried according to message, meanwhile, message is encapsulated as to each cycle 69bits number
According to data [68:0]；
Merging module is used to all datas on flows received being merged into be output to XGMII modules all the way；
XGMII modules are used to be packaged conversion to the merging data received, and are docked with 10,000,000,000 ether transceiver interface modules
Output.
The gigabit ether transceiver interface module is configured with 12, and 10,000,000,000 ether transceiver interface modules are configured with 1,
Corresponding, merging module includes two groups, and one of which includes two and can connect on six tunnels received from the transmitting-receiving of gigabit ether
The data on flows of mouth mold block is merged into the module of data on flows all the way, and another group is one and two paths of data is merged into a circuit-switched data
Module.
The detailed process of 10000000000 ether transceiver interface module transmitted traffic data to gigabit ether transceiver interface module is：
Ethernet message resolution logic module parses the data on flows from 10,000,000,000 ether transceiver interface modules first, according to reception
The IP address of Ethernet message carries out Hash calculation and obtains corresponding cryptographic Hash, and then tactful output interface table corresponding to lookup, is obtained
Output interface number is taken, is subsequently forwarded to corresponding output interface；In this process, after being parsed by load balancing logic module
Message information be evenly distributed in gigabit ether transceiver interface module, homologous chummage logic module is used for load balancing logic
The data traffic for the same source that module is divided equally is sent in same receiving device.
Ethernet message resolution logic module parsing data traffic detailed process be：
It is 72bits data data [71 by packet parsing during Ethernet message resolution logic module analytic message:0]；
Then by data data [71:0] data carry out data bit and significance bit separation, and are re-packaged into the 134bits monocycles
Processing data, for long packets of the data length more than 1518 bytes and the ultrashort bag less than 64 bytes, carry out discard processing；
Then the data after encapsulation process are parsed again, identifies Ethernet message, and the non-Ethernet message that will identify that is lost
Abandon, the Ethernet message identified needs to carry out the Ethernet message of Hash calculation.
An instantiation is given below the method for the present invention is described in detail, gigabit is used as using SFP here
Ether transceiver interface module, XAUI interfaces are as 10,000,000,000 ether transceiver interface modules.
When SFP is as accessing, 12 gigabit ether interfaces can all or several while access flow, Suo Youliu
Amount processing logic takes the strategy exported as former state, and when SFP is as exporting, flow is accessed by SFP+ modules, it is contemplated that gigabit
Mouth easily reaches load, so, processing logic can carry out Hash calculation according to the IP address for receiving Ethernet message first and obtain phase
The cryptographic Hash answered, then tactful output interface table corresponding to lookup, obtains output interface number, is subsequently forwarded to corresponding output and connects
Mouthful, ensure that output interface will not cause packet loss because of overload with this, and can ensures that the message of same session can be from same output
Interface exports, and integrity of sessions is guaranteed.Synthesis maps after the design meets design requirement using the description of Verilog language
Realized to FPGA.The data flow of global design such as accompanying drawing 1 and Fig. 2, specific implementation are as follows：
Gigabit turns 10,000,000,000：
1）SFP ether interfaces use the GMII_MAC_1000 modules that QuartusII is provided, and support IEEE 802.3-2005 marks
Standard, the differential signal received is resolved to numeral by receiving module first can handle effective message, and crc field is carried according to message
Detection messages integrality, meanwhile, message is encapsulated as to each cycle 69bits data data [68:0].
2）Using 2 merging modules, by 1）In 12 circuit-switched data streams merge into 2 tunnels.
3）By 2）2 circuit-switched data streams of output carry out two-in-one acquisition and finally exported all the way again.
4）By 3）The data flow of middle output issues xgmii modules and is packaged conversion.
5）By 4）The data flow of middle output docks output with the XAUI modules that QuartusII is provided.
10000000000 turns of gigabits：
For SFP+ interfaces as input, flow enters FPGA internal logics by XAUI modules first, and is by packet parsing
72bits data data [71:0].
By data [71:0] data carry out data bit and significance bit separation, and are re-packaged into the 134bits monocycles and handle
Data.For long packets of the data length more than 1518 bytes and the ultrashort bag less than 64 bytes, processing logic is selected at discarding
Reason.
The data of output are parsed, Ethernet message obtains polynary group information.The non-Ethernet message identified, abandoning should
Message.
Polynary group information is input into hash modules to carry out that hash values are calculated.
Using the hash values of output as output interface table address is searched, output interface value is searched.
Message is exported to corresponding interface according to Query Result.
Output interface table in wherein 10,000,000,000 turns of gigabit logical processes is by output port order
(0123456789AB012345 ... is circulated, untill table is filled up) writes successively.The design does hash fortune using CRC16
Calculate, input source mesh IP is used as Hash input by extending to after 128bits.It is defeated as searching according to message source mesh IP cryptographic Hash
Outgoing interface table address ensure that the message of same session exports from same interface, and the flow of different sessions can be defeated by distinct interface
Go out, ensure that a certain gigabit mouth will not be because overloading packet loss.
By embodiment above, the those skilled in the art can readily realize the present invention.But should
Work as understanding, the present invention is not limited to above-mentioned embodiment.On the basis of disclosed embodiment, the technical field
Technical staff can be combined different technical characteristics, so as to realize different technical schemes.
It is the known technology of those skilled in the art in addition to the technical characteristic described in specification.
Claims (10)
1. a kind of ether intercommunicating system of gigabit 10,000,000,000, it is characterised in that received including gigabit ether transceiver interface module, 10,000,000,000 ether
Interface module and logic module are sent out, wherein logic module configuration is in gigabit ether transceiver interface module and 10,000,000,000 ether transceiver interfaces
Between module, the logic module is used to the gigabit ether flow logic from gigabit ether transceiver interface module converging to ten thousand
Million ether transceiver interface modules simultaneously export, and logic module can be additionally used in ten thousand megastreams from 10,000,000,000 ether transceiver interface modules
Amount is divided equally to be exported into gigabit ether transceiver interface module.
2. the ether intercommunicating system of a kind of gigabit 10,000,000,000 according to claim 1, it is characterised in that the logic module passes through
Verilog language carries out behavioral scaling description, and compiling forms net meter file synthesis mapping and is downloaded in fpga chip, passes through FPGA cores
The form of piece realizes logic control.
A kind of 3. ether intercommunicating system of gigabit 10,000,000,000 according to claim 1 or 2, it is characterised in that the logic module
Include the logical gate that gigabit turns 10,000,000,000, the logical gate that the gigabit turns 10,000,000,000 includes receiving module, merging module and XGMII
Module, wherein receiving module are responsible for the flow that the transmission of gigabit ether transceiver interface module comes receiving and parsing through effective message；Close
And module is used to all datas on flows received being merged into be output to XGMII modules all the way；XGMII modules are used for receiving
To merging data be packaged conversion, and dock output with 10,000,000,000 ether transceiver interface modules.
4. the ether intercommunicating system of a kind of gigabit 10,000,000,000 according to claim 3, it is characterised in that the merging module includes
Two groups, one of which be used for by receive it is all be merged into two paths of data from gigabit ether transceiver interface module, it is corresponding
, this group of merging module includes two；Another group again by two paths of data be merged into all the way data output into XGMII modules.
A kind of 5. ether intercommunicating system of gigabit 10,000,000,000 according to claim 1 or 2, it is characterised in that the logic module
Include the logical gate of 10,000,000,000 turns of gigabits, the logical gate of 10,000,000,000 turns of gigabits includes Ethernet message resolution logic module, born
Equalization logic, homologous chummage logic module are carried, wherein, Ethernet message resolution logic module is used to that 10,000,000,000 ether receipts will to be come from
Send out the data on flows parsing of interface module；Load balancing logic module is used to the message information after parsing being evenly distributed to gigabit
In ether transceiver interface module；Homologous chummage logic module is used for the data for the same source for dividing equally load balancing logic module
Flow is sent in same receiving device.
6. a kind of ether interoperability methods of gigabit 10,000,000,000, it is characterised in that based on said system, its implementation process is：
Logic module is downloaded in fpga chip first；
Then by gigabit ether transceiver interface module, 10,000,000,000 ether transceiver interface modules the logic module phase with fpga chip respectively
Connection, the gigabit ether transceiver interface module, 10,000,000,000 ether transceiver interface modules are respectively connected with corresponding receiving device；
When gigabit ether transceiver interface module sends gigabit ether flow, logic module is completed to receive, then by all gigabits
Ether traffic aggregation is to 10,000,000,000 ether transceiver interface modules, then exports into connected receiving device；
When 10,000,000,000 ether transceiver interface modules send ten thousand megastream amounts, logic module is completed to receive, and then divides equally to gigabit ether
In transceiver interface module, then export into connected receiving device.
A kind of 7. ether interoperability methods of gigabit 10,000,000,000 according to claim 6, it is characterised in that the gigabit ether
Transceiver interface module is configured with 12, and 10,000,000,000 ether transceiver interface modules are configured with 1, and corresponding, merging module includes two
Group, one of which, which includes two, to be merged into one by data on flows of six tunnels received from gigabit ether transceiver interface module
The module of road data on flows, another group is a module that two paths of data is merged into a circuit-switched data.
8. the ether interoperability methods of a kind of gigabit 10,000,000,000 according to claim 6 or 7, it is characterised in that gigabit ether is received and dispatched
The process of interface module transmitted traffic to 10,000,000,000 ether transceiver interface modules is：
First gigabit ether transceiver interface module all or several simultaneously access flow and take as former state export it is tactful defeated
Go out to logic module, gigabit ether transceiver interface module is transmitted the flow come and received and parsed through by the receiving module in logic module
Effective message, crc field detection messages integrality is carried according to message, meanwhile, message is encapsulated as to each cycle 69bits number
According to data [68:0]；
Merging module is used to all datas on flows received being merged into be output to XGMII modules all the way；
XGMII modules are used to be packaged conversion to the merging data received, and are docked with 10,000,000,000 ether transceiver interface modules
Output.
9. the ether interoperability methods of a kind of gigabit 10,000,000,000 according to claim 6 or 7, it is characterised in that 10,000,000,000 ether are received and dispatched
The detailed process of interface module transmitted traffic data to gigabit ether transceiver interface module is：
Ethernet message resolution logic module parses the data on flows from 10,000,000,000 ether transceiver interface modules first, according to reception
The IP address of Ethernet message carries out Hash calculation and obtains corresponding cryptographic Hash, and then tactful output interface table corresponding to lookup, is obtained
Output interface number is taken, is subsequently forwarded to corresponding output interface；In this process, after being parsed by load balancing logic module
Message information be evenly distributed in gigabit ether transceiver interface module, homologous chummage logic module is used for load balancing logic
The data traffic for the same source that module is divided equally is sent in same receiving device.
10. the ether interoperability methods of a kind of gigabit 10,000,000,000 according to claim 9, it is characterised in that Ethernet message parsing is patrolled
The detailed process of volume module parsing data traffic is：
It is 72bits data data [71 by packet parsing during Ethernet message resolution logic module analytic message:0]；
Then by data data [71:0] data carry out data bit and significance bit separation, and are re-packaged into the 134bits monocycles
Processing data, for long packets of the data length more than 1518 bytes and the ultrashort bag less than 64 bytes, carry out discard processing；
Then the data after encapsulation process are parsed again, identifies Ethernet message, and the non-Ethernet message that will identify that is lost
Abandon, the Ethernet message identified needs to carry out the Ethernet message of Hash calculation.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710723780.6A CN107454008B (en) | 2017-08-22 | 2017-08-22 | Gigabit-ten-gigabit Ethernet intercommunication system and method |
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| CN201710723780.6A CN107454008B (en) | 2017-08-22 | 2017-08-22 | Gigabit-ten-gigabit Ethernet intercommunication system and method |
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Cited By (4)
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| CN108073546A (en) * | 2017-12-27 | 2018-05-25 | 西安奇维科技有限公司 | One kind realizes network data reception and reading and control method thereof based on FPGA |
| CN108540350A (en) * | 2018-04-20 | 2018-09-14 | 济南浪潮高新科技投资发展有限公司 | A kind of network flow preprocess method based on FPGA |
| CN109194591A (en) * | 2018-12-03 | 2019-01-11 | 济南浪潮高新科技投资发展有限公司 | A kind of 100G and 10G ether intercommunicating system and method |
| CN109286686A (en) * | 2018-11-23 | 2019-01-29 | 盛科网络（苏州）有限公司 | Load-balancing method based on polling mechanism |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN108073546A (en) * | 2017-12-27 | 2018-05-25 | 西安奇维科技有限公司 | One kind realizes network data reception and reading and control method thereof based on FPGA |
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| CN107454008B (en) | 2021-06-04 |
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