CN107452758A - 显示基板及其制造方法和显示装置 - Google Patents
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Abstract
本发明提供了一种显示基板及其制造方法和显示装置。该显示基板包括衬底基板和位于所述衬底基板上的金属原子层、遮光层和薄膜晶体管,所述遮光层位于所述金属原子层的远离所述衬底基板的一侧,所述薄膜晶体管位于所述遮光层的远离所述衬底基板的一侧。本发明的技术方案中,显示基板包括衬底基板和位于衬底基板上的金属原子和遮光层,遮光层位于金属原子的远离衬底基板的一侧,金属原子通过等离子激元效应增强了遮光层对背光的吸收,从而提高了薄膜晶体管的稳定性和显示效果。
Description
技术领域
本发明涉及显示技术领域,特别涉及一种显示基板及其制造方法和显示装置。
背景技术
低温多晶硅技术(Low Temperature Poly-silicon,简称LTPS)液晶显示装置的薄膜晶体管(Thin Film Transistor,简称TFT)通常采用顶栅结构,因此需要设置遮光层以遮挡背光。
现有技术中遮光层的材料为a-Si。但是,由于a-Si的透光率比较大,因此采用a-Si作为遮光层降低了LTPS显示装置中薄膜晶体管的稳定性和显示效果。
发明内容
本发明提供一种显示基板及其制造方法和显示装置,用于提高薄膜晶体管的稳定性和显示效果。
为实现上述目的,本发明提供了一种显示基板,包括衬底基板和位于所述衬底基板上的金属原子层、遮光层和薄膜晶体管,所述遮光层位于所述金属原子层的远离所述衬底基板的一侧,所述薄膜晶体管位于所述遮光层的远离所述衬底基板的一侧。
可选地,所述金属原子层包括分散设置的金属原子。
可选地,所述金属原子的材料包括Au、Ag、Cu、Pt或者Al。
可选地,所述金属原子的材料为Cu。
可选地,所述遮光层的材料为半导体材料。
可选地,所述遮光层的厚度为至
为实现上述目的,本发明提供了一种显示装置,包括相对设置的对置基板和上述显示基板。
为实现上述目的,本发明提供了一种显示基板的制造方法,包括:
在衬底基板上形成金属原子层、遮光层和薄膜晶体管,所述遮光层位于所述金属原子层的远离所述衬底基板的一侧,所述薄膜晶体管位于所述遮光层的远离所述衬底基板的一侧。
可选地,所述薄膜晶体管包括有源层、栅极和源漏极;
所述在衬底基板上形成金属原子层、遮光层和薄膜晶体管包括:
在衬底基板上依次形成第一缓冲层和金属原子层。
在金属原子层之上依次形成遮光材料层、第二缓冲材料层和第一有源材料层;
对所述第一有源材料层进行晶化处理形成第二有源材料层;
对遮光材料层、第二缓冲层和第二有源材料层进行构图工艺,形成金属原子层、遮光层和有源层;
在有源层上形成源漏极,所述源漏极和有源层连接;
在所述源漏极的上方形成栅极。
可选地,所述金属原子层包括分散设置的金属原子。
本发明具有以下有益效果:
本发明提供的显示基板及其制造方法和显示装置的技术方案中,显示基板包括衬底基板和位于衬底基板上的金属原子和遮光层,遮光层位于金属原子的远离衬底基板的一侧,金属原子通过等离子激元效应增强了遮光层对背光的吸收,从而提高了薄膜晶体管的稳定性和显示效果。
附图说明
图1为本发明实施例一提供的一种显示基板的结构示意图;
图2为未设置金属原子的遮光层和设置了金属原子的遮光层的透过率的对比图;
图3a为实施例三中形成第一缓冲层和金属原子层的示意图;
图3b为实施例三中形成遮光材料层、第二缓冲材料层和第一有源材料层的示意图;
图3c为实施例三中形成第二有源材料层的示意图;
图3d为实施例三中形成遮光层、第二缓冲层和有源层的示意图。
具体实施方式
为使本领域的技术人员更好地理解本发明的技术方案,下面结合附图对本发明提供的显示基板及其制造方法和显示装置进行详细描述。
图1为本发明实施例一提供的一种显示基板的结构示意图,如图1所示,该显示基板包括衬底基板1和位于衬底基板1上的金属原子层、遮光层2和薄膜晶体管,遮光层2位于金属原子层的远离衬底基板1的一侧,薄膜晶体管位于遮光层2的远离衬底基板1的一侧。
本实施例中,金属原子层包括分散设置的金属原子3。该金属原子3为金属颗粒,且该金属原子3分散设置。并且金属原子3的数量很少,因此金属原子3未形成连续的薄膜。
本实施例中,金属原子3的材料为能够产生表面等离激元的金属,例如,金属原子3的材料可包括Au、Ag、Cu、Pt或者Al,其中,优选地,金属原子3的材料为Cu。
本实施例中,遮光层2的材料为半导体材料,优选地,半导体材料为a-Si。当背光从衬底基板1的远离遮光层2的一侧入射时,遮光层2可起到对背光的遮挡作用。
本实施例中,遮光层2的厚度为至优选地,遮光层2的厚度为
进一步地,该显示基板还包括第一缓冲层4,第一缓冲层4位于衬底基板1和金属原子3之间。具体地,第一缓冲层4位于衬底基板1之上,金属原子3分散设置于第一缓冲层4之上。遮光层2位于金属原子3之上,且覆盖金属原子3。
进一步地,该显示基板还包括第二缓冲层5,第二缓冲层5位于遮光层2之上。
本实施例中,薄膜晶体管位于第二缓冲层5之上。薄膜晶体管包括有源层6、源漏极和栅极,有源层6位于第二缓冲层5之上,源漏极位于有源层6之上,且源漏极和有源层6连接,栅极位于源漏极的上方,栅极和源漏极之间设置有绝缘层,其中,源漏极和栅极在图1中未具体画出。优选地,有源层6的材料为p-Si。
本实施例中,显示基板可以为LTPS阵列基板。
本实施例可通过金属的表面等离子激元效应来增强遮光层对背光的吸收。表面等离子激元效应的实质是金属表面电子在外加电磁场的激发下发生集体振荡所产生的电荷密度波,其振幅在垂直于表面的方向上随着传播深度的增加而成指数衰减,所以这是一种存在于金属与半导体层界面附近的非辐射局域电磁场模式。当自由电子的频率与外电磁场的频率相同时,就会使表面等离激元的共振激发,即表面等离子体共振。这种共振会产生很多特殊的光电学效应,如对可见光的吸收和散射以及金属表面附近电场增强效应等。本实施例中,当背光从衬底基板1的远离遮光层2的一侧入射时,入射的背光会驱动金属原子3表面的传导自由电子集体运动进而使表面电子云偏离原子核。此时,电子云与原子核之间的库伦作用会吸引电子云使之重新向原子核的方向运动。因此,电子会在原子核的附近集体振荡,产生局域表面等离激元。当入射的背光的频率与自由电子的振荡频率一致时,会产生共振使得表面电子的集体振荡大幅增强,通常称之为局域表面等离子体共振。局域表面等离子体共振使金属纳米颗粒产生对入射背光的选择性共振吸收,因此本实施例中的金属原子3能够通过等离子激元效应对入射的产生吸收作用。
图2为未设置金属原子的遮光层和设置了金属原子的遮光层的透过率的对比图,如图2所示,曲线(1)为设置了金属原子3的遮光层2的透过率的曲线,曲线(2)为未设置金属原子3的遮光层2的透过率的曲线,测试时遮光层2的厚度采用设置了金属原子3的遮光层2的透过率小于未设置金属原子3的遮光层2的透过率。尤其是在红光区(波长在610nm至750nm的红光),设置了金属原子3的遮光层2的透过率小于未设置金属原子3的遮光层2的透过率这一效果更加明显。综上,设置了金属原子3后,金属原子3增强了遮光层2对背光的吸收,从而降低了遮光层2的透过率。
本实施例提供的显示基板的技术方案中,显示基板包括衬底基板和位于衬底基板上的金属原子和遮光层,遮光层位于金属原子的远离衬底基板的一侧,金属原子通过等离子激元效应增强了遮光层对背光的吸收,从而提高了薄膜晶体管的稳定性和显示效果。
本发明实施例二提供了一种显示装置,该显示装置包括相对设置的对置基板和显示基板。
优选地,显示基板为阵列基板,例如,LTPS阵列基板;则对置基板为彩膜基板。
本实施例提供的显示装置的技术方案中,显示基板包括衬底基板和位于衬底基板上的金属原子和遮光层,遮光层位于金属原子的远离衬底基板的一侧,金属原子通过等离子激元效应增强了遮光层对背光的吸收,从而提高了薄膜晶体管的稳定性和显示效果。
本发明实施例三提供了一种显示基板的制造方法,该方法包括:在衬底基板上形成金属原子层、遮光层和薄膜晶体管,遮光层位于金属原子层的远离衬底基板的一侧,薄膜晶体管位于遮光层的远离衬底基板的一侧。
本实施例中,薄膜晶体管包括有源层、栅极和源漏极。则在衬底基板上形成金属原子层、遮光层和薄膜晶体管具体包括:
步骤101、在衬底基板上依次形成第一缓冲层和金属原子材料层。。
图3a为实施例三中形成第一缓冲层和金属原子层的示意图,如图3a所示,在衬底基板1之上沉积第一缓冲层4,在第一缓冲层4之上溅镀(Sputter)沉积金属原子层,该金属原子层包括分散设置的金属原子3。优选地,对金属原子3进行溅射沉积工艺中,沉积功率为500W,压强为0.3Pa,氩气流量为100sccm,扫描一次,沉积温度为100℃。本实施例中,沉积工艺采用了较小的功率,使得金属原子3较为分散的分布,不会形成连续的薄膜,从而避免了后续的等离子体增强化学的气相沉积(Plasma Enhanced Chemical Vapor Deposition,简称PECVD)工艺中发生放电。
步骤102、在金属原子层上依次形成遮光材料层、第二缓冲材料层和第一有源材料层。
图3b为实施例三中形成遮光材料层、第二缓冲材料层和第一有源材料层的示意图,如图3b所示,在金属原子层上形成依次沉积遮光材料层21、第二缓冲材料层51和第一有源材料层61。步骤102中的沉积工艺为PECVD工艺,沉积过程在PECVD腔室中进行,由于金属原子3并未形成连续的薄膜,因此金属原子3并不会在PECVD腔室中发生放电的现象。
步骤103、对第一有源材料层进行晶化处理形成第二有源材料层。
图3c为实施例三中形成第二有源材料层的示意图,如图3c所示,对第一有源材料层61进行准分子激光退火(Excimer Laser Annel,简称ELA)处理形成第二有源材料层。优选地,第一有源材料层61的材料为a-Si,第二有源材料层62的材料为p-Si。
步骤104、对遮光材料层、第二缓冲材料层和第二有源材料层进行构图工艺,形成遮光层、第二缓冲层和有源层。
图3d为实施例三中形成遮光层、第二缓冲层和有源层的示意图,如图3d所示,对遮光材料层21、第二缓冲材料层51和第二有源材料层62进行光刻胶涂覆、曝光、显影和刻蚀形成遮光层2、第二缓冲层5、有源层6和光刻胶7。
如图1所示,进而去除光刻胶7,保留遮光层2、第二缓冲层5和有源层6。
步骤105、在有源层上形成源漏极,源漏极和有源层连接。
步骤106、在源漏极的上方形成栅极。
本实施例提供的显示基板的制造方法的技术方案中,显示基板包括衬底基板和位于衬底基板上的金属原子和遮光层,遮光层位于金属原子的远离衬底基板的一侧,金属原子通过等离子激元效应增强了遮光层对背光的吸收,从而提高了薄膜晶体管的稳定性和显示效果。
可以理解的是,以上实施方式仅仅是为了说明本发明的原理而采用的示例性实施方式,然而本发明并不局限于此。对于本领域内的普通技术人员而言,在不脱离本发明的精神和实质的情况下,可以做出各种变型和改进,这些变型和改进也视为本发明的保护范围。
Claims (10)
1.一种显示基板,其特征在于,包括衬底基板和位于所述衬底基板上的金属原子层、遮光层和薄膜晶体管,所述遮光层位于所述金属原子层的远离所述衬底基板的一侧,所述薄膜晶体管位于所述遮光层的远离所述衬底基板的一侧。
2.根据权利要求1所述的显示基板,其特征在于,所述金属原子层包括分散设置的金属原子。
3.根据权利要求1或2所述的显示基板,其特征在于,所述金属原子的材料包括Au、Ag、Cu、Pt或者Al。
4.根据权利要求3所述的显示基板,其特征在于,所述金属原子的材料为Cu。
5.根据权利要求1所述的显示基板,其特征在于,所述遮光层的材料为半导体材料。
6.根据权利要求1所述的显示基板,其特征在于,所述遮光层的厚度为至
7.一种显示装置,其特征在于,包括相对设置的对置基板和权利要求1至6任一所述的显示基板。
8.一种显示基板的制造方法,其特征在于,包括:
在衬底基板上形成金属原子层、遮光层和薄膜晶体管,所述遮光层位于所述金属原子层的远离所述衬底基板的一侧,所述薄膜晶体管位于所述遮光层的远离所述衬底基板的一侧。
9.根据权利要求8所述的显示基板的制造方法,其特征在于,所述薄膜晶体管包括有源层、栅极和源漏极;
所述在衬底基板上形成金属原子层、遮光层和薄膜晶体管包括:
在衬底基板上依次形成第一缓冲层和金属原子层。
在金属原子层之上依次形成遮光材料层、第二缓冲材料层和第一有源材料层;
对所述第一有源材料层进行晶化处理形成第二有源材料层;
对遮光材料层、第二缓冲层和第二有源材料层进行构图工艺,形成金属原子层、遮光层和有源层;
在有源层上形成源漏极,所述源漏极和有源层连接;
在所述源漏极的上方形成栅极。
10.根据权利要求8所述的显示基板的制造方法,其特征在于,所述金属原子层包括分散设置的金属原子。
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CN109378298A (zh) * | 2018-10-10 | 2019-02-22 | 京东方科技集团股份有限公司 | 显示背板及其制作方法和显示装置 |
CN110416274A (zh) * | 2019-08-02 | 2019-11-05 | 京东方科技集团股份有限公司 | 一种基板及其制备方法和oled显示面板 |
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CN111625149B (zh) * | 2020-06-03 | 2024-04-16 | 上海天马微电子有限公司 | 一种导电屏蔽模组及其制作方法和显示装置 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH09258200A (ja) * | 1996-03-27 | 1997-10-03 | Toshiba Corp | 液晶表示装置、およびその製造方法 |
CN1570683A (zh) * | 2003-04-18 | 2005-01-26 | 富士胶片株式会社 | 显示装置用遮光膜 |
KR20170080887A (ko) * | 2015-12-30 | 2017-07-11 | 엘지디스플레이 주식회사 | 표시장치 및 표시장치의 제조방법 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08271880A (ja) * | 1995-04-03 | 1996-10-18 | Toshiba Corp | 遮光膜,液晶表示装置および遮光膜形成用材料 |
US6330047B1 (en) * | 1997-07-28 | 2001-12-11 | Sharp Kabushiki Kaisha | Liquid crystal display device and method for fabricating the same |
US6195140B1 (en) * | 1997-07-28 | 2001-02-27 | Sharp Kabushiki Kaisha | Liquid crystal display in which at least one pixel includes both a transmissive region and a reflective region |
JP4220796B2 (ja) * | 2003-02-04 | 2009-02-04 | 富士フイルム株式会社 | ブラックマトリックス作製用組成物及び感光性転写材料、ブラックマトリックス及びその製造方法、カラーフィルター、液晶表示素子並びにブラックマトリックス基板 |
KR101030720B1 (ko) * | 2003-04-18 | 2011-04-26 | 후지필름 가부시키가이샤 | 표시장치용 차광막, 그 제조방법 및 이것을 형성하기 위한 조성물 |
EP1793266B1 (en) * | 2005-12-05 | 2017-03-08 | Semiconductor Energy Laboratory Co., Ltd. | Transflective Liquid Crystal Display with a Horizontal Electric Field Configuration |
KR101983691B1 (ko) * | 2012-08-17 | 2019-05-30 | 삼성디스플레이 주식회사 | 차광 부재 및 이를 포함하는 표시 장치 |
US9612492B2 (en) * | 2013-11-26 | 2017-04-04 | Apple Inc. | Border masking structures for liquid crystal display |
JP6323055B2 (ja) * | 2014-02-21 | 2018-05-16 | 凸版印刷株式会社 | 薄膜トランジスタアレイおよびその製造方法 |
CN105259683B (zh) * | 2015-11-20 | 2018-03-30 | 深圳市华星光电技术有限公司 | Coa型阵列基板的制备方法及coa型阵列基板 |
-
2017
- 2017-08-08 CN CN201710686624.7A patent/CN107452758B/zh not_active Expired - Fee Related
-
2018
- 2018-07-11 US US16/032,568 patent/US10566350B2/en not_active Expired - Fee Related
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH09258200A (ja) * | 1996-03-27 | 1997-10-03 | Toshiba Corp | 液晶表示装置、およびその製造方法 |
CN1570683A (zh) * | 2003-04-18 | 2005-01-26 | 富士胶片株式会社 | 显示装置用遮光膜 |
KR20170080887A (ko) * | 2015-12-30 | 2017-07-11 | 엘지디스플레이 주식회사 | 표시장치 및 표시장치의 제조방법 |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109378298A (zh) * | 2018-10-10 | 2019-02-22 | 京东方科技集团股份有限公司 | 显示背板及其制作方法和显示装置 |
US10923505B2 (en) | 2018-10-10 | 2021-02-16 | Boe Technology Group Co., Ltd. | Method for fabricating a display substrate by generating heat with a light shielding layer for crystallization of a semiconductor layer |
CN109378298B (zh) * | 2018-10-10 | 2022-04-29 | 京东方科技集团股份有限公司 | 显示背板及其制作方法和显示装置 |
CN110416274A (zh) * | 2019-08-02 | 2019-11-05 | 京东方科技集团股份有限公司 | 一种基板及其制备方法和oled显示面板 |
CN110416274B (zh) * | 2019-08-02 | 2023-04-07 | 京东方科技集团股份有限公司 | 一种基板及其制备方法和oled显示面板 |
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