CN107452700B - 导电图案及集成扇出型封装件 - Google Patents

导电图案及集成扇出型封装件 Download PDF

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CN107452700B
CN107452700B CN201710075202.6A CN201710075202A CN107452700B CN 107452700 B CN107452700 B CN 107452700B CN 201710075202 A CN201710075202 A CN 201710075202A CN 107452700 B CN107452700 B CN 107452700B
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edges
pair
parallel
conductive
pad
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CN107452700A (zh
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邱铭彦
张兢夫
邱建嘉
黄信杰
林宗澍
余佩弟
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Abstract

一种导电图案，其包括：导电垫，包括圆形垫部及连接至圆形垫部的第一收敛部，第一收敛部具有一对不平行的第一边缘，不平行的第一边缘界定第一锥度角，且不平行的第一边缘由圆形垫部的一对不平行的第一切线界定；以及缓冲延伸部，连接至导电垫的第一收敛部，缓冲延伸部至少包括具有一对不平行的第二边缘的第二收敛部，不平行的第二边缘界定第二锥度角，第一锥度角大于或等于第二锥度角。

Description

导电图案及集成扇出型封装件
技术领域
本发明的实施例涉及一种导电图案及集成扇出型封装件。
背景技术
由于各种电子组件(即，晶体管、二极管、电阻器、电容器等)的集成密度的持续提高，半导体行业已经历快速增长。在很大程度上，集成密度的此种提高来自于最小特征大小的重复减小，此使得更多较小的组件能够集成到给定区域中。这些较小的电子组件也需要与先前的封装件相比利用较小区域的较小的封装件。半导体组件的某些较小类型的封装件包括方形扁平封装件(quadflatpackage，QFP)、引脚栅阵列(pingridarray，PGA)封装件、球栅阵列(ballgridarray，BGA)封装件等等。
当前，集成扇出型封装件因其紧凑性而正变得日渐流行。在集成扇出型封装件中，以模塑化合物(moldingcompound)制作的重布线路结构的可靠性得到高度关注。
发明内容
本发明的实施例提供一种导电图案，其包括：导电垫，包括圆形垫部及连接至圆形垫部的第一收敛部，第一收敛部具有一对不平行的第一边缘，不平行的第一边缘界定第一锥度角，且不平行的第一边缘由圆形垫部的一对不平行的第一切线界定；以及缓冲延伸部，连接至导电垫的第一收敛部，缓冲延伸部至少包括具有一对不平行的第二边缘的第二收敛部，不平行的第二边缘界定第二锥度角，第一锥度角大于或等于第二锥度角。
附图说明
结合附图阅读以下详细说明，会最好地理解本发明的各个方面。应注意，根据本行业中的标准惯例，各种特征并非按比例绘制。事实上，为论述清晰起见，可任意增大或减小各种特征的尺寸。
图1至图13说明制作根据某些实施例的集成扇出型封装件的工艺流程。
图14是说明根据某些实施例的叠层封装(package-on-package，POP)结构的剖视图。
[符号的说明]
100：晶片
100’：薄化晶片
110、110’、110a：半导体衬底
120：导电垫
130、130a：钝化层
132、142：接触开口
140、140a：后钝化层
150：导电柱
160、160a、160a’：保护层
200：集成电路
210：绝缘材料
210’：绝缘包封体
220：重布线路结构
222：内层介电层
224：重布线导电层
230：垫
230a：球下金属图案
230b：连接垫
240、260：导电球
250：无源组件
300：封装件
BE：缓冲延伸部
C：载板
C1：第一收敛部
CP1：第一导电垫
CP2：第二导电垫
CV：弯折部
DB：剥离层
DI：介电层
DR：延伸方向
E1：第一边缘
E2：第二边缘
O：接触开口
P：导电图案
P1：圆形垫部
P2：第二收敛部
RL：布线
TE：过渡边缘
TL1：第一切线
TV：导电通孔
W：线宽度
θ1：第一锥度角
θ2：第二锥度角
θ3：夹角
具体实施方式
以下公开内容提供用于实作所提供主题的不同特征的许多不同的实施例或实例。以下阐述组件及排列的具体实例以简化本发明。当然，这些仅为实例且不旨在进行限制。例如，以下说明中将第一特征形成在第二特征之上或第二特征上可包括其中第一特征及第二特征被形成为直接接触的实施例，且也可包括其中第一特征与第二特征之间可形成有附加特征、进而使得第一特征与第二特征可能不直接接触的实施例。另外，本公开内容可能在各种实例中重复参考编号及/或字母。这种重复是出于简洁及清晰的目的，而不是自身表示所论述的各种实施例及/或配置之间的关系。
此外，为易于说明，本文中可能使用例如“之下(beneath)”、“下面(below)”、“下部的(lower)”、“上方(above)”、“上部的(upper)”等空间相对性用语来阐述图中所示的一个元件或特征与另一(其他)元件或特征的关系。空间相对性用语旨在除图中所绘示的取向外还囊括装置在使用或操作中的不同取向。设备可具有其他取向(旋转90度或处于其他取向)且本文中所用的空间相对性描述语可同样相应地进行解释。
图1至图13说明制作根据某些实施例的集成扇出型封装件的工艺流程，且图14是说明根据某些实施例的叠层封装(POP)结构的剖视图。
参照图1，提供包括排列成阵列的多个管芯(die)或集成电路200的晶片100。在对晶片100进行晶片切割(waferdicing)工艺之前，晶片100中的集成电路200是彼此连接的。在某些实施例中，晶片100包括半导体衬底110、形成在半导体衬底110上的多个导电垫120及钝化层130。钝化层130形成在半导体衬底110之上且具有多个接触开口132，进而使得导电垫120被钝化层130的接触开口132局部地暴露出。例如，半导体衬底110可为硅衬底，硅衬底包括形成在硅衬底中的有源组件(例如，晶体管等)及无源组件(例如，电阻器、电容器、电感器等)；导电垫120可为铝垫、铜垫或其他适合的金属垫；且钝化层130可为氧化硅层、氮化硅层、氮氧化硅层或由其他适合的介电材料形成的介电层。
如图1中所示，在某些实施例中，晶片100可视情况包括形成在钝化层130之上的后钝化(post-passivation)层140。后钝化层140覆盖钝化层130且具有多个接触开口142。被钝化层130的接触开口132所暴露出的导电垫120会被后钝化层140的接触开口142局部地暴露出。后钝化层140可为聚酰亚胺(polyimide，PI)层、聚苯并恶唑(polybenzoxazole，PBO)层或由其他适合的聚合物形成的介电层。
参照图2，在导电垫120上形成多个导电柱150。在某些实施例中，导电柱150镀覆(plate)在导电垫120上。以下详细阐述导电柱150的镀覆工艺。首先，将晶种层溅射至后钝化层140及被接触开口142所暴露出的导电垫120上。接着，通过光刻(photolithography)在晶种层之上形成图案化光刻胶(photoresist)层(图中未示出)，其中图案化光刻胶层暴露出晶种层与导电垫120对应的部分。接着，将有图案化光刻胶层形成在其上的晶片100浸入至镀覆浴(platingbath)的镀覆溶液中，进而使得导电柱150镀覆在晶种层与导电垫120对应的部分上。在镀覆形成导电柱150之后，剥除图案化光刻胶层。此后，利用导电柱150作为硬掩模，例如通过刻蚀(etching)移除晶种层未被导电柱150所覆盖的部分直至暴露出后钝化层140为止。
在某些实施例中，导电柱150为镀覆铜柱(platedcopperpillars)。
参照图3，在形成导电柱150之后，在后钝化层140上形成保护层160，以覆盖导电柱150。在某些实施例中，保护层160可为具有足以包覆及保护导电柱150的厚度的聚合物层。例如，保护层160可为聚苯并恶唑(PBO)层、聚酰亚胺(PI)层或其他适合的聚合物。在某些替代实施例中，保护层160可由无机材料制成。
参照图4，在形成保护层160之后，对晶片100的后表面进行背侧研磨(backsidegrinding)工艺。在背侧研磨工艺期间，研磨半导体衬底110，进而形成包括薄化半导体衬底110’的薄化晶片100’。
参照图5，在进行背侧研磨工艺之后，对薄化晶片100’进行晶片切割工艺，使得薄化晶片100’中的集成电路200彼此单体化。经单体化的各个集成电路200包括半导体衬底110a、形成在半导体衬底110a上的导电垫120、钝化层130a、后钝化层140a、导电柱150及保护层160a。如图4及图5中所示，半导体衬底110a、钝化层130a、后钝化层140a及保护层160a的材料及特性与前述的半导体衬底110、钝化层130、后钝化层140及保护层160的材料及特性相同。因此，省略了对半导体衬底110a、钝化层130a、后钝化层140a及保护层160a的详细说明。
如图4及图5中所示，在背侧研磨工艺及晶片切割工艺期间，保护层160及160a可完善地保护集成电路200的导电柱150。另外，保护层160及160a可保护集成电路200的导电柱150不被集成电路200的拾取及放置(pick-upandplacing)工艺、模塑(molding)工艺等後续进行的工艺所损坏。
参照图6，在集成电路200从薄化晶片100’(在图4中示出)被单体化之后，提供已形成有剥离(de-bonding)层DB及介电层DI於其上的载板C，其中剥离层DB位于载板C与介电层DI之间。在某些实施例中，例如，载板C是玻璃衬底，剥离层DB是形成在玻璃衬底上的光-热转换(light-to-heat conversion，LTHC)释放层，且介电层DI是形成在剥离层DB上的聚苯并恶唑(PBO)层。
在提供已形成有剥离层DB及介电层DI於其上的载板C之后，在介电层DI上形成多个导电通孔TV。在某些实施例中，导电通孔TV是通过光刻胶涂布(photoresistcoating)、光刻、镀覆及光刻胶剥除(photoresist stripping)工艺所形成。例如，导电通孔TV包括铜柱(copperpost)或其他适合的金属柱。
如图6中所示，在某些实施例中，可将包括导电垫120、导电柱150、以及形成在其上的保护层160a的其中一个集成电路200拾取且放置在介电层DI上。将集成电路200通过管芯贴合膜(dieattachfilm，DAF)、粘合膏(adhesionpaste)等贴合或粘合在介电层DI上。在某些替代实施例中，可将多于一个集成电路200拾取且放置在介电层DI上，其中放置在介电层DI上的集成电路200可排列成阵列。当放置在介电层DI上的集成电路200排列成阵列时，可将导电通孔TV分成多个群组。集成电路200的数目可对应于导电通孔TV的群组的数目。
如图6中所示，保护层160a的顶表面可低于导电通孔TV的顶表面，且保护层160a的顶表面可高于导电柱150的顶表面。然而，本发明并不仅限于此。在某些替代实施例中，保护层160a的顶表面可与导电通孔TV的顶表面实质上对齐，且保护层160a的顶表面可高于导电柱150的顶表面。
如图6中所示，可在形成导电通孔TV之后才将集成电路200拾取且放置在介电层DI上。然而，本发明并不仅限于此。在某些替代实施例中，可在形成导电通孔TV之前便将集成电路200拾取且放置在介电层DI上。
参照图7，在介电层DI上形成绝缘材料210以覆盖集成电路200及导电通孔TV。在某些实施例中，绝缘材料210是通过模塑工艺所形成的模塑化合物。集成电路200的导电柱150及保护层160a被绝缘材料210覆盖。换句话说，集成电路200的导电柱150及保护层160a未被绝缘材料210显露出且被绝缘材料210完善地保护。在某些实施例中，绝缘材料210包括环氧树脂(epoxy)或其他适合的介电材料。
参照图8，接着研磨绝缘材料210直至暴露出导电柱150的顶表面、导电通孔TV的顶表面及保护层160a的顶表面为止。在某些实施例中，通过机械研磨工艺及/或化学机械抛光(chemicalmechanicalpolishing，CMP)工艺来研磨绝缘材料210。在研磨绝缘材料210之后，在介电层DI上形成绝缘包封体210’。在绝缘材料210的研磨工艺期间，保护层160a的部分会被研磨以形成保护层160a’。在某些实施例中，在绝缘材料210及保护层160a的研磨工艺期间，导电通孔TV的部分及导电柱150的部分也会被研磨。
如图8中所示，绝缘包封体210’包覆集成电路200的侧壁，且绝缘包封体210’被导电通孔TV穿透。换句话说，集成电路200及导电通孔TV嵌于绝缘包封体210’中。应注意，导电通孔TV的顶表面、绝缘包封体210’的顶表面及导电柱150的顶表面与保护层160a’的顶表面实质上共平面。
参照图9，在形成绝缘包封体210’及保护层160a’之后，在导电通孔TV的顶表面、绝缘包封体210’的顶表面、导电柱150的顶表面及保护层160a’的顶表面上形成与集成电路200的导电柱150电连接的重布线路结构220。所形成的重布线路结构220与位于其下的一个或多个连接件电连接。此处，前述连接件可为集成电路200的导电柱150及/或嵌于绝缘包封体210’中的导电通孔TV。结合图9详细阐述重布线路结构220。
参照图9，重布线路结构220包括交替堆叠的多个内层介电层(inter-dielectriclayer)222及多个重布线导电层224，且重布线导电层224电连接至集成电路200的导电柱150及嵌于绝缘包封体210’中的导电通孔TV。在某些实施例中，导电柱150的顶表面及导电通孔TV的顶表面与重布线路结构220接触。导电柱150的顶表面及导电通孔TV的顶表面被最底层的内层介电层222局部地覆盖。此外，最顶层的重布线导电层224包括多个导电图案P(会是於图10A与图10B)。
如图10中所示，在形成重布线路结构220之后，接着在重布线路结构220的最顶层的重布线导电层224上形成多个垫230。垫230包括用于球安装(ballmount)的多个球下金属(under-ballmetallurgy，UBM)图案230a及用于安装无源组件的多个连接垫230b。垫230电连接至重布线路结构220的最顶层的重布线导电层224。换句话说，垫230通过重布线路结构220电连接至集成电路200的导电柱150及导电通孔TV。应注意，球下金属图案230a及连接垫230b的数目在本发明中并无限制。
参照图10、图10A及图10B，在某一实施例中，球下金属图案230a下方可配置导电图案P，并且使导电图案P能够电连接至球下金属图案230a。各个导电图案P可包括第一导电垫CP1及连接至第一导电垫CP1的缓冲延伸部BE。第一导电垫CP1包括圆形垫部P1及连接至圆形垫部P1的第一收敛部C1。第一收敛部C1具有一对不平行的第一边缘E1，不平行的第一边缘E1界定第一锥度角θ1，且不平行的第一边缘E1是通过圆形垫部P1的一对不平行的第一切线TL1界定。缓冲延伸部BE连接至第一导电垫CP1的第一收敛部C1。缓冲延伸部BE至少包括具有一对不平行的第二边缘E2的第二收敛部P2，不平行的第二边缘E2界定第二锥度角θ2。如图10A及图10B中所示，圆形垫部P1例如位于球下金属图案230a下方且电连接至球下金属图案230a。
在某些实施例中，第一锥度角θ1大于第二锥度角θ2，且第一锥度角θ1与第二锥度角θ2之差为约10度至约30度。在某些替代实施例中，第一锥度角θ1实质上等于第二锥度角θ2。
缓冲延伸部BE可进一步包括位于不平行的第一边缘E1与不平行的第二边缘E2之间的一对过渡边缘TE。如图10A中所示，过渡边缘TE实质上为线性边缘，且线性边缘相互平行。当过渡边缘TE实质上为线性边缘时，缓冲延伸部BE沿延伸方向DR延伸，且缓冲延伸部BE的最大宽度实质上等于不平行的第一边缘E1之间的最小距离或不平行的第二边缘E2之间的最大距离。此外，由缓冲延伸部BE的过渡边缘TE与第二边缘E2界定的夹角θ3可例如介于约120度至约175度范围内。
在某些替代实施例中，如图10B中所示，过渡边缘TE可为弯曲边缘。当过渡边缘TE为弯曲边缘时，缓冲延伸部BE沿延伸方向DR延伸，且缓冲延伸部BE的最小宽度实质上等于不平行的第一边缘E1之间的最小距离或不平行的第二边缘E2之间的最大距离。
在某些其他实施例中，可省略缓冲延伸部BE的过渡边缘TE。
在某些实施例中，导电图案P可进一步包括经由缓冲延伸部BE连接至第一导电垫CP1的布线RL。如图10A及图10B中所示，布线RL连接至缓冲延伸部BE的第二收敛部P2。缓冲延伸部BE位于布线RL与第一导电垫CP1之间，且布线RL具有实质上恒定的线宽度(linewidth)。缓冲延伸部BE可充当第一导电垫CP1与布线RL之间的过渡结构，以使应力最小化。
在某些实施例中，不平行的第一边缘E1之间的最小距离对不平行的第二边缘E2之间的最小距离(即，布线RL的线宽度W)的比率可介于约1.1至约4范围内。
在某些实施例中，布线RL具有实质上恒定的线宽度W，且布线RL具有至少一个弯折部CV。布线RL的线宽度W可介于约1微米至约25微米范围内。如图10A中所示，为说明起见，仅绘示出布线RL的两个弯折部CV。然而，本发明并不仅限于此。在某些实施例中，弯折部CP(右侧的一个)与缓冲延伸部BE和布线RL的连接点之间的距离可介于约10微米至约20微米范围内。
如图10A及图10B中所示，在某些实施例中，导电图案P可进一步包括第二导电垫CP2。第二导电垫CP2通过布线RL及缓冲延伸部BE连接至第一导电垫CP1。第二导电垫CP2电连接至位於其下方的重布线导电层224。在某些实施例中，第一导电垫CP1的面积大于第二导电垫CP2的面积。在某些替代实施例中，第一导电垫CP1的面积实质上等于第二导电垫CP2的面积。
参照图11，在形成球下金属图案230a及连接垫230b之后，在球下金属图案230a上放置多个导电球240，且在连接垫230b上安装多个无源组件250。在某些实施例中，可通过植球(ballplacement)工艺在球下金属图案230a上放置导电球240，且可通过焊接(soldering)或回焊(reflow)工艺在连接垫230b上安装无源组件250。在某些实施例中，例如，导电球240的高度大于无源组件250的高度。
参照图11及图12，在垫230上安装导电球240及无源组件250之后，从剥离层DB剥离在绝缘包封体210’的底表面上形成的介电层DI，进而使得介电层DI从载板C上分离。在某些实施例中，可通过UV激光照射剥离层DB(例如，光-热转换释放层)，进而使得介电层DI从载板C脱落(peel)。
如图12中所示，接着将介电层DI图案化，进而形成多个接触开口O以暴露出导电通孔TV的底表面。接触开口O的数目及位置对应于导电通孔TV的数目。在某些实施例中，通过激光钻孔(laserdrilling)工艺或其他适合的图案化工艺形成介电层DI的接触开口O。
参照图13，在介电层DI中形成接触开口O之后，在导电通孔TV的被接触开口O暴露出的底表面上放置多个导电球260。对导电球260进行回焊以使导电球260与导电通孔TV的底表面接合。如图13中所示，在形成导电球240及导电球260之后，具有双侧端子设计(即，导电球240及260)的集成电路200的集成扇出型封装件制作完成。
参照图14，接着设置另一封装件300。在某些实施例中，封装件300例如为存储器装置或其他适合的半导体装置。通过导电球260将封装件300堆叠在图12中所示的集成扇出型封装件之上并电连接至集成扇出型封装件，进而完成叠层封装(POP)结构的制作。
在上述实施例中，连接部P4可充当过渡部以使第一导电垫P1与布线P3之间的应力最小化。因此，可增强导电图案P的可靠性。
根据本发明的某些实施例，提供一种导电图案，所述导电图案包括：导电垫，包括圆形垫部及连接至所述圆形垫部的第一收敛部，所述第一收敛部具有一对不平行的第一边缘，所述一对不平行的第一边缘界定第一锥度角，且所述一对不平行的第一边缘由所述圆形垫部的一对不平行的第一切线界定；以及缓冲延伸部，连接至所述导电垫的所述第一收敛部，所述缓冲延伸部至少包括具有一对不平行的第二边缘的第二收敛部，所述一对不平行的第二边缘界定第二锥度角，所述第一锥度角大于或等于所述第二锥度角。
所述的导电图案进一步包括连接至所述第二收敛部的布线，其中所述缓冲延伸部位于所述布线与所述导电垫之间，且所述布线具有恒定的线宽度。
在所述的导电图案中，所述布线具有至少一个弯折部。
在所述的导电图案中，所述缓冲延伸部进一步包括位于所述一对不平行的第一边缘与所述一对不平行的第二边缘之间的一对过渡边缘。
在所述的导电图案中，所述过渡边缘是线性边缘且所述线性边缘相互平行。
在所述的导电图案中，所述缓冲延伸部沿延伸方向延伸，所述缓冲延伸部的最大宽度等于所述一对不平行的第一边缘之间的最小距离或所述一对不平行的第二边缘之间的最大距离。
在所述的导电图案中，所述过渡边缘是弯曲边缘。
在所述的导电图案中，所述缓冲延伸部沿延伸方向延伸，所述缓冲延伸部的最小宽度等于所述一对不平行的第一边缘之间的最小距离或所述一对不平行的第二边缘之间的最大距离。
根据本发明的替代实施例，提供另一种导电图案，所述导电图案包括：第一导电垫，包括圆形垫部及连接至所述圆形垫部的第一收敛部，所述第一收敛部具有一对不平行的第一边缘，所述一对不平行的第一边缘界定第一锥度角，且所述一对不平行的第一边缘由所述圆形垫部的一对不平行的第一切线界定；缓冲延伸部，连接至所述第一导电垫的所述第一收敛部，所述缓冲延伸部至少包括具有一对不平行的第二边缘的第二收敛部，所述一对不平行的第二边缘界定第二锥度角，所述第一锥度角大于或等于所述第二锥度角；布线，经由所述缓冲延伸部连接至所述第一导电垫，所述布线连接至所述第二收敛部；以及第二导电垫，经由所述布线及所述缓冲延伸部连接至所述第一导电垫。
在所述的导电图案中，所述布线具有恒定的线宽度。
在所述的导电图案中，所述布线具有至少一个弯折部。
在所述的导电图案中，所述第一导电垫的面积大于或等于所述第二导电垫的面积。
在所述的导电图案中，所述缓冲延伸部进一步包括位于所述一对不平行的第一边缘与所述一对不平行的第二边缘之间的一对过渡边缘。
在所述的导电图案中，所述过渡边缘是线性边缘且所述线性边缘相互平行。
在所述的导电图案中，所述缓冲延伸部沿延伸方向延伸，所述缓冲延伸部的最大宽度等于所述一对不平行的第一边缘之间的最小距离或所述一对不平行的第二边缘之间的最大距离。
在所述的导电图案中，所述过渡边缘是弯曲边缘。
在所述的导电图案中，所述缓冲延伸部沿延伸方向延伸，所述缓冲延伸部的最小宽度等于所述一对不平行的第一边缘之间的最小距离或所述一对不平行的第二边缘之间的最大距离。
根据本发明的又一些替代实施例，提供一种集成扇出型封装件，所述集成扇出型封装件包括：集成电路；绝缘包封体，包覆所述集成电路；重布线路结构，位于所述绝缘包封体及所述集成电路上，所述重布线路结构包括多个内层介电层及多个重布线导电层，所述内层介电层与所述重布线导电层交替堆叠，其中所述最顶层的重布线导电层包括至少一个导电图案，且所述至少一个导电图案包括：导电垫，包括圆形垫部及连接至所述圆形垫部的第一收敛部，所述第一收敛部具有一对不平行的第一边缘，所述一对不平行的第一边缘界定第一锥度角，且所述一对不平行的第一边缘由所述圆形垫部的一对不平行的第一切线界定；以及缓冲延伸部，连接至所述导电垫的所述第一收敛部，所述缓冲延伸部至少包括具有一对不平行的第二边缘的第二收敛部，所述一对不平行的第二边缘界定第二锥度角，所述第一锥度角大于或等于所述第二锥度角。
在所述集成扇出型封装件中，所述缓冲延伸部进一步包括位于所述一对不平行的第一边缘与所述一对不平行的第二边缘之间的一对过渡边缘，所述过渡边缘是线性边缘，且所述线性边缘相互平行。
在所述集成扇出型封装件中，所述缓冲延伸部进一步包括位于所述一对不平行的第一边缘与所述一对不平行的第二边缘之间的一对过渡边缘，且所述过渡边缘是弯曲边缘。
以上概述了若干实施例的特征，以使所属领域中的技术人员可更好地理解本发明的各个方面。所属领域中的技术人员应知，他们可容易地使用本发明作为设计或修改其他工艺及结构的基础来实施与本文中所介绍的实施例相同的目的及/或实现与本文中所介绍的实施例相同的优点。所属领域中的技术人员还应认识到，这些等效构造并不背离本发明的精神及范围，而且他们可在不背离本发明的精神及范围的条件下对其作出各种改变、代替及变更。

Claims (17)

1.一种导电图案，其特征在于，包括：
导电垫，包括圆形垫部及连接至所述圆形垫部的第一收敛部，所述第一收敛部具有一对不平行的第一边缘，所述一对不平行的第一边缘界定第一锥度角，且所述一对不平行的第一边缘由所述圆形垫部的一对不平行的第一切线界定；以及
缓冲延伸部，连接至所述导电垫的所述第一收敛部，所述缓冲延伸部包括具有一对不平行的第二边缘以及位于所述一对不平行的第一边缘与所述一对不平行的第二边缘之间的一对过渡边缘的第二收敛部，其中所述一对不平行的第二边缘界定第二锥度角，且所述第一锥度角大于或等于所述第二锥度角，所述过渡边缘是弯曲边缘，且所述弯曲边缘是所述缓冲延伸部的凹状边缘。
2.根据权利要求1所述的导电图案，其特征在于，进一步包括连接至所述第二收敛部的布线，其中所述缓冲延伸部位于所述布线与所述导电垫之间，且所述布线具有恒定的线宽度。
3.根据权利要求2所述的导电图案，其特征在于，所述布线具有至少一个弯折部。
4.根据权利要求1所述的导电图案，其特征在于，所述缓冲延伸部沿延伸方向延伸，所述缓冲延伸部的最小宽度等于所述一对不平行的第一边缘之间的最小距离或所述一对不平行的第二边缘之间的最大距离。
5.一种导电图案，其特征在于，包括：
第一导电垫，包括圆形垫部及连接至所述圆形垫部的第一收敛部，所述第一收敛部具有一对不平行的第一边缘，所述一对不平行的第一边缘界定第一锥度角，且所述一对不平行的第一边缘由所述圆形垫部的一对不平行的切线界定；
缓冲延伸部，连接至所述第一导电垫的所述第一收敛部，所述缓冲延伸部至少包括具有一对不平行的第二边缘的第二收敛部，所述一对不平行的第二边缘界定第二锥度角，所述第一锥度角大于或等于所述第二锥度角；
布线，经由所述缓冲延伸部连接至所述第一导电垫，所述布线连接至所述第二收敛部；以及
第二导电垫，经由所述布线及所述缓冲延伸部连接至所述第一导电垫，
其中所述第一导电垫与所述第二导电垫之间的最小距离小于沿着所述缓冲延伸部及所述布线从所述第一导电垫至所述第二导电垫的路径长度。
6.根据权利要求5所述的导电图案，其特征在于，所述布线具有恒定的线宽度。
7.根据权利要求5所述的导电图案，其特征在于，所述布线具有至少一个弯折部。
8.根据权利要求5所述的导电图案，其特征在于，所述第一导电垫的面积大于或等于所述第二导电垫的面积。
9.根据权利要求5所述的导电图案，其特征在于，所述缓冲延伸部进一步包括位于所述一对不平行的第一边缘与所述一对不平行的第二边缘之间的一对过渡边缘。
10.根据权利要求9所述的导电图案，其特征在于，所述过渡边缘是线性边缘且所述线性边缘相互平行。
11.根据权利要求10所述的导电图案，其特征在于，所述缓冲延伸部沿延伸方向延伸，所述缓冲延伸部的最大宽度等于所述一对不平行的第一边缘之间的最小距离或所述一对不平行的第二边缘之间的最大距离。
12.根据权利要求9所述的导电图案，其特征在于，所述过渡边缘是弯曲边缘。
13.根据权利要求12所述的导电图案，其特征在于，所述缓冲延伸部沿延伸方向延伸，所述缓冲延伸部的最小宽度等于所述一对不平行的第一边缘之间的最小距离或所述一对不平行的第二边缘之间的最大距离。
14.一种集成扇出型封装件，其特征在于，包括：
集成电路；
绝缘包封体，包覆所述集成电路；
重布线路结构，位于所述绝缘包封体及所述集成电路上，所述重布线路结构包括多个内层介电层及多个重布线导电层，所述内层介电层与所述重布线导电层交替堆叠，其中最顶层的重布线导电层包括至少一个导电图案，且所述至少一个导电图案包括：
导电垫，包括圆形垫部及连接至所述圆形垫部的第一收敛部，所述第一收敛部具有一对不平行的第一边缘，所述一对不平行的第一边缘界定第一锥度角，且所述一对不平行的第一边缘由所述圆形垫部的一对不平行的切线界定；以及
缓冲延伸部，连接至所述导电垫的所述第一收敛部，所述缓冲延伸部包括具有一对不平行的第二边缘以及位于所述一对不平行的第一边缘与所述一对不平行的第二边缘之间的一对过渡边缘的第二收敛部，所述一对不平行的第二边缘界定第二锥度角，且所述第一锥度角大于或等于所述第二锥度角，其中所述过渡边缘是弯曲边缘，且所述弯曲边缘是所述缓冲延伸部的凹状边缘。
15.根据权利要求14所述的集成扇出型封装件，其特征在于，所述至少一个导电图案包括进一步包括连接至所述第二收敛部的布线，其中所述缓冲延伸部位于所述布线与所述导电垫之间，且所述布线具有恒定的线宽度。
16.根据权利要求15所述的集成扇出型封装件，其特征在于，所述布线具有至少一个弯折部。
17.根据权利要求14所述的集成扇出型封装件，其特征在于，所述缓冲延伸部沿延伸方向延伸，所述缓冲延伸部的最小宽度等于所述一对不平行的第一边缘之间的最小距离或所述一对不平行的第二边缘之间的最大距离。
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