CN107393883A - 埋入预制天线低损耗部件的封装结构 - Google Patents

埋入预制天线低损耗部件的封装结构 Download PDF

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CN107393883A
CN107393883A CN201710515857.0A CN201710515857A CN107393883A CN 107393883 A CN107393883 A CN 107393883A CN 201710515857 A CN201710515857 A CN 201710515857A CN 107393883 A CN107393883 A CN 107393883A
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low loss
loss component
substrate
encapsulating structure
antenna
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林耀剑
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JCET Group Co Ltd
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Jiangsu Changjiang Electronics Technology Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/66—High-frequency adaptations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01Q—ANTENNAS, i.e. RADIO AERIALS
    • H01Q1/00—Details of, or arrangements associated with, antennas
    • H01Q1/12—Supports; Mounting means
    • H01Q1/22—Supports; Mounting means by structural association with other equipment or articles
    • H01Q1/2283—Supports; Mounting means by structural association with other equipment or articles mounted in or on the surface of a semiconductor substrate as a chip-type antenna or integrated with other components into an IC package
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01Q—ANTENNAS, i.e. RADIO AERIALS
    • H01Q1/00—Details of, or arrangements associated with, antennas
    • H01Q1/52—Means for reducing coupling between antennas; Means for reducing coupling between an antenna and another structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
    • H01L2223/64—Impedance arrangements
    • H01L2223/66—High-frequency adaptations
    • H01L2223/6661—High-frequency adaptations for passive devices
    • H01L2223/6677—High-frequency adaptations for passive devices for antenna, e.g. antenna included within housing of semiconductor device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/12105—Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Details Of Aerials (AREA)

Abstract

本发明涉及一种埋入预制天线低损耗部件的封装结构，它包括基板（1），所述基板（1）正面设置有低损耗部件（2）和芯片（3），所述低损耗部件（2）内部预制天线线路（5），所述低损耗部件（2）和芯片（3）外围区域包覆有塑封料（4），所述基板（1）背面设置有金属球（8）。本发明一种埋入预制天线低损耗部件的封装结构，它将一单独的低损耗部件贴装在基板，低损耗部件中制作有天线，基板中不用另外设计天线区域，可以节省基板空间，保证基板的结构强度。

Description

埋入预制天线低损耗部件的封装结构
技术领域
本发明涉及一种埋入预制天线低损耗部件的封装结构，属于半导体封装技术领域。
背景技术
天线是无线通讯设备中必需的元件，在可携式的无线通讯设备集成化、小型化、微型化的要求下，现在使用的方式是通过系统级封装，尽可能多的把无源器件、小功率有源器件、天线埋入基板内，这就要求基板有尽可能低的介电损耗。另外，技术趋势又要求基板尽可能薄型化，但是低损耗的基板或其他材料一般机械强度或刚度较低，从而会影响到整体封装的强度。
发明内容
本发明所要解决的技术问题是针对上述现有技术提供一种埋入预制天线低损耗部件的封装结构，它将一单独的低损耗部件贴装在基板，低损耗部件中制作有天线，基板中不用另外设计天线区域，可以节省基板空间，保证基板的结构强度。
本发明解决上述问题所采用的技术方案为：一种埋入预制天线低损耗部件的封装结构，它包括基板，所述基板正面设置有低损耗部件和芯片，所述低损耗部件内部预制天线线路，所述低损耗部件和芯片外围区域包覆有塑封料，所述基板背面设置有金属球。
所述低损耗部件由常规基板或MIS或ETS板工艺制成。
所述天线线路周围设置有屏蔽层。
所述屏蔽层采用一圈柱形阵列或整片侧壁电镀的方式。
所述屏蔽层与基板上的线路层相连接。
所述低损耗部件与基板上的线路层电性连接。
所述低损耗部件正面设置有低损耗保护层。
所述低损耗部件正面设置有防腐蚀保护层。
所述低损耗保护层或防腐蚀保护层的表面露出于塑封料。
与现有技术相比，本发明的优点在于：
1、本发明使用独立的低损耗部件，部件中设置有天线，基板中不必另外设计天线区域，增加了薄型基板的结构强度；
2、本发明的低损耗部件内预制了天线线路，能够保证天线区域在工作时受热的稳定性，保证信号传输；
3、本发明低损耗部件中除了设置有天线线路，天线周围还设置有屏蔽层，防止产品内部的电磁干扰。
附图说明
图1为本发明一种埋入预制天线低损耗部件的封装结构的示意图。
图2为本发明一种埋入预制天线低损耗部件的封装结构的低损耗部件的俯视图。
图3和图4为图1的两种变体封装结构的示意图。
其中：
基板1
低损耗部件2
芯片3
塑封料4
天线线路5
低损耗保护层6
屏蔽层7
金属球8
防腐蚀保护层9。
具体实施方式
以下结合附图实施例对本发明作进一步详细描述。
参见图1、图2，本实施例中的一种埋入预制天线低损耗部件的封装结构，它包括基板1，所述基板1正面设置有低损耗部件2和芯片3，所述低损耗部件2内部预制天线线路5，所述低损耗部件2和芯片3外围区域包覆有塑封料4，所述基板1背面设置有金属球8；
所述低损耗部件2由常规基板或MIS （molded interconnect substrate）或ETS（embedded trace substrate）基板工艺制成，由天线线路5、屏蔽层7、其他功能线路和低损耗的绝缘材料构成。
所述低损耗部件2正面设置有低损耗保护层6；
所述天线线路5周围设置有屏蔽层7；
所述屏蔽层7可以采用一圈柱形阵列或整片侧壁电镀的方式，与基板1进行接地连接；
所述天线线路5与基板1电性连接；
所述低损耗部件2与基板1上的线路层电性连接。
参加图3，本实施例中的一种埋入预制天线低损耗部件的封装结构，它包括基板1，所述基板1正面设置有低损耗部件2和芯片3，所述低损耗部件2内部预制天线线路5，所述低损耗部件2和芯片3外围区域包覆有塑封料4，所述基板1背面设置有金属球8，所述低损耗部件2正面设置有低损耗保护层6，所述低损耗保护层6表面露出于塑封料4。
参见图4，本实施例中的一种埋入预制天线低损耗部件的封装结构，它包括基板1，所述基板1正面设置有低损耗部件2和芯片3，所述低损耗部件2内部预制天线线路5，所述低损耗部件2和芯片3外围区域包覆有塑封料4，所述基板1背面设置有金属球8；
所述天线线路5正面设置有防腐蚀保护层9；
所述防腐蚀保护层9表面露出于塑封料4。
除上述实施例外，本发明还包括有其他实施方式，凡采用等同变换或者等效替换方式形成的技术方案，均应落入本发明权利要求的保护范围之内。

Claims (9)

1.一种埋入预制天线低损耗部件的封装结构，其特征在于：它包括基板（1），所述基板（1）正面设置有低损耗部件（2）和芯片（3），所述低损耗部件（2）内部预制天线线路（5），所述低损耗部件（2）和芯片（3）外围区域包覆有塑封料（4），所述基板（1）背面设置有金属球（8）。
2.根据权利要求1所述的一种埋入预制天线低损耗部件的封装结构，其特征在于：所述低损耗部件（2）由常规基板或MIS或ETS板工艺制成。
3.根据权利要求1所述的一种埋入预制天线低损耗部件的封装结构，其特征在于：所述天线线路（5）周围设置有屏蔽层（7）。
4.根据权利要求1所述的一种埋入预制天线低损耗部件的封装结构，其特征在于：所述屏蔽层（7）采用一圈柱形阵列或整片侧壁电镀的方式。
5.根据权利要求3或4所述的一种埋入预制天线低损耗部件的封装结构，其特征在于：所述屏蔽层（7）与基板（1）上的线路层相连接。
6.根据权利要求1所述的一种埋入预制天线低损耗部件的封装结构，其特征在于：所述低损耗部件（2）与基板（1）上的线路层电性连接。
7.根据权利要求1所述的一种埋入预制天线低损耗部件的封装结构，其特征在于：所述低损耗部件（2）正面设置有低损耗保护层（6）。
8.根据权利要求1或3所述的一种埋入预制天线低损耗部件的封装结构，其特征在于：所述天线线路（5）和屏蔽层（7）表面设置有防腐蚀保护层（9）。
9.根据权利要求7或8所述的一种埋入预制天线低损耗部件的封装结构，其特征在于：所述低损耗保护层（6）或防腐蚀保护层（9）的表面露出于塑封料（4）。
CN201710515857.0A 2017-06-29 2017-06-29 埋入预制天线低损耗部件的封装结构 Pending CN107393883A (zh)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108538794A (zh) * 2018-03-26 2018-09-14 江苏长电科技股份有限公司 表面贴装型封装结构及其制作方法
CN109244046A (zh) * 2018-10-26 2019-01-18 中芯长电半导体（江阴）有限公司 扇出型天线封装结构及封装方法
WO2024025874A1 (en) * 2022-07-29 2024-02-01 Texas Instruments Incorporated Microelectronic device package with integral antenna module and semiconductor device
CN109244046B (zh) * 2018-10-26 2024-10-25 盛合晶微半导体(江阴)有限公司 扇出型天线封装结构及封装方法

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CN103681561A (zh) * 2012-09-20 2014-03-26 台湾积体电路制造股份有限公司 层叠封装结构中的无源器件及其形成方法
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CN1753180A (zh) * 2004-09-21 2006-03-29 日月光半导体制造股份有限公司 具有微带天线结构的半导体封装构造
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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108538794A (zh) * 2018-03-26 2018-09-14 江苏长电科技股份有限公司 表面贴装型封装结构及其制作方法
CN109244046A (zh) * 2018-10-26 2019-01-18 中芯长电半导体（江阴）有限公司 扇出型天线封装结构及封装方法
CN109244046B (zh) * 2018-10-26 2024-10-25 盛合晶微半导体(江阴)有限公司 扇出型天线封装结构及封装方法
WO2024025874A1 (en) * 2022-07-29 2024-02-01 Texas Instruments Incorporated Microelectronic device package with integral antenna module and semiconductor device

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