CN107331695B - A kind of N well resistance and its generation method - Google Patents

A kind of N well resistance and its generation method Download PDF

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Publication number
CN107331695B
CN107331695B CN201710432743.XA CN201710432743A CN107331695B CN 107331695 B CN107331695 B CN 107331695B CN 201710432743 A CN201710432743 A CN 201710432743A CN 107331695 B CN107331695 B CN 107331695B
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region
well
polysilicon portion
polysilicon
resistance
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CN107331695A (en
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王钊
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Nanjing Sino Microelectronics Co Ltd
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Nanjing Sino Microelectronics Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/20Resistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

This application provides a kind of N well resistance and its generation method, the N well resistance includes: the first polysilicon portion;The first region N+ below first polysilicon portion;With the second polysilicon portion at first polysilicon portion interval;The 2nd region N+ below second polysilicon portion;N well region;First region N+ is located in one end of the N well region, and connect with the N well region;2nd region N+ is located in the other end of the N well region, and connect with the N well region;The polysilicon portion is the hollow structure of inner hollow, forms the corresponding region N+ by the hollow structure implanted dopant.The N well resistance can be improved the precision of heat treatment process N well resistance value.The N well resistance for keeping high precision electro resistance value during heat treatment can be generated in the generation method of the N well resistance.

Description

A kind of N well resistance and its generation method
Technical field
This application involves technical field of circuit design, in particular to a kind of N well resistance and its generation method.
Background technique
N well resistance is often used in Analog Circuit Design.Fig. 1 is the structural schematic diagram of existing N well resistance, such as Fig. 1 Shown, the N well resistance of the prior art includes N well region and the region N+, and the region that wherein dot-dash wire frame is formed is N well region, heavy line Frame is the region N+, placed the region N+ respectively at the both ends of N well region, generally (doping concentration is low) is lightly doped in N well region, and N+ attaches most importance to Doping (doping concentration is high).The length of General N well resistance is determined by the distance between two N+ district center points.In integrated circuit work In skill, N well region and the region N+ can change due to the heat treatment process in later process, so the length accuracy of its definition is inclined Difference is larger.Impurity in N well region and the region N+ can be diffused in later process heat treatment process.Temperature change pair The influence of diffusion is very big.Heat treated process control inaccurately causes the deviation of chip chamber in mass production larger.
The formula of resistance value are as follows:
Wherein, R is resistance value, and ρ is resistivity, and L is the length of resistance, and A is the sectional area of resistance.
As it can be seen that resistance value is proportional to the length of resistance, and heat treated process control inaccurately causes to produce core in enormous quantities Deviation between piece is larger, that is, and the length accuracy of N well resistance is affected by temperature, thus, directly affect the precision of N well resistance value.
Summary of the invention
The embodiment of the present application proposes a kind of N well resistance and its generation method, existing heat treated program-controlled to overcome System inaccurately leads to the deficiency for influencing the precision of N well resistance value.
The embodiment of the present application provides a kind of N well resistance, comprising:
First polysilicon portion;
The first region N+ below first polysilicon portion;
With the second polysilicon portion at first polysilicon portion interval;
The 2nd region N+ below second polysilicon portion;
N well region;
First region N+ is located in one end of the N well region, and connect with the N well region;2nd region N+ It is connect in the other end of the N well region, and with the N well region;
The polysilicon portion is the hollow structure of inner hollow, forms corresponding N+ by the hollow structure implanted dopant Region.
N well resistance provided by the embodiments of the present application, due to including the first polysilicon portion;Positioned at first polysilicon portion First region N+ of lower section;With the second polysilicon portion at first polysilicon portion interval;Positioned at the second polysilicon subordinate 2nd region N+ of side;N well region;First region N+ is located in one end of the N well region, and connect with the N well region;Institute It states the 2nd region N+ to be located in the other end of the N well region, and is connect with the N well region;The polysilicon portion is inner hollow Hollow structure, the hollow structure includes inner side and outer side, and the inside of the hollow structure is for controlling the region N+ It is formed;Distance at the first N+ regional center to the corresponding N well region at the 2nd N+ regional center is the N trap The length of resistance., the formation in the region N+ can be accurately controlled based on polysilicon portion, to accurately control the length of N well resistance Degree improves the precision of heat treatment process N well resistance value.
The embodiment of the present application also provides the generation methods of above-mentioned N well resistance, include the following steps:
Form N well region;
Polysilicon portion is formed, the polysilicon portion includes the first polysilicon portion and the second polysilicon portion, first polycrystalline Silicon portion and second polysilicon segment are not located at the top at N well region both ends, and the polysilicon portion is the sky of inner hollow Core structure, the hollow structure include inner side and outer side, and the inside of the hollow structure is used to control the formation in the region N+;
The N-type impurity for injecting high concentration to the area Gui Ti by polysilicon portion hollow structure, forms the region N+, institute Stating the region N+ includes the first region N+ and the 2nd region N+, and the first region N+ and the 2nd region N+ are located at described It is connect in the both ends of N well region and with the N well region.
The generation method of above-mentioned N well resistance provided by the embodiments of the present application forms N well region;Polysilicon portion is formed, it is described Polysilicon portion includes the first polysilicon portion and the second polysilicon portion, and first polysilicon portion and second polysilicon segment are other Positioned at the top at N well region both ends, the polysilicon portion is the hollow structure of inner hollow, and the hollow structure includes inside And outside, the inside of the hollow structure are used to control the formation in the region N+;By polysilicon portion hollow structure to The N-type impurity of high concentration is injected in the area Gui Ti, forms the region N+, and the region N+ includes the first region N+ and the 2nd area N+ Domain, the first region N+ and the 2nd region N+ are located in the both ends of the N well region and connect with the N well region, The N well resistance for keeping high precision electro resistance value during heat treatment can be generated.
Detailed description of the invention
The specific embodiment of the application is described below with reference to accompanying drawings,
Fig. 1 is the structural schematic diagram of existing N well resistance, wherein dot-dash wire frame is N well region, and solid wire frame is the region N+;
Fig. 2 is the structural schematic diagram of N well resistance provided by the embodiments of the present application, wherein (a) provides for the embodiment of the present application N well resistance overlooking structure diagram, (b) be N well resistance provided by the embodiments of the present application cross-sectional structure schematic diagram, In, grid filling region is Metal contacts, and oblique line filling region is polysilicon portion, and dot-dash wire frame is N well region, and solid wire frame is The region N+;
Fig. 3 is the generation method flow diagram of N well resistance provided by the embodiments of the present application.
Specific embodiment
In order to which technical solution and the advantage of the application is more clearly understood, below in conjunction with attached drawing to the exemplary of the application Embodiment is described in more detail, it is clear that and described embodiment is only a part of the embodiment of the application, rather than The exhaustion of all embodiments.And in the absence of conflict, the feature in the embodiment and embodiment in this specification can be with It is combined with each other.
During realizing the application, inventors have found that N well resistance is in integrated circuit technology, N well region and the area N+ Domain can change due to the heat treatment process in later process, so the length accuracy deviation of its definition is larger.N well region and N+ Impurity in region can be diffused in later process heat treatment process, and influence of the temperature change to diffusion is very big. Heat treated process control inaccurately causes the deviation of chip chamber in mass production larger.And heat treated process control is inaccurately led Cause the deviation of chip chamber in producing in enormous quantities larger, that is, the length accuracy of N well resistance is affected by temperature, thus, directly affect N The precision of well resistance value.
In view of the above-mentioned problems, providing a kind of N well resistance in the embodiment of the present application, Fig. 2 is N provided by the embodiments of the present application The structural schematic diagram of well resistance, wherein (a) is the overlooking structure diagram of N well resistance provided by the embodiments of the present application, (b) is The cross-sectional structure schematic diagram of N well resistance provided by the embodiments of the present application.As shown in Fig. 2, the N well resistance may include:
First polysilicon portion;
The first region N+ below first polysilicon portion;
With the second polysilicon portion at first polysilicon portion interval;
The 2nd region N+ below second polysilicon portion;
N well region;
First region N+ is located in one end of the N well region, and connect with the N well region;2nd region N+ It is connect in the other end of the N well region, and with the N well region;
The polysilicon portion is the hollow structure of inner hollow, forms corresponding N+ by the hollow structure implanted dopant Region.
In specific implementation, the purpose in the region N+ is to provide Ohmic contact, i.e. contact resistance is smaller, for by N well resistance with Other components of chip are attached, and heavy doping could form low-impedance Ohmic contact.The effect of N well region is to be formed centainly Resistance value.
N well region (this specific region can be by those skilled in the art according to reality close to the specific region of two endpoints Need to be not especially limited here to determine) top be respectively equipped with the first polysilicon portion and the second polysilicon portion.First region N+ It is located in the both ends of the N well region with the 2nd region N+ and is connect with the N well region.
By the increase polysilicon portion in existing N well resistance structure, the shapes and sizes in the region N+ can be accurately controlled, To accurately control the length of N well resistance.
In implementation, the resistance value of the N well resistance be can be based on the first region N+, the 2nd region N+ and described What N well region determined
In specific implementation, since the region N+ is heavy doping, resistance is smaller with respect to the resistance value of N well region, therefore, is calculating N It approximate can ignore the resistance value in the region N+ when the resistance value of well resistance, those skilled in the art are in the resistance value for calculating the N well resistance When, the resistance value in the region N+ can not also be ignored.In implementation, the N well region in the cross-sectional structure of the N well resistance Width can be less than the width in the region N+.
In specific implementation, the width (that is, width of polysilicon inside region) in the region N+ can be greater than the width of N well region Degree, and the N well region width of existing N well resistance as shown in Figure 1 is greater than N+ peak width, will lead to the N well region outside the region N+ Domain changes with N+ regional change, and for this part there is also certain N well resistance, the resistance value of this part N well resistance can be with The variation in the region N+ and change, also will affect the resistance value of entire N well resistance.And work as the cross-sectional structure of the N well resistance In the N well region width can be less than the region N+ width, so that it may be effectively reduced N well resistance because temperature change produce Raw resistance change.
In implementation, the outside in the area Gui Ti for being used to form the region N+ below the polysilicon portion can be located at Between the inner side and outer side of polysilicon portion hollow structure.
In specific implementation, the outside in the area Gui Ti for being used to form the region N+ below the polysilicon portion and institute The positional relationship for stating the inner side and outer side in polysilicon portion will affect the accurate control effect of N+ active area, to the N well resistance Thermal stability is most important.
Only it is located at the outside in the area Gui Ti for being used to form the region N+ below the polysilicon portion positioned at described more When between the inner side and outer side of crystal silicon portion hollow structure, the region N+ could be accurately controlled without departing from polysilicon portion inner side edge Edge.
In implementation, the polysilicon portion can be using the more of the polysilicon or generation polysilicon resistance for generating metal-oxide-semiconductor grid Crystal silicon.
In specific implementation, it is used to define the polysilicon portion general precision of the grid of metal-oxide-semiconductor in MOS integrated circuit technology most Height, on the one hand its photo etched mask can use the mask plate of full accuracy, and another aspect polysilicon portion is located above silicon body, region It is not certainly to be sized by doping like that by N well region or the region N+, therefore, heat-treated process does not influence this layer, so it is smart It spends higher.
N well resistance structure provided by the embodiments of the present application is as shown in Fig. 2, including N well region, the region N+, polysilicon portion. For there are multiple polysilicon portions in technique, such as the first polysilicon portion is the polysilicon to form metal-oxide-semiconductor grid, the second polysilicon Portion is the polysilicon to form polysilicon resistance.Polysilicon portion preferred embodiment in the embodiment of the present application uses the first polysilicon, because It is higher for its general mask plate precision of the first polysilicon.Although the second polysilicon for being used to form polysilicon resistance can also be used in In the embodiment of the present application, the influence of heat treatment can reduce, but the precision of its general mask plate is lower, can also reduce the present invention Effect.
To sum up, those skilled in the art can be in conjunction with the material in specific application scenarios flexible choice polysilicon portion.
In implementation, the thickness of the N well region in the cross-sectional structure of the N well resistance can be greater than the region N+ Thickness.
In implementation, the inner side and outer side in the polysilicon portion can be rectangle, and the outside in the region N+ can be rectangle.
In specific implementation, the inner side and outer side in the polysilicon portion can be rectangle, and the outside in the region N+ can be Rectangle.Similarly, the outside in the inner side and outer side in the polysilicon portion and the region N+ may be square, ellipse Etc., as long as the size and N well resistance length in the region N+ can be precisely controlled.Here as exemplary only, it does not do and has Body limits.
In implementation, the N well resistance can also include: oxide layer, the oxygen in the cross-sectional structure of the N well resistance Change layer between the polysilicon portion and the N well region.
In implementation, the N well resistance can also include: the first Metal contacts and the second Metal contacts, the first N + region is connected with the first Metal contacts, wherein first Metal contacts pass through the hollow knot in first polysilicon portion Structure;
2nd region N+ is connected with second Metal contacts, wherein second Metal contacts are across described The hollow structure in the second polysilicon portion.
In specific implementation, it is contemplated that N well resistance will be connect with other component circuits, and therefore, the N well resistance can be with Metal contacts including the hollow structure in polysilicon portion is electrically connected and passed through with the region N+.
N well resistance provided by the embodiments of the present application, due to including the first polysilicon portion;Positioned at first polysilicon portion First region N+ of lower section;With the second polysilicon portion at first polysilicon portion interval;Positioned at the second polysilicon subordinate 2nd region N+ of side;N well region;First region N+ is located in one end of the N well region, and connect with the N well region;Institute It states the 2nd region N+ to be located in the other end of the N well region, and is connect with the N well region;The polysilicon portion is inner hollow Hollow structure, the corresponding region N+ is formed by the hollow structure implanted dopant, can be accurately controlled based on polysilicon portion The formation in the region N+ improves the precision of heat treatment process N well resistance value to accurately control the length of N well resistance.
Conceived based on same application, additionally provides a kind of generation method of N well resistance in the embodiment of the present application.
Fig. 3 is the generation method flow diagram of N well resistance provided by the embodiments of the present application, as shown in figure 3, the N trap The generation method of resistance may include steps of:
Step 301: forming N well region;
Step 302: forming polysilicon portion, the polysilicon portion includes the first polysilicon portion and the second polysilicon portion, described First polysilicon portion and second polysilicon segment are not located at the top at N well region both ends, and the polysilicon portion is inside Hollow hollow structure, the hollow structure include inner side and outer side, and the inside of the hollow structure is for controlling the area N+ The formation in domain;
Step 303: injecting the N-type impurity of high concentration to the area Gui Ti by the hollow structure in the polysilicon portion, form institute The region N+ is stated, the region N+ includes the first region N+ and the 2nd region N+, the first region N+ and the 2nd region N+ It is located in the both ends of the N well region and is connect with the N well region.
In implementation, polysilicon portion is formed, can be specifically included:
Oxide layer and polysilicon layer are formed by aoxidizing, depositing;
Photoetching etches the polysilicon layer and the oxide layer to form sky on the polysilicon layer and the oxide layer The polysilicon portion of core structure.
In specific implementation, N well region is usually formed at first, N trap injection region is made by lithography by N well region mask plate, then to N Trap injection region injects the opposite lower N-type impurity of N+ regional concentration and forms N well region.
After N well region is formed, polysilicon layer and oxide layer are formed by aoxidizing, depositing, then by polysilicon layer and oxygen Change layer photoetching, etches away the place without polysilicon, be formed the polysilicon portion of required hollow structure.The polysilicon portion The first polysilicon portion and the second polysilicon portion including being located at the top at N well region both ends, the polysilicon portion are packet The hollow structure of inner side and outer side is included, the inside of the hollow structure is used to control the formation in the region N+.
The injection region N+ is formed finally by N+ mask plate, it is highly concentrated to the injection of the injection region N+ by the hollow structure in polysilicon portion The N-type impurity of degree forms the required region N+.
Polysilicon portion is formed before forming the region N+, to guarantee that polysilicon is precisely controlled in the forming process in the region N+ The size in the region N+, to generate the N well resistance for keeping high precision electro resistance value during heat treatment.
The generation method of above-mentioned N well resistance provided by the embodiments of the present application forms N well region;Polysilicon portion is formed, it is described Polysilicon portion includes the first polysilicon portion and the second polysilicon portion, and first polysilicon portion and second polysilicon segment are other Positioned at the top at N well region both ends, the polysilicon portion is the hollow structure of inner hollow, and the hollow structure includes inside And outside, the inside of the hollow structure are used to control the formation in the region N+;Pass through the hollow structure in the polysilicon portion To the N-type impurity of the area Gui Ti injection high concentration, the region N+ is formed, the region N+ includes the first region N+ and the 2nd area N+ Domain, the first region N+ and the 2nd region N+ are located in the both ends of the N well region and connect with the N well region, The N well resistance for keeping high precision electro resistance value during heat treatment can be generated.
Obviously, those skilled in the art can carry out various modification and variations without departing from the essence of the application to the application Mind and range.In this way, if these modifications and variations of the application belong to the range of the claim of this application and its equivalent technologies Within, then the application is also intended to include these modifications and variations.

Claims (10)

1. a kind of N well resistance characterized by comprising
First polysilicon portion;
The first region N+ below first polysilicon portion;
With the second polysilicon portion at first polysilicon portion interval;
The 2nd region N+ below second polysilicon portion;
N well region;First region N+ is located in one end of the N well region, and connect with the N well region;2nd area N+ Domain is located in the other end of the N well region, and connect with the N well region;
The polysilicon portion is the hollow structure of inner hollow, forms the corresponding area N+ by the hollow structure implanted dopant Domain;The hollow structure includes inner side and outer side, and the inside of the hollow structure is used to control the formation in the region N+.
2. N well resistance as described in claim 1, which is characterized in that the resistance value of the N well resistance is based on the first area N+ What domain, the 2nd region N+ and the N well region determined.
3. N well resistance as described in claim 1, which is characterized in that the N trap in the cross-sectional structure of the N well resistance The width in area is less than the width in the region N+.
4. N well resistance as described in claim 1, which is characterized in that be used to form the N below the polysilicon portion The outside in the area Gui Ti in+region is located between the inner side and outer side of polysilicon portion hollow structure.
5. N well resistance as described in claim 1, which is characterized in that the polysilicon portion is using the polycrystalline for generating metal-oxide-semiconductor grid Silicon or the polysilicon for generating polysilicon resistance.
6. N well resistance as described in claim 1, which is characterized in that the N trap in the cross-sectional structure of the N well resistance The thickness in area is greater than the thickness in the region N+.
7. N well resistance as described in claim 1, which is characterized in that further include: oxide layer, the cross section knot of the N well resistance The oxide layer in structure is between the polysilicon portion and the N well region.
8. N well resistance as described in claim 1, which is characterized in that further include: the first Metal contacts and the contact of the second metal Portion, the first region N+ are connected with first Metal contacts, wherein first Metal contacts pass through described first The hollow structure in polysilicon portion;
2nd region N+ is connected with second Metal contacts, wherein second Metal contacts pass through described second The hollow structure in polysilicon portion.
9. a kind of generation method of such as described in any item N well resistances of claim 1-8, which comprises the steps of:
Form N well region;
Polysilicon portion is formed, the polysilicon portion includes the first polysilicon portion and the second polysilicon portion, first polysilicon portion The top at N well region both ends it is not located at second polysilicon segment, the polysilicon portion is the hollow knot of inner hollow Structure, the hollow structure include inner side and outer side, and the inside of the hollow structure is used to control the formation in the region N+;
The N-type impurity for injecting high concentration to the area Gui Ti by the hollow structure in the polysilicon portion, forms the region N+, described The region N+ includes the first region N+ and the 2nd region N+, and the first region N+ and the 2nd region N+ are located at the N It is connect in the both ends of well region and with the N well region.
10. the generation method of N well resistance as claimed in claim 9, which is characterized in that form polysilicon portion, specifically include:
Oxide layer and polysilicon layer are formed by aoxidizing, depositing;
Photoetching etches the polysilicon layer and the oxide layer to form hollow knot on the polysilicon layer and the oxide layer The polysilicon portion of structure.
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