CN107316818A - The preparation method and encapsulating structure of chip package module - Google Patents
The preparation method and encapsulating structure of chip package module Download PDFInfo
- Publication number
- CN107316818A CN107316818A CN201710468833.4A CN201710468833A CN107316818A CN 107316818 A CN107316818 A CN 107316818A CN 201710468833 A CN201710468833 A CN 201710468833A CN 107316818 A CN107316818 A CN 107316818A
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- chip
- cover plate
- soldered ball
- overlay film
- ball
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- 238000002360 preparation method Methods 0.000 title claims abstract description 21
- 239000004033 plastic Substances 0.000 claims abstract description 54
- 238000000034 method Methods 0.000 claims abstract description 26
- 238000004806 packaging method and process Methods 0.000 claims abstract description 20
- 230000015572 biosynthetic process Effects 0.000 claims abstract description 12
- 238000010030 laminating Methods 0.000 claims abstract description 7
- 239000000463 material Substances 0.000 claims description 12
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 8
- 229910052710 silicon Inorganic materials 0.000 claims description 8
- 239000010703 silicon Substances 0.000 claims description 8
- 229920001343 polytetrafluoroethylene Polymers 0.000 claims description 6
- 239000004810 polytetrafluoroethylene Substances 0.000 claims description 6
- 239000000919 ceramic Substances 0.000 claims description 4
- 239000011521 glass Substances 0.000 claims description 4
- 229910052594 sapphire Inorganic materials 0.000 claims description 4
- 239000010980 sapphire Substances 0.000 claims description 4
- 238000005538 encapsulation Methods 0.000 description 9
- 239000000758 substrate Substances 0.000 description 6
- 230000000694 effects Effects 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 5
- 238000000465 moulding Methods 0.000 description 2
- 238000012858 packaging process Methods 0.000 description 2
- 238000005253 cladding Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- 238000012536 packaging technology Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000007493 shaping process Methods 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/568—Temporary substrate used as encapsulation process aid
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
The embodiment of the invention discloses the preparation method of chip package module and encapsulating structure, wherein, methods described includes：Chip is provided, the front of the chip is formed with functional circuit；Ball is planted at the back side of the chip, the soldered ball of formation is electrically connected with the functional circuit；In the front laminating cover plate of the chip；The part sphere of the soldered ball is embedded in overlay film, and plastic package structure is formed close to the side of the chip in the cover plate, the plastic package structure coats the chip；Depart from the overlay film, the part sphere of the soldered ball exposes side of the plastic package structure away from the cover plate.Technical scheme provided in an embodiment of the present invention, can reduce packaging cost, simplification of flowsheet and technical difficulty.
Description
Technical field
The present embodiments relate to chip encapsulation technology field, more particularly to a kind of chip package module preparation method and
Encapsulating structure.
Background technology
A kind of chip-packaging structure schematic diagram is as shown in figure 1, including chip 110, package substrate 150, pcb board 160, cover plate
130 and interstitital texture 140.The front of chip 110 and cover plate 130 directly in conjunction with, it is ensured that chip 110 has higher penetrance；Core
The back side of piece 110 sets pad 120, is electrically connected by pad 120 with package substrate 150.
At this stage, in order to ensure that chip has high-penetration rate, chip package process flow uses open packages (Open
Molding the exposed interstitital texture 140 not formed by capsulation material of) scheme, i.e. chip surface is covered, then directly against capping
Plate 130.Open packages scheme needs to need opening for accurate determination encapsulating mould according to the shapes and sizes of chip in encapsulation process
, there is technical difficulty, complex process in mouth-shaped and size.
The content of the invention
The present invention provides the preparation method and encapsulating structure of a kind of chip package module, to solve existing chip package process
The problem of technical difficulty height, complex process, reach the purpose of reduction packaging cost, simplification of flowsheet and technical difficulty.
In a first aspect, the embodiments of the invention provide a kind of preparation method of chip package module and encapsulating structure method,
This method includes：
Chip is provided, the front of the chip is formed with functional circuit；
Ball is planted at the back side of the chip, the soldered ball of formation is electrically connected with the functional circuit；
In the front laminating cover plate of the chip；
The part sphere of the soldered ball is embedded in overlay film, and plastic packaging is formed close to the side of the chip in the cover plate
Structure, the plastic package structure coats the chip；
Depart from the overlay film, the part sphere of the soldered ball exposes side of the plastic package structure away from the cover plate.
Preferably, before ball is planted at the back side of the chip, in addition to：
Rewiring, which is carried out, at the back side of the chip is distributed the first pad.
Preferably, the soldered ball that the back side in the chip is formed includes：
Ball is planted in the first pad correspondence position of the chip back.
Preferably, the second pad is formed with the functional circuit, before ball is planted at the back side of the chip, in addition to：
Silicon perforation is formed on the chip；
Second pad electrically connects first pad by the silicon perforation.
Preferably, the part sphere of the soldered ball is embedded in overlay film, and in the cover plate close to the side of the chip
Plastic package structure is formed, including：
The chip is put upside down in mould, the part sphere press-in of the soldered ball is located at the overlay film in the mould
In；
Plastic packaging is carried out to the chip and the plastic package structure is formed, wherein, the back side of the chip and the mould
Bottom is oppositely arranged.
Preferably, the overlay film is soft overlay film.
Preferably, the material of the overlay film includes：Polytetrafluoroethylene (PTFE).
Preferably, formed in the cover plate close to the side of the chip after plastic package structure, in addition to：
Pcb board is bound in the chip back by the soldered ball.
Preferably, the material of the cover plate includes glass, ceramics or sapphire.
Preferably, the chip package module is fingerprint chip package module.
Second aspect, the embodiment of the present invention additionally provides a kind of chip package module, and the chip package module includes：
Chip, the front of the chip is provided with functional circuit；The back side of the chip is provided with soldered ball, the soldered ball with
The functional circuit electrical connection；
Cover plate, fits with the front of the chip；
Plastic package structure, positioned at the cover plate close to the side of the chip, and coats the chip；
The plastic package structure exposes the part sphere of the soldered ball.
The present invention has abandoned open packages scheme by the preparation to chip package module, and uses common encapsulation
(Molding) scheme can complete the encapsulation to chip package module, solve technical difficulty present in open packages scheme
The problem of height, complex process, realize without using package substrate, reduction packaging cost, simplification of flowsheet and technical difficulty
Effect.
Brief description of the drawings
Fig. 1 is a kind of diagrammatic cross-section of chip package module in the prior art；
Fig. 2A is a kind of chip package module preparation method flow chart in the embodiment of the present invention one；
Fig. 2 B~Fig. 2 F are the chip envelopes of each step formation of chip package module preparation method in the embodiment of the present invention one
Die-filling group；
Fig. 3 A are a kind of chip package module preparation method flow charts in the embodiment of the present invention two；
Fig. 3 B~Fig. 3 G are the chip envelopes of each step formation of chip package module preparation method in the embodiment of the present invention two
Die-filling group；
Fig. 4 is a kind of diagrammatic cross-section of chip package module in the embodiment of the present invention three.
Embodiment
The present invention is described in further detail with reference to the accompanying drawings and examples.It is understood that this place is retouched
The specific embodiment stated is used only for explaining the present invention, rather than limitation of the invention.It also should be noted that, in order to just
Part related to the present invention rather than entire infrastructure are illustrate only in description, accompanying drawing.
Embodiment one
Fig. 2A is a kind of flow chart for chip package module preparation method that the embodiment of the present invention one is provided, Fig. 2 B- Fig. 2 F
It is the chip package module for each step formation of chip package module preparation method that the embodiment of the present invention one is provided.The present embodiment can
Suitable for the situation of chip-packaging structure chips surface exposure, following steps are specifically included：
Step 110, offer chip, the front of the chip is formed with functional circuit；
Referring to Fig. 2 B there is provided chip 210, the front 211 of chip 210 is formed with functional circuit.
Step 120, the back side plant ball in the chip, the soldered ball of formation are electrically connected with the functional circuit；
Referring to Fig. 2 C, ball is planted at the back side 212 of chip 210, soldered ball 280, soldered ball 280 and the positive work(of chip 210 is formed
Energy circuit electrical connection, specifically, soldered ball 280 can be electrically connected with the pad 220 of functional circuit.
Wherein, the back side 212 of chip and the front 211 of chip are relative.
Step 130, the front laminating cover plate in the chip；
Referring to Fig. 2 D, wherein, the cover plate 230 is preferably big plate, when cover plate 230 is big plate, is covered during laminating
Plate 230 is easily fitted with chip 210.Chip 210 can specifically be fitted with cover plate 230 by glue-line, cover plate 230 can be used for protecting
The positive functional circuit of chip 210 is without damage, improves the service life of chip.
Step 140, the part sphere of the soldered ball is embedded in overlay film, and in the cover plate close to the side of the chip
Plastic package structure is formed, the plastic package structure coats the chip；
Referring to Fig. 2 E, the part sphere of soldered ball 280 is embedded in overlay film 291, such as overlay film 291 can be soft overlay film.
Cover plate 230, chip 210 and overlay film 291 can be for example positioned in encapsulating mould, the part sphere press-in of soldered ball 280 is covered
In film 291, fill capsulation material in the surrounding of chip and form plastic package structure 240, the plastic package structure 240 coats the chip
210 do not coat the part sphere in embedment overlay film 291 but.
Step 150, the disengaging overlay film, the part sphere of the soldered ball expose the plastic package structure away from the cover plate
Side.
Referring to Fig. 2 F, depart from the overlay film 291 in Fig. 2 E, the part sphere of the soldered ball 280 exposes the plastic package structure
240 sides away from the cover plate 230.
Cover plate 230 is fitted with the front 211 of the chip 210, so the cladding formed during plastic packaging the chip
210 plastic package structure 241 will not coat the front 211 of the chip 210, make the front 211 of the chip 210 exposed, reach
The effect of opening.
The technical scheme of the present embodiment, during to chip plastic packaging, plastic packaging knot is formed in cover plate close to the side of chip
In structure, the part sphere embedment overlay film due to planting ball, the plastic package structure of formation will not cover the part sphere for planting ball, and depart from
After overlay film, the part sphere for planting ball exposes plastic package structure, is formed without retaining opening on plastic package structure, using general encapsulation
Technique can complete the plastic packaging process to chip, without using open packages technique, and technology difficulty is relatively low, simplify technique stream
Journey, and without using package substrate.I.e. to employing common encapsulation scheme in the preparation method of chip package module, solve
There is technical difficulty in open packages scheme high, the problem of complex process, reached reduction packaging cost, simplification of flowsheet
With the effect of technical difficulty.
On the basis of above-mentioned each technical scheme, the chip back preferably can be at the back side of the chip before planting ball
Carry out rewiring and be distributed the first pad；
The soldered ball that the back side in the chip is formed includes：
Ball is planted in the first pad correspondence position of the chip back.
Chip back is so set before planting ball is advantageous in that the surcharge that can increase original design, speed-up chip are opened
Stress between hair time and reduction chip and bottom plate, strengthens reliability.
On the basis of above-mentioned each technical scheme, the second pad is may also be formed with the functional circuit, in the chip
The back side plant ball before, form silicon perforation on the chip；
Second pad electrically connects first pad by the silicon perforation.
Referring to Fig. 2 B, the second pad 220, the back of the body of chip 210 are formed with the functional circuit on the front 211 of chip 210
Face 212 carries out rewiring and the first pad is distributed with.Silicon perforation 270 is formed on chip 210.Second pad 220 is worn by silicon
Hole 270 electrically connects first pad.
So set before the chip back plants ball and be advantageous in that the interconnection line for shortening chip, reduce chip profile
Size, reduction chip operation power consumption.
On the basis of above-mentioned each technical scheme, the material of the overlay film includes：Polytetrafluoroethylene (PTFE).
On the basis of above-mentioned each technical scheme, the material of the cover plate preferably can be glass, ceramics or sapphire.
The material of the cover plate, which is so set, is advantageous in that the penetrability for enhancing chip-packaging structure.
Wherein, the chip package module preferably can be fingerprint chip package module.
Embodiment two
Fig. 3 A are a kind of flow charts for chip package module preparation method that the embodiment of the present invention two is provided；Fig. 3 B- Fig. 3 G
It is the chip package module for each step formation of chip package module preparation method that the embodiment of the present invention two is provided.In above-mentioned implementation
On the basis of example, it is optimized, the preparation method includes：
Step 210, offer chip, the front of the chip is formed with functional circuit；
Referring to Fig. 3 B there is provided chip 310, the front 311 of chip is formed with functional circuit.
Step 220, the back side plant ball in the chip, the soldered ball of formation are electrically connected with the functional circuit；
Referring to Fig. 3 C, ball is planted at the back side 312 of chip 310, soldered ball 380 is formed, soldered ball 380 is electrically connected with functional circuit,
Specifically, soldered ball 380 can be electrically connected with the pad 320 of functional circuit.
Wherein, the back side 312 of chip and the front 311 of chip are relative.
Step 230, the front laminating cover plate in the chip；
Referring to Fig. 3 D, wherein, the cover plate 330 is preferably big plate, when cover plate 330 is big plate, is covered during laminating
Plate 330 is easily fitted with chip 310.Chip 310 can specifically be fitted with cover plate 330 by glue-line, cover plate can be used for protection core
Piece 310 is without damage.
In step 240, mould that the chip puts upside down, the part sphere press-in of the soldered ball is located in the mould
In the overlay film；Plastic packaging is carried out to the chip and the plastic package structure is formed.
Wherein, the back side of the chip and the bottom of the mould are oppositely arranged.
Can be specifically that cover plate 330, chip 310 and overlay film 391 are put upside down in mould 390 referring to Fig. 3 E, soldered ball 380
Part sphere press-in be located at mould 390 in overlay film 391 in, overlay film 391 can be specifically soft overlay film.Chip 390 is entered
Row plastic packaging and form the plastic package structure 340, wherein, the back side 312 of chip 310 is oppositely arranged with the bottom 392 of mould 390.
Plastic package structure 340 coats the chip 310 and does not coat the part sphere being embedded in overlay film 391 but.
After shaping, by chip 310, cover plate 330, plastic package structure 340 and the overall taking-up from mould 390 of overlay film 380.
Step 250, the disengaging overlay film, the part sphere of the soldered ball expose the plastic package structure away from the cover plate
Side.
Referring to Fig. 3 F, depart from the overlay film 391 in Fig. 3 E, the part sphere of the soldered ball 380 exposes the plastic package structure
340 sides away from the cover plate 330.
Cover plate 330 is fitted with the front 311 of the chip 310, so chip 310 is put upside down into mould during plastic packaging
In 390, and the back side of chip and the bottom of mould are oppositely arranged, and can make the plastic package structure 340 of coating chip 310 to be formed
The front 311 of the chip 310 will not be coated, the front 311 of the chip 310 is not sealed in encapsulation process by capsulation material
Dress, forms opening.
On the basis of above-mentioned each technical scheme, further, modeling is formed close to the side of the chip in the cover plate
, preferably can be by the soldered ball in chip back binding pcb board after seal structure.
Referring to Fig. 3 G, in binding procedure, pcb board 360 is bound at the back side of chip 310 by soldered ball 380.Can be specifically
, can be in PCB after binding pcb board 360 by the pad electrical connection on the soldered ball 380 and pcb board 360 that expose plastic package structure 340
Peripheral circuit is formed on plate 360.
Wherein, pcb board 360 can be PCB soft boards or PCB hardboards.
The technical scheme of the present embodiment, during to chip plastic packaging, chip is put upside down in mould, in cover plate close to core
The side of piece forms plastic package structure, and in the part sphere embedment overlay film due to planting ball, the plastic package structure of formation will not cover plant ball
Part sphere, and depart from overlay film after, plant ball part sphere expose plastic package structure, without using package substrate.And
Without retaining opening on the plastic package structure of formation, the plastic packaging process to chip can be completed using general packaging technology, without
Using open packages technique, technology difficulty is relatively low, simplifies technological process, i.e., to being used in the preparation method of chip package module
Common encapsulation scheme, solves that to there is technical difficulty in open packages scheme high, the problem of complex process, has reached reduction
The effect of packaging cost, simplification of flowsheet and technical difficulty.
Embodiment three
Fig. 4 is a kind of diagrammatic cross-section for chip package module that the embodiment of the present invention three is provided, and the present embodiment is applicable
In the exposed situation of chip surface, the concrete structure of the chip package module 400 is as follows：
Chip 410, the front 411 of the chip 410 is provided with functional circuit；The back side 412 of the chip 410 is provided with
Soldered ball, the soldered ball is electrically connected with the functional circuit；
Cover plate 430, fits with the front 411 of the chip 410；
Plastic package structure 440, positioned at the cover plate 430 close to the side of the chip 410, and coats the chip 410；
The plastic package structure 440 exposes the part sphere of the soldered ball 480.
Wherein, the material of cover plate 430 preferably can be glass, ceramics or sapphire.
The technical scheme of the present embodiment, the encapsulating structure formed by the preparation method of said chip encapsulation module need not
Using package substrate, the effect for reducing material cost is realized.
The chip package module preparation method that the said goods can be provided by any embodiment of the present invention is formed.
Note, above are only presently preferred embodiments of the present invention and institute's application technology principle.It will be appreciated by those skilled in the art that
The invention is not restricted to specific embodiment described here, can carry out for a person skilled in the art it is various it is obvious change,
Readjust and substitute without departing from protection scope of the present invention.Therefore, although the present invention is carried out by above example
It is described in further detail, but the present invention is not limited only to above example, without departing from the inventive concept, also
Other more equivalent embodiments can be included, and the scope of the present invention is determined by scope of the appended claims.
Claims (10)
1. a kind of preparation method of chip package module, it is characterised in that including：
Chip is provided, the front of the chip is formed with functional circuit；
Ball is planted at the back side of the chip, the soldered ball of formation is electrically connected with the functional circuit；
In the front laminating cover plate of the chip；
The part sphere of the soldered ball is embedded in overlay film, and plastic packaging knot is formed close to the side of the chip in the cover plate
Structure, the plastic package structure coats the chip；
Depart from the overlay film, the part sphere of the soldered ball exposes side of the plastic package structure away from the cover plate.
2. according to the method described in claim 1, it is characterised in that before ball is planted at the back side of the chip, in addition to：
Rewiring, which is carried out, at the back side of the chip is distributed the first pad；
The soldered ball that the back side in the chip is formed includes：
Ball is planted in the first pad correspondence position of the chip back.
3. method according to claim 2, it is characterised in that the second pad is formed with the functional circuit, described
The back side of chip is planted before ball, in addition to：
Silicon perforation is formed on the chip；
Second pad electrically connects first pad by the silicon perforation.
4. according to the method described in claim 1, it is characterised in that the part sphere of the soldered ball is embedded in overlay film, and
The cover plate forms plastic package structure close to the side of the chip, including：
The chip is put upside down in mould, the part sphere press-in of the soldered ball is located in the overlay film in the mould；
Plastic packaging is carried out to the chip and the plastic package structure is formed, wherein, the back side of the chip and the bottom of the mould
It is oppositely arranged.
5. according to the method described in claim 1, it is characterised in that the overlay film is soft overlay film.
6. method according to claim 5, it is characterised in that the material of the overlay film includes：Polytetrafluoroethylene (PTFE).
7. according to the method described in claim 1, it is characterised in that form plastic packaging close to the side of the chip in the cover plate
After structure, in addition to：
Pcb board is bound in the chip back by the soldered ball.
8. according to the method described in claim 1, it is characterised in that the material of the cover plate includes glass, ceramics or sapphire.
9. according to the method described in claim 1, it is characterised in that the chip package module is fingerprint chip package module.
10. a kind of chip package module, it is characterised in that including：
Chip, the front of the chip is provided with functional circuit；The back side of the chip is provided with soldered ball, the soldered ball with it is described
Functional circuit is electrically connected；
Cover plate, fits with the front of the chip；
Plastic package structure, positioned at the cover plate close to the side of the chip, and coats the chip；
The plastic package structure exposes the part sphere of the soldered ball.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710468833.4A CN107316818A (en) | 2017-06-20 | 2017-06-20 | The preparation method and encapsulating structure of chip package module |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201710468833.4A CN107316818A (en) | 2017-06-20 | 2017-06-20 | The preparation method and encapsulating structure of chip package module |
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| CN107316818A true CN107316818A (en) | 2017-11-03 |
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| CN201710468833.4A Pending CN107316818A (en) | 2017-06-20 | 2017-06-20 | The preparation method and encapsulating structure of chip package module |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN110676206A (en) * | 2019-09-24 | 2020-01-10 | 浙江集迈科微电子有限公司 | Manufacturing method for preparing super-thick adhesive film based on bonding process |
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