CN107275225A - The preparation method and encapsulating structure of chip package module - Google Patents
The preparation method and encapsulating structure of chip package module Download PDFInfo
- Publication number
- CN107275225A CN107275225A CN201710469778.0A CN201710469778A CN107275225A CN 107275225 A CN107275225 A CN 107275225A CN 201710469778 A CN201710469778 A CN 201710469778A CN 107275225 A CN107275225 A CN 107275225A
- Authority
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- China
- Prior art keywords
- chip
- pad
- soldered ball
- package structure
- plastic package
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3157—Partial encapsulation or coating
- H01L23/3185—Partial encapsulation or coating the coating covering also the sidewalls of the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
Abstract
The embodiment of the invention discloses a kind of preparation method of chip package module and encapsulating structure, wherein, methods described includes：Chip is provided, the front of the chip is formed with functional circuit；Ball is planted at the back side of the chip, the soldered ball of formation is electrically connected with the functional circuit；In the front laminating cover plate of the chip；Plastic package structure is formed close to the side of the chip in the cover plate, the plastic package structure coats the chip；The soldered ball and the plastic package structure is thinned and the first pad is formed.Technical scheme provided in an embodiment of the present invention, can reduce packaging cost, simplification of flowsheet and technical difficulty.
Description
Technical field
The present embodiments relate to chip encapsulation technology field, more particularly to a kind of chip package module preparation method and
Encapsulating structure.
Background technology
A kind of chip package module diagrammatic cross-section as shown in figure 1, including chip 110, package substrate 150, pcb board 160,
Cover plate 130 and interstitital texture 140.The front of chip 110 and cover plate 130 directly in conjunction with, it is ensured that chip 110 has higher penetrate
Rate；The back side of chip 110 sets pad 120, is electrically connected by pad 120 with package substrate 150.
At this stage, in order to ensure that chip has high-penetration rate, chip package process flow uses open packages (Open
Molding the exposed interstitital texture 140 not formed by capsulation material of) scheme, i.e. chip surface is covered, then directly against capping
Plate 130.Open packages scheme needs to need opening for accurate determination encapsulating mould according to the shapes and sizes of chip in encapsulation process
, there is technical difficulty, complex process in mouth-shaped and size.
The content of the invention
The present invention provides the preparation method and encapsulating structure of a kind of chip package module, to solve existing chip package process
The problem of technical difficulty height, complex process, reach the purpose of reduction packaging cost, simplification of flowsheet and technical difficulty.
In a first aspect, the embodiments of the invention provide a kind of preparation method of chip package module and encapsulating structure method,
This method includes：
Chip is provided, the front of the chip is formed with functional circuit；
Ball is planted at the back side of the chip, the soldered ball of formation is electrically connected with the functional circuit；
In the front laminating cover plate of the chip；
Plastic package structure is formed close to the side of the chip in the cover plate, the plastic package structure coats the chip；
The soldered ball and the plastic package structure of the chip back is thinned and the first pad is formed.
Preferably, before the plant ball at the back side of the chip, in addition to：
Rewiring, which is carried out, at the back side of the chip is distributed the second pad；
Preferably, the soldered ball that the back side in the chip is formed includes：
Ball is planted in the second pad correspondence position of the chip back.
Preferably, the 3rd pad is formed with the functional circuit, before ball is planted at the back side of the chip, in addition to：
Silicon perforation is formed on the chip；
3rd pad electrically connects second pad by the silicon perforation.
Preferably, plastic package structure is formed close to the side of the chip in the cover plate, including：
The chip is put upside down and carries out plastic packaging in mould and forms the plastic package structure, wherein, the back side of the chip
It is oppositely arranged with the bottom of the mould.
Preferably, plastic packaging is carried out in mould that the chip is put upside down and before forming the plastic package structure, in addition to：
In the soldered ball overlay film is attached away from the side of the chip back.
Preferably, it is described be thinned the chip back the soldered ball and the plastic package structure and form the first pad, wrap
Include：
The plastic package structure and the soldered ball are ground, exposes the subregion of the soldered ball to form first weldering
Disk.
Preferably, it is described be thinned the chip back the soldered ball and the plastic package structure and formed the first pad it
Afterwards, in addition to：
Pcb board is bound in the chip back by first pad.
Preferably, the material of the cover plate includes glass, ceramics or sapphire.
Preferably, the chip package module is fingerprint chip package module.
Second aspect, the embodiment of the present invention additionally provides a kind of chip package module, and the chip package module includes：
Chip, the front of the chip is provided with functional circuit；The back side of the chip is provided with soldered ball, the soldered ball with
The functional circuit electrical connection；
Cover plate, fits with the front of the chip；
Plastic package structure, positioned at the cover plate close to the side of the chip, and coats the chip；
First pad, first pad is section for the soldered ball that the plastic package structure and soldered ball formation is thinned
Face, the encapsulating structure exposes first pad.
The present invention has abandoned open packages scheme by the preparation to chip package module, and uses common encapsulation
(Molding) scheme can complete the encapsulation to chip package module, solve technical difficulty present in open packages scheme
The problem of height, complex process, realize without using package substrate, reduction packaging cost, simplification of flowsheet and technical difficulty
Effect.
Brief description of the drawings
Fig. 1 is a kind of diagrammatic cross-section of chip package module in the prior art；
Fig. 2A is a kind of chip package module preparation method flow chart in the embodiment of the present invention one；
Fig. 2 B~Fig. 2 F are the chip envelopes of each step formation of chip package module preparation method in the embodiment of the present invention one
Die-filling group；
Fig. 3 A are a kind of chip package module preparation method flow charts in the embodiment of the present invention two；
Fig. 3 B~Fig. 3 F are the chip envelopes of each step formation of chip package module preparation method in the embodiment of the present invention two
Die-filling group；
Fig. 4 is a kind of diagrammatic cross-section of chip package module in the embodiment of the present invention three.
Embodiment
The present invention is described in further detail with reference to the accompanying drawings and examples.It is understood that this place is retouched
The specific embodiment stated is used only for explaining the present invention, rather than limitation of the invention.It also should be noted that, in order to just
Part related to the present invention rather than entire infrastructure are illustrate only in description, accompanying drawing.
Embodiment one
Fig. 2A is a kind of flow chart for chip package module preparation method that the embodiment of the present invention one is provided, Fig. 2 B- Fig. 2 F
It is the chip package module for each step formation of chip package module preparation method that the embodiment of the present invention one is provided.The present embodiment can
Suitable for the situation of chip-packaging structure chips surface exposure, following steps are specifically included：
Step 110, offer chip, the front of the chip is formed with functional circuit；
Referring to Fig. 2 B there is provided chip 210, the front 211 of chip 210 is formed with functional circuit.
Step 120, the back side plant ball in the chip, the soldered ball of formation are electrically connected with the functional circuit；
Referring to Fig. 2 C, ball is planted at the back side 212 of chip 210, soldered ball 281, soldered ball 281 and the positive work(of chip 210 is formed
Energy circuit electrical connection, specifically, soldered ball 281 can be electrically connected with the pad 220 of functional circuit.
Wherein, the back side 212 of chip and the front 211 of chip are relative.
Step 130, the front laminating cover plate in the chip；
Referring to Fig. 2 D, wherein, the cover plate 230 is preferably big plate, when cover plate 230 is big plate, is covered during laminating
Plate 230 is easily fitted with chip 210.Chip 210 can specifically be fitted with cover plate 230 by glue-line, cover plate 230 can be used for protecting
The positive functional circuit of chip 210 is without damage, improves the service life of chip.
Step 140, in the cover plate close to the side of the chip plastic package structure is formed, plastic package structure cladding is described
Chip；
Referring to Fig. 2 E, plastic package structure 241 is formed close to the side of chip in cover plate 230, can be specifically by the He of cover plate 230
Chip 210 is positioned in encapsulating mould, is filled capsulation material in the surrounding of chip and is formed plastic package structure, the plastic package structure of formation
241 coating chips 210.
Step 150, be thinned the chip back the soldered ball and the plastic package structure and form the first pad.
Referring to Fig. 2 F, for example, it is thinned using cutter in the soldered ball 281 and plastic package structure 241 in Fig. 2 E, or grinding Fig. 2 E
Soldered ball 281 and plastic package structure 241, soldered ball 281 is exposed, Fig. 2 F are the structure that is formed after being thinned, soldered ball 281 exposes
Region be the first pad 280；Plastic package structure 241 is plastic package structure 240 after being thinned.
Cover plate 230 is fitted with the front 211 of the chip 210, so the cladding formed during plastic packaging the chip
210 plastic package structure 241 will not coat the front 211 of the chip 210, make the front 211 of the chip 210 exposed, reach
The effect of opening.
The technical scheme of the present embodiment, during to chip plastic packaging, directly forms modeling in cover plate close to the side of chip
Seal structure, forms on plastic package structure without retaining opening, the plastic packaging process to chip can be completed using general packaging technology,
Without using open packages technique, technology difficulty is relatively low, simplifies technological process, and without using package substrate.I.e. to core
Common encapsulation scheme is employed in the preparation method of piece encapsulation module, solves in open packages scheme and there is technical difficulty
The problem of height, complex process, the effect of reduction packaging cost, simplification of flowsheet and technical difficulty is reached.
On the basis of above-mentioned each technical scheme, the chip back preferably can be at the back side of the chip before planting ball
Carry out rewiring and be distributed the second pad；
The soldered ball that the back side in the chip is formed includes：
Ball is planted in the second pad correspondence position of the chip back.
Chip back is so set before planting ball is advantageous in that the surcharge that can increase original design, speed-up chip are opened
Stress between hair time and reduction chip and bottom plate, strengthens reliability.
On the basis of above-mentioned each technical scheme, the 3rd pad is may also be formed with the functional circuit, in the chip
The back side plant ball before, form silicon perforation on the chip；
3rd pad electrically connects second pad by the silicon perforation.
So set before the chip back plants ball and be advantageous in that the interconnection line for shortening chip, reduce chip profile
Size, reduction chip operation power consumption.
On the basis of above-mentioned each technical scheme, further, it is described be thinned the chip back the soldered ball and
The plastic package structure and formed after the first pad, preferably can by first pad the chip back bind PCB
Plate.
Wherein, pcb board can be PCB soft boards or PCB hardboards, in binding procedure, can be specifically by first pad
Pad electrical connection with the pcb board, after the pcb board is bound, can form peripheral circuit on the pcb board.
On the basis of above-mentioned each technical scheme, the material of the cover plate preferably can be glass, ceramics or sapphire.
The material of the cover plate, which is so set, is advantageous in that the penetrability for enhancing chip-packaging structure.
Wherein, the chip package module preferably can be fingerprint chip package module.
Embodiment two
Fig. 3 A are a kind of flow charts for chip package module preparation method that the embodiment of the present invention two is provided；Fig. 3 B- Fig. 3 F
It is the chip package module for each step formation of chip package module preparation method that the embodiment of the present invention two is provided.In above-mentioned implementation
On the basis of example, it is optimized, the preparation method includes：
Step 210, offer chip, the front of the chip is formed with functional circuit；
Referring to Fig. 3 B there is provided chip 310, the front 311 of chip is formed with functional circuit.
Step 220, the back side plant ball in the chip, the soldered ball of formation are electrically connected with the functional circuit；
Referring to Fig. 3 C, ball is planted at the back side 312 of chip 310, soldered ball 381 is formed, soldered ball 381 is electrically connected with functional circuit,
Specifically, soldered ball 381 can be electrically connected with the pad 320 of functional circuit.
Wherein, the back side 312 of chip and the front 311 of chip are relative.
Step 230, the front laminating cover plate in the chip；
Referring to Fig. 3 D, wherein, the cover plate 330 is preferably big plate, when cover plate 330 is big plate, is covered during laminating
Plate 330 is easily fitted with chip 310.Chip 310 can specifically be fitted with cover plate 330 by glue-line, cover plate can be used for protection core
Piece 310 is without damage.
Carry out plastic packaging in step 240, mould that the chip puts upside down and form the plastic package structure, wherein, the core
The back side of piece and the bottom of the mould are oppositely arranged.
Referring to Fig. 3 E, chip 310 is put upside down and carries out plastic packaging in mould 390 and forms the plastic package structure 341, wherein,
The back side 312 of chip 310 is oppositely arranged with the bottom 392 of mould 390.
After shaping, by chip 310, cover plate 330 and the overall taking-up from mould 390 of plastic package structure 341.
Step 250, be thinned the chip back the soldered ball and the plastic package structure and form the first pad.
Referring to Fig. 3 F, for example, the soldered ball 381 and plastic package structure 341 in Fig. 3 E, or grinding is thinned using cutter, by Fig. 3 E
In soldered ball 381 be exposed, Fig. 3 F are the structure that is formed after being thinned, and the region that soldered ball 381 exposes is the first pad
380。
Cover plate 330 is fitted with the front 311 of the chip 310, so chip 310 is put upside down into mould during plastic packaging
In, and the back side of chip and the bottom of mould be oppositely arranged, and can make the plastic package structure 341 for the coating chip 310 to be formed not
The front 311 of the chip 310 can be coated, the front 311 of the chip 310 is not sealed in encapsulation process by capsulation material
Dress, forms opening.
The technical scheme of the present embodiment, during to chip plastic packaging, chip is put upside down in mould, directly leaned in cover plate
The side of nearly chip forms plastic package structure, is formed without retaining opening on plastic package structure, can be complete using general packaging technology
The plastic packaging process of paired chip, without using open packages technique, technology difficulty is relatively low, simplifies technological process, i.e., to chip
Common encapsulation scheme is employed in the preparation method of encapsulation module, solves and there is technical difficulty height in open packages scheme,
The problem of complex process, the effect of reduction packaging cost, simplification of flowsheet and technical difficulty is reached.
On the basis of above-mentioned each technical scheme, carry out plastic packaging in mould that the chip is put upside down and form the modeling
, in chip plastic packaging process, it can preferably be covered in the soldered ball away from the side attaching overlay film of the chip back before seal structure
Film can protect soldered ball.
Embodiment three
Fig. 4 is a kind of diagrammatic cross-section for chip package module that the embodiment of the present invention three is provided, and the present embodiment is applicable
In the exposed situation of chip surface, the concrete structure of the chip package module 400 is as follows：
Chip 410, the front 411 of the chip 410 is provided with functional circuit；The back side 412 of the chip 410 is provided with
Soldered ball, the soldered ball is electrically connected with the functional circuit；
Cover plate 430, fits with the front 411 of the chip 410；
Plastic package structure 440, positioned at the cover plate 430 close to the side of the chip 410, and coats the chip 410；
First pad 480, first pad 480 is described for thinned plastic package structure 440 and the soldered ball formation
The section of soldered ball, the encapsulating structure exposes first pad 480.
Pcb board 460, the circuit that pcb board 460 is fitted on the back side of chip 410, pcb board 460 passes through the first pad 480
Realize and electrically connect with functional circuit.
Wherein, the material of cover plate 430 preferably can be glass, ceramics or sapphire.
The technical scheme of the present embodiment, the encapsulating structure formed by the preparation method of said chip encapsulation module need not
Using package substrate, the effect for reducing material cost is realized.
The chip package module preparation method that the said goods can be provided by any embodiment of the present invention is formed.
Note, above are only presently preferred embodiments of the present invention and institute's application technology principle.It will be appreciated by those skilled in the art that
The invention is not restricted to specific embodiment described here, can carry out for a person skilled in the art it is various it is obvious change,
Readjust and substitute without departing from protection scope of the present invention.Therefore, although the present invention is carried out by above example
It is described in further detail, but the present invention is not limited only to above example, without departing from the inventive concept, also
Other more equivalent embodiments can be included, and the scope of the present invention is determined by scope of the appended claims.
Claims (10)
1. a kind of preparation method of chip package module, it is characterised in that including：
Chip is provided, the front of the chip is formed with functional circuit；
Ball is planted at the back side of the chip, the soldered ball of formation is electrically connected with the functional circuit；
In the front laminating cover plate of the chip；
Plastic package structure is formed close to the side of the chip in the cover plate, the plastic package structure coats the chip；
The soldered ball and the plastic package structure of the chip back is thinned and the first pad is formed.
2. according to the method described in claim 1, it is characterised in that before ball is planted at the back side of the chip, in addition to：
Rewiring, which is carried out, at the back side of the chip is distributed the second pad；
The soldered ball that the back side in the chip is formed includes：
Ball is planted in the second pad correspondence position of the chip back.
3. method according to claim 2, it is characterised in that the 3rd pad is formed with the functional circuit, described
The back side of chip is planted before ball, in addition to：
Silicon perforation is formed on the chip；
3rd pad electrically connects second pad by the silicon perforation.
4. according to the method described in claim 1, it is characterised in that form plastic packaging close to the side of the chip in the cover plate
Structure, including：
The chip is put upside down and carries out plastic packaging in mould and forms the plastic package structure, wherein, the back side of the chip and institute
The bottom for stating mould is oppositely arranged.
5. method according to claim 4, it is characterised in that carry out plastic packaging in mould that the chip is put upside down and shape
Into before the plastic package structure, in addition to：
In the soldered ball overlay film is attached away from the side of the chip back.
6. according to the method described in claim 1, it is characterised in that the soldered ball that the chip back is thinned and described
Plastic package structure and forming the first pad includes：
The plastic package structure and the soldered ball are ground, exposes the subregion of the soldered ball to form first pad.
7. according to the method described in claim 1, it is characterised in that the soldered ball that the chip back is thinned and described
Plastic package structure and formed after the first pad, in addition to：
Pcb board is bound in the chip back by first pad.
8. according to the method described in claim 1, it is characterised in that the material of the cover plate includes glass, ceramics or sapphire.
9. according to the method described in claim 1, it is characterised in that the chip package module is fingerprint chip package module.
10. a kind of chip package module, it is characterised in that including：
Chip, the front of the chip is provided with functional circuit；The back side of the chip is provided with soldered ball, the soldered ball with it is described
Functional circuit is electrically connected；
Cover plate, fits with the front of the chip；
Plastic package structure, positioned at the cover plate close to the side of the chip, and coats the chip；
First pad, first pad is the section for the soldered ball that the plastic package structure and soldered ball formation is thinned, institute
State encapsulating structure and expose first pad.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201710469778.0A CN107275225A (en) | 2017-06-20 | 2017-06-20 | The preparation method and encapsulating structure of chip package module |
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| CN201710469778.0A CN107275225A (en) | 2017-06-20 | 2017-06-20 | The preparation method and encapsulating structure of chip package module |
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| CN201710469778.0A Pending CN107275225A (en) | 2017-06-20 | 2017-06-20 | The preparation method and encapsulating structure of chip package module |
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Application publication date: 20171020 |