CN109860126A - A kind of large scale fan-out packaging structure and method - Google Patents
A kind of large scale fan-out packaging structure and method Download PDFInfo
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- CN109860126A CN109860126A CN201910116418.1A CN201910116418A CN109860126A CN 109860126 A CN109860126 A CN 109860126A CN 201910116418 A CN201910116418 A CN 201910116418A CN 109860126 A CN109860126 A CN 109860126A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/12105—Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/96—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
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Abstract
It includes: the first plastic packaging layer that the present invention, which provides a kind of large scale fan-out packaging structure and method, the encapsulating structure,；Chip in first plastic packaging layer is set, and the first plastic packaging layer is covered in the first face and side of chip；Second face of chip is set and is electrically connected to the wiring layer again of chip bonding pad；Positioned at wiring layer again and it is provided with the exposure protective film layer that wiring layer is open again；The ubm layer being electrically connected is formed in the opening of protective film layer and by wiring layer again with chip bonding pad；Soldered ball on ubm layer；The second plastic packaging layer being set to around the soldered ball；Wherein, the height of the second plastic packaging layer is no more than the height of soldered ball and is covered in the part of the surface of soldered ball.The present invention forms plastic packaging layer by plastic packaging equal on the upper and lower surface of encapsulating structure to balance capsulation material and chip and the unmatched influence of thermal expansion coefficient between wiring layer again, and then reduces the warpage of encapsulating structure；The thickness of structure can not be increased in the performance for guaranteeing encapsulating structure simultaneously.
Description
Technical field
The present invention relates to technical field of semiconductor encapsulation more particularly to a kind of large scale fan-out packaging structure and methods.
Background technique
Fan-out package is the advanced package technologies that a kind of I/O number is more, flexibility is good.As electronic product is to small-sized
Change, be highly integrated, inexpensive direction is developed, large scale is fanned out to chip package and is able to develop and be widely used.As shown in Figure 1,
The specific embodiment for being fanned out to encapsulation technology includes that chip is transferred to support plate, and chip insertion plastic packaging material is formed weight by plastic packaging
Structure has core package substrate, then the encapsulation of chip is completed by the modes such as wiring layer and protective film layer production, plant ball.The encapsulation technology
Has many advantages, such as multi-chip, ultra-thin.But between the silicon, capsulation material and metal material in above-mentioned large size chip encapsulating structure
Thermal expansion coefficient mismatch, in addition, being generated due to the influence of mold compound curing contraction in processing technology, in encapsulating structure each
Kind stress, causes package surface warpage, warpage will affect subsequent packaging technology.Biggish warpage also will cause again wiring layer layering
The problems such as, a series of integrity problems are brought to the application of device.
In the prior art, it will usually in encapsulating structure backside deposition notacoria, by the notacoria to the back side of encapsulating structure
Apply stress, to improve the warpage of encapsulating structure.But the use of notacoria will increase the thickness of encapsulating structure, and adjustment compared with
When big warpage, need to apply biggish stress by notacoria, this just needs to form the biggish notacoria of thickness, but thicker notacoria
The problems such as its risk that falls off can also improve, more complicated while also result in preparation process.
Summary of the invention
Large scale fan-out packaging structure provided by the invention and method can pass through the upper and lower surface in fan-out packaging structure
Upper equal plastic packaging forms plastic packaging layer to balance capsulation material and chip and the unmatched influence of thermal expansion coefficient between wiring layer again,
And then reduce the warpage of encapsulating structure；Compared with depositing notacoria structure used by the prior art, the present invention can also guarantee
In the performance of encapsulating structure, the thickness of encapsulating structure is not increased.
In a first aspect, the present invention provides a kind of large scale fan-out packaging structure, comprising:
First plastic packaging layer；
Chip in the first plastic packaging layer is set, and the first plastic packaging layer is covered in the first face of the chip
And side；
Second face of the chip is set and is electrically connected to the wiring layer again of chip bonding pad, wherein the chip second
Face is opposite with the first face；
Positioned at wiring layer again and it is provided with the exposure protective film layer that wiring layer is open again；
Metal under the salient point being electrically connected is formed in the opening of the protective film layer and by wiring layer again with chip bonding pad
Layer；
Soldered ball on ubm layer；
The second plastic packaging layer being set to around the soldered ball；Wherein, the height of the second plastic packaging layer is no more than soldered ball
Height and the part of the surface for being covered in soldered ball.
Optionally, the first plastic packaging layer and the second plastic packaging layer material respective material are epoxy resin or epoxy organosilicon
Sundries or organosilicon.
Optionally, respective heights are set as consistent or inconsistent to the second plastic packaging layer everywhere, and the second plastic packaging layer
Respective heights are no more than the height of soldered ball everywhere.
Optionally, the soldered ball include gold solder ball, brazing ball, tin silver welded spheroid, tin silver copper soldered ball, tin-lead soldered ball, in copper post
One or any combination；
Wherein, the soldered ball is processed and to be formed by plating or plant ball or Reflow Soldering.
Optionally, the wiring layer again includes one or more layers.
Second aspect, the present invention provide a kind of large scale and are fanned out to packaging method, comprising:
The pasting chip on the first support plate；
In the first support plate and the face plastic packaging that posts chip forms and covers first modeling in the first face and side of the chip
Sealing, and remove the first support plate；
In the second face of the chip, setting is electrically connected to the wiring layer again of chip bonding pad and is provided with exposure and is routed again
The protective film layer of layer opening, wherein second face of chip is opposite with the first face；
Ubm layer is formed in the opening of the protective film layer and is connect with wiring layer again；
Soldered ball is prepared on the ubm layer；
The second plastic packaging layer is prepared around the soldered ball；Wherein, the height of the second plastic packaging layer is no more than the height of soldered ball
Spend and be covered in the part of the surface of soldered ball.
Optionally, it is described the first support plate and post chip a face plastic packaging formed cover the chip the first face and
First plastic packaging layer of side, and after the first support plate of removal, the method also includes:
It is bonded by the second cementing layer with the second support plate in the first face of the first plastic packaging layer；
Preferably, when being bonded by the second cementing layer with the second support plate in the first face of the first plastic packaging layer, then described
After preparing the second plastic packaging layer around soldered ball, the method also includes:
Remove the second support plate and the second cementing layer.
Optionally, wiring layer again and the setting that chip bonding pad is electrically connected in the setting of the second face of the chip
Have exposure again wiring layer opening protective film layer include:
In second wheat flour of chip for the first protective film layer, and make chip bonding pad opening by lithography；
Plating seed layer is formed in first protective film layer；
Plating mask or photoresist mask are formed on the plating seed layer, plating forms wiring layer again；
The second protective film is prepared on the wiring layer again, and makes the wiring layer again by lithography and is open.
Optionally, the first plastic packaging layer and the second plastic packaging layer material respective material are epoxy resin or epoxy organosilicon
Sundries or organosilicon.
Optionally, the soldered ball include gold solder ball, brazing ball, tin silver welded spheroid, tin silver copper soldered ball, tin-lead soldered ball, in copper post
One or any combination；
Wherein, the soldered ball is processed and to be formed by plating or plant ball or Reflow Soldering.
Optionally, the second plastic packaging layer for preparing around the soldered ball includes by the gap between soldered ball and soldered ball
Interior filling liquid, powder, granular plastic packaging material；
Or sheet plastic packaging material is placed on soldered ball, molding production is carried out using mold.
Optionally, respective heights are set as consistent or inconsistent to the second plastic packaging layer everywhere, and the second plastic packaging layer
Respective heights are no more than the height of soldered ball everywhere.
Large scale fan-out packaging structure provided in an embodiment of the present invention and method, mainly by fan-out packaging structure
On upper and lower surface equal plastic packaging form plastic packaging layer (respectively the first plastic packaging layer, the second plastic packaging layer) with balance capsulation material and chip with
And the unmatched influence of thermal expansion coefficient between wiring layer again, and then reduce the warpage of encapsulating structure；It can not only reduce and be fanned out to
The warpage of the encapsulating structure and encapsulating structure preparation process is simple, meanwhile, and notacoria structure is deposited used by the prior art
It compares, the method can not also increase the thickness of encapsulating structure in the performance for guaranteeing encapsulating structure.
Detailed description of the invention
Fig. 1 is the structural schematic diagram of large scale fan-out packaging structure in the prior art；
Fig. 2 is the structural schematic diagram of one embodiment of the invention large scale fan-out packaging structure；
Fig. 3 is the flow chart that one embodiment of the invention large scale is fanned out to packaging method；
Fig. 4 to Figure 15 is the flow chart that one embodiment of the invention large scale is fanned out to each preparation process in packaging method；
Wherein, 1000, encapsulating structure, 1010, plastic packaging layer, 1020, chip, 1021, chip bonding pad, 1030, protective film layer,
1040, re-wiring layer, 1050, ubm layer, 1060, soldered ball, 2000, encapsulating structure, the 2010, first plastic packaging layer,
2020, chip, 2021, chip bonding pad, 2030, protective film layer, 2040, wiring layer again, 2050, ubm layer, 2060, weldering
Ball, the 2070, second plastic packaging layer, 3000, encapsulating structure, the 3010, first support plate, the 3020, first cementing layer, 3030, chip,
3031, chip bonding pad, the 3040, first plastic packaging layer, the 3050, second support plate, the 3060, second cementing layer, the 3070, first protective film
Layer, 3080, plating seed layer, 3090, wiring layer again, the 3100, second protective film layer, 3110, ubm layer, 3120, weldering
Ball, the 3130, second plastic packaging layer.
Specific embodiment
In order to make the object, technical scheme and advantages of the embodiment of the invention clearer, below in conjunction with the embodiment of the present invention
In attached drawing, technical scheme in the embodiment of the invention is clearly and completely described, it is clear that described embodiment is only
It is only a part of the embodiment of the present invention, instead of all the embodiments.Based on the embodiments of the present invention, ordinary skill
Personnel's every other embodiment obtained without making creative work, shall fall within the protection scope of the present invention.
The embodiment of the present invention also provides a kind of large scale fan-out packaging structure, as shown in Fig. 2, the structure includes:
First plastic packaging layer 2010；
Chip 2020 in the first plastic packaging layer 2010 is set, and the first plastic packaging layer 2010 be covered in it is described
First face of chip 2020 and side；
Second face of the chip 2020 is set and is electrically connected to wiring layer 2040 again of chip bonding pad 2021, wherein
2,020 second face of chip is opposite with the first face；
Positioned at wiring layer 2040 again and it is provided with the exposure protective film layer 2030 that wiring layer is open again；
It is electrically connected in the opening of the protective film layer 2030 and by wiring layer 2040 again with the formation of chip bonding pad 2021
Ubm layer 2050；
Soldered ball 2060 on ubm layer 2050；
The second plastic packaging layer 2070 being set to around the soldered ball 2060；Wherein, the height of the second plastic packaging layer 2070
No more than soldered ball 2060 height and be covered in the part of the surface of soldered ball 2060.
Large scale fan-out packaging structure provided in an embodiment of the present invention is mainly by the upper of fan-out packaging structure 2000
On lower two sides equal plastic packaging form plastic packaging layer (respectively the first plastic packaging layer 2010, the second plastic packaging layer 2070) with balance capsulation material with
The unmatched influence of thermal expansion coefficient between chip 2020 and again wiring layer 2040, and then reduce sticking up for encapsulating structure 2000
It is bent；The warpage of fan-out packaging structure 2000 can not only be reduced and 2000 preparation process of the encapsulating structure is simple, meanwhile, and it is existing
There is deposition notacoria structure used by technology to compare, the method can not also increase in the performance for guaranteeing encapsulating structure 2000
Seal up the thickness of assembling structure 2000.
Optionally, the first plastic packaging layer 2010 and 2070 material respective material of the second plastic packaging layer are epoxy resin or ring
Oxygen organosilicon sundries or organosilicon.
Optionally, respective heights are set as consistent or inconsistent to the second plastic packaging layer 2070 everywhere, and second modeling
Sealing 2070 everywhere respective heights be no more than soldered ball 2060 height.
Optionally, the soldered ball 2060 includes gold solder ball, brazing ball, tin silver welded spheroid, tin silver copper soldered ball, tin-lead soldered ball, copper
One or any combination in column；
Wherein, the soldered ball 2060 is processed and to be formed by plating or plant ball or Reflow Soldering.
Optionally, the wiring layer again 2040 includes one or more layers.
The embodiment of the present invention provides a kind of large scale and is fanned out to packaging method, as shown in Figure 3, which comprises
S11, the pasting chip 3030 on the first support plate 3010；
S12, it in the first support plate 3010 and posts a face plastic packaging of chip 3030 and is formed and cover the first of the chip 3030
The first plastic packaging layer 3040 in face and side, and remove the first support plate 3010；
S13, the chip 3030 the second face setting be electrically connected to chip bonding pad 3031 wiring layer again 3090 and
It is provided with the exposure protective film layer that wiring layer 3090 is open again, wherein 3,030 second face of chip is opposite with the first face；
S14, ubm layer 3110 is formed in the opening of the protective film layer and is connect with wiring layer 3090 again；
S15, soldered ball 3120 is prepared on the ubm layer 3110；
S16, the second plastic packaging layer 3130 is prepared around the soldered ball 3120；Wherein, the height of the second plastic packaging layer 3130
Degree is no more than the height of soldered ball 3120 and is covered in the part of the surface of soldered ball 3120.
Large scale provided in an embodiment of the present invention is fanned out to packaging method mainly by the upper of fan-out packaging structure 3000
On lower two sides equal plastic packaging form plastic packaging layer (respectively the first plastic packaging layer 3040, the second plastic packaging layer 3130) with balance capsulation material with
The unmatched influence of thermal expansion coefficient between chip 3030 and again wiring layer 3090, and then reduce sticking up for encapsulating structure 3000
It is bent；The warpage of fan-out packaging structure 3000 can not only be reduced and 3000 preparation process of the encapsulating structure is simple, meanwhile, and it is existing
There is deposition notacoria structure used by technology to compare, the method can not also increase in the performance for guaranteeing encapsulating structure 3000
Seal up the thickness of assembling structure 3000.
Optionally, as shown in Fig. 4 to Figure 15, in the first support plate 3010 and a face plastic packaging shape of chip 3030 is posted described
It is described at the first plastic packaging layer 3040 in the first face and side for covering the chip 3030, and after the first support plate 3010 of removal
Method further include:
It is bonded by the second cementing layer 3060 with the second support plate 3050 in the first face of the first plastic packaging layer 3040；
Preferably, it is bonded by the second cementing layer 3060 with the second support plate 3050 when in the first face of the first plastic packaging layer 3040
When, then after preparing the second plastic packaging layer 3130 around soldered ball 3120 described, the method also includes:
Remove the second support plate 3050 and the second cementing layer 3060.
Optionally, the wiring layer again in the second face of the chip 3030 setting electrical connection chip bonding pad 3031
3090 and be provided with exposure again wiring layer opening protective film layer include:
In 2,020 second wheat flour of chip for the first protective film layer 3070, and make chip bonding pad opening by lithography；
Plating seed layer 3080 is formed in first protective film layer 3070；
Plating mask or photoresist mask are formed on the plating seed layer 3080, plating forms wiring layer 3090 again；
The second protective film 3100 is prepared on the wiring layer again, and is made the wiring layer again by lithography and be open.
Optionally, the first plastic packaging layer 3040 and 3130 material respective material of the second plastic packaging layer are epoxy resin or ring
Oxygen organosilicon sundries or organosilicon.
Optionally, the soldered ball 3120 includes gold solder ball, brazing ball, tin silver welded spheroid, tin silver copper soldered ball, tin-lead soldered ball, copper
One or any combination in column；
Wherein, the soldered ball 3120 is processed and to be formed by plating or plant ball or Reflow Soldering.
Optionally, the second plastic packaging layer 3130 for preparing around the soldered ball 3120 includes by soldered ball 3120 and weldering
Liquid, powder, granular plastic packaging material are inserted in gap between ball 3120；
Or sheet plastic packaging material is placed on soldered ball 3120, molding production is carried out using mold.
Optionally, respective heights are set as consistent or inconsistent to the second plastic packaging layer 3130 everywhere, and second modeling
Sealing 3130 everywhere respective heights be no more than soldered ball 3120 height.
For example, the method comprises the following steps for the present embodiment:
As shown in figure 4, form the first cementing layer 3020 on the first support plate 3010, the first cementing layer 3020 by spin coating,
The methods of spraying, pressing or printing production；First support plate, 3010 preferably clear material, bonding glue used is laser, UV irradiates can
Release liner；Multiple chips 3030 are fitted on the first cementing layer 3020, chip 3030 it is active down.
As shown in figure 5, forming the first plastic packaging layer by capsulation material in the one side that the first support plate 3010 posts chip 3030
3040, the first plastic packaging layer 3040 is covered in the first face and side of chip 3030, and has certain surplus thickness, is solidifying
There is certain structural strength afterwards.
As shown in fig. 6, first support plate 3010 is separated with there is core plastic sealed board, tears bonding open and be radiated at by laser or UV
It is carried out on transparent carrier plate.If having residue after tearing bonding open, can be removed by techniques such as cleanings.
As shown in fig. 7, the second cementing layer 3060 is formed on the second support plate 3050,3050 preferably clear material of the second support plate
Material, bonding glue used are laser, UV irradiation peelable material, will have the first face paste of core plastic sealed board together in the second cementing layer
3060.The use of second support plate 3050 can reduce the warpage for having core plastic sealed board, to reduce influence of the warpage to subsequent technique.
As shown in figure 8, the 3031 place face spin coating first layer protective film 3070 of chip bonding pad on having core plastic sealed board, and photoetching
Chip bonding pad is open out.
As shown in figure 9, forming plating seed layer 3080 on first layer protective film 3070.
As shown in Figure 10, photoresist exposure mask is formed on plating seed layer 3080, plating forms wiring layer 3090 again, and goes
Except photoresist exposure mask and unwanted plating seed layer 3080.
As shown in figure 11, the spin coating second layer protective film 3100 on wiring layer 3090 again, and make again wiring layer opening by lithography.
As shown in figure 12, ubm layer 3110 is made.Plating seed is formed on second layer protective film 3100 first
Layer 3080, forms photoresist exposure mask on plating seed layer 3080, and plating forms ubm layer 3110.
As shown in figure 13, on ubm layer 3110 make soldered ball 3120, soldered ball 3120 can by be electroplated, plant ball or
The techniques such as Reflow Soldering are formed.Being formed by soldered ball 3120 is brazing ball, tin silver welded spheroid, tin silver copper soldered ball, tin-lead soldered ball, copper post.
As shown in figure 14, the second plastic packaging layer 3130 is made by capsulation material in 3120 place face of soldered ball.Second plastic packaging layer
3130 are molded by placing plastic packaging piece on soldered ball 3120, or using mold, cured technique production.If need to be exposed
3120 part of soldered ball have the contamination of plastic packaging material, can be removed by techniques such as plasma etchings.
As shown in figure 15, second support plate 3050 is separated with encapsulating structure 3000.Separation is irradiated by laser or UV
It is carried out on the second transparent support plate 3050.If having residue after tearing bonding open, can be removed by techniques such as cleanings.
The method of the present embodiment can be used for preparing the technical solution of above structure embodiment, realization principle and technology
Effect is similar, and details are not described herein again.
The above description is merely a specific embodiment, but scope of protection of the present invention is not limited thereto, any
In the technical scope disclosed by the present invention, any changes or substitutions that can be easily thought of by those familiar with the art, all answers
It is included within the scope of the present invention.Therefore, protection scope of the present invention should be subject to the protection scope in claims.
Claims (12)
1. a kind of large scale fan-out packaging structure characterized by comprising
First plastic packaging layer；
Chip in the first plastic packaging layer is set, and the first plastic packaging layer is covered in the first face and side of the chip
Face；
Second face of the chip is set and is electrically connected to the wiring layer again of chip bonding pad, wherein second face of chip with
First face is opposite；
Positioned at wiring layer again and it is provided with the exposure protective film layer that wiring layer is open again；
The ubm layer being electrically connected is formed in the opening of the protective film layer and by wiring layer again with chip bonding pad；
Soldered ball on ubm layer；
The second plastic packaging layer being set to around the soldered ball；Wherein, the height of the second plastic packaging layer is no more than the height of soldered ball
And it is covered in the part of the surface of soldered ball.
2. structure according to claim 1, which is characterized in that the first plastic packaging layer material corresponding with the second plastic packaging layer material
Material is epoxy resin or epoxy organosilicon sundries or organosilicon.
3. structure according to claim 2, which is characterized in that respective heights are set as consistent to the second plastic packaging layer everywhere
Or it is inconsistent, and the second plastic packaging layer everywhere respective heights be no more than soldered ball height.
4. structure according to claim 1 to 3, which is characterized in that the soldered ball includes gold solder ball, brazing ball, Xi Yin
Soldered ball, tin silver copper soldered ball, tin-lead soldered ball, one or any combination in copper post；
Wherein, the soldered ball is processed and to be formed by plating or plant ball or Reflow Soldering.
5. structure according to claim 1 to 4, which is characterized in that the wiring layer again includes one or more layers.
6. a kind of large scale is fanned out to packaging method characterized by comprising
The pasting chip on the first support plate；
In the first support plate and the face plastic packaging that posts chip forms the first plastic packaging layer in the first face and side that cover the chip,
And remove the first support plate；
In the second face of the chip, setting is electrically connected to the wiring layer again of chip bonding pad and is provided with exposed wiring layer again and opens
The protective film layer of mouth, wherein second face of chip is opposite with the first face；
Ubm layer is formed in the opening of the protective film layer and is connect with wiring layer again；
Soldered ball is prepared on the ubm layer；
The second plastic packaging layer is prepared around the soldered ball；Wherein, the height of the second plastic packaging layer be no more than soldered ball height and
It is covered in the part of the surface of soldered ball.
7. according to the method described in claim 6, it is characterized in that, in the first support plate and posting a face plastic packaging of chip described
The first plastic packaging layer in the first face and side that cover the chip is formed, and after the first support plate of removal, the method also includes:
It is bonded by the second cementing layer with the second support plate in the first face of the first plastic packaging layer；
Preferably, it when being bonded by the second cementing layer with the second support plate in the first face of the first plastic packaging layer, is then being welded described
After preparing the second plastic packaging layer around ball, the method also includes:
Remove the second support plate and the second cementing layer.
8. method according to claim 6 or 7, which is characterized in that electrical connection is arranged in second face in the chip
To chip bonding pad wiring layer again and be provided with exposure again wiring layer opening protective film layer include:
In second wheat flour of chip for the first protective film layer, and make chip bonding pad opening by lithography；
Plating seed layer is formed in first protective film layer；
Plating mask or photoresist mask are formed on the plating seed layer, plating forms wiring layer again；
The second protective film is prepared on the wiring layer again, and makes the wiring layer again by lithography and is open.
9. according to method as claimed in claim 6 to 8, which is characterized in that the first plastic packaging layer and the second plastic packaging layer material
Respective material is epoxy resin or epoxy organosilicon sundries or organosilicon.
10. according to any method of claim 6-9, which is characterized in that the soldered ball includes gold solder ball, brazing ball, tin
Silver welded spheroid, tin silver copper soldered ball, tin-lead soldered ball, one or any combination in copper post；
Wherein, the soldered ball is processed and to be formed by plating or plant ball or Reflow Soldering.
11. according to any method of claim 6-10, which is characterized in that second modeling of the preparation around the soldered ball
Sealing includes by inserting liquid, powder, granular plastic packaging material in the gap between soldered ball and soldered ball；
Or sheet plastic packaging material is placed on soldered ball, molding production is carried out using mold.
12. the method according to claim 6 or 11, which is characterized in that respective heights are arranged the second plastic packaging layer everywhere
To be consistent or inconsistent, and the second plastic packaging layer everywhere respective heights be no more than soldered ball height.
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| CN201910116418.1A CN109860126A (en) | 2019-02-13 | 2019-02-13 | A kind of large scale fan-out packaging structure and method |
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| CN201910116418.1A CN109860126A (en) | 2019-02-13 | 2019-02-13 | A kind of large scale fan-out packaging structure and method |
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Cited By (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110534435A (en) * | 2019-08-01 | 2019-12-03 | 广东佛智芯微电子技术研究有限公司 | The packaging method of the heterogeneous integrated fan-out package structure of 3-D multi-chip |
| CN110648924A (en) * | 2019-09-04 | 2020-01-03 | 广东芯华微电子技术有限公司 | Large-board fan-out type chip packaging structure and manufacturing method thereof |
| CN110828407A (en) * | 2019-11-19 | 2020-02-21 | 华进半导体封装先导技术研发中心有限公司 | SiP packaging structure and preparation method thereof |
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| CN112786462B (en) * | 2020-12-25 | 2023-08-22 | 上海易卜半导体有限公司 | Semiconductor packaging method, semiconductor assembly and electronic device comprising semiconductor assembly |
| CN112786462A (en) * | 2020-12-25 | 2021-05-11 | 上海易卜半导体有限公司 | Semiconductor packaging method, semiconductor assembly and electronic equipment comprising semiconductor assembly |
| CN112885727A (en) * | 2021-01-19 | 2021-06-01 | 济南南知信息科技有限公司 | Chip integrated circuit package and manufacturing method thereof |
| CN113643990B (en) * | 2021-06-29 | 2024-01-16 | 华宇华源电子科技（深圳）有限公司 | Board-level packaging method and structure for improving device strength |
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