CN108257882A - The method of stress release in device encapsulation structure and encapsulation process - Google Patents

The method of stress release in device encapsulation structure and encapsulation process Download PDF

Info

Publication number
CN108257882A
CN108257882A CN201810045602.7A CN201810045602A CN108257882A CN 108257882 A CN108257882 A CN 108257882A CN 201810045602 A CN201810045602 A CN 201810045602A CN 108257882 A CN108257882 A CN 108257882A
Authority
CN
China
Prior art keywords
stress release
plastic packaging
packaging layer
packaged
load bearing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201810045602.7A
Other languages
Chinese (zh)
Inventor
杨天伦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
China Core Integrated Circuit Ningbo Co Ltd
Original Assignee
China Core Integrated Circuit Ningbo Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by China Core Integrated Circuit Ningbo Co Ltd filed Critical China Core Integrated Circuit Ningbo Co Ltd
Priority to CN201810045602.7A priority Critical patent/CN108257882A/en
Publication of CN108257882A publication Critical patent/CN108257882A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157Partial encapsulation or coating
    • H01L23/3171Partial encapsulation or coating the coating being directly applied to the semiconductor body, e.g. passivation layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157Partial encapsulation or coating
    • H01L23/3185Partial encapsulation or coating the coating covering also the sidewalls of the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/562Protection against mechanical damage
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93Batch processes
    • H01L2224/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/96Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

The present invention provides a kind of method of stress release in device encapsulation structure and encapsulation process, device packaging method includes:One load bearing component is provided, multiple unit intervals to be packaged are fixed on the load bearing component;Plastic packaging layer is formed on the load bearing component, the plastic packaging layer covers the load bearing component and the unit to be packaged;Multiple stress release openings are formed on the plastic packaging layer, the stress release opening can discharge the stress inside the plastic packaging layer, reduce the angularity after unit plastic packaging to be packaged, subsequent technique to be facilitated to make, so as to be suitble to scale of mass production, and at the same time improving the quality and performance of device encapsulation structure.

Description

The method of stress release in device encapsulation structure and encapsulation process
Technical field
The present invention relates to technical field of semiconductors, and in particular to stress is released in a kind of device encapsulation structure and encapsulation process The method put.
Background technology
Wafer-level packaging (Wafer Level Packaging, WLP) technology is after being packaged test to whole wafer Cut to obtain the technology of single finished product chip again, complied with market to microelectronic product increasingly light, small, short, thinning and low priceization It is required that.Chip size after Wafer level packaging encapsulates, which has reached, to be highly miniaturized, and chip cost is with chip size Reduce the increase with wafer size and significantly reduce, be the hot spot in current encapsulation field and the trend of future development.
When carrying out wafer level packaging, during especially fan-out-type wafer level packaging (FOWLP), in the supporting part for being formed with cementing layer Then chip placement on part carries out plastic packaging to load bearing component, form plastic-sealed body, pass through ultraviolet light or the side of heating later Method makes cementing layer lose viscosity, and plastic-sealed body is discharged from wafer, forms wafer packaging structure.But after wafer plastic packaging very Warpage easily occurs, may cause subsequent technique that can not carry out or subsequent technique is needed to carry out specially treated, adjustment, and then Influence the quality and performance of encapsulation finished product.
Invention content
The purpose of the present invention is to provide a kind of methods of stress release in device encapsulation structure and encapsulation process, pass through Stress release opening release plastic packaging layer inside stress, avoid plastic packaging layer occur warpage, improve device encapsulation structure quality and Performance.
To achieve the above object, the method that the present invention provides stress release in a kind of device encapsulation process, including following step Suddenly:
One load bearing component is provided, multiple unit intervals to be packaged are fixed on the load bearing component;
Form plastic packaging layer on the load bearing component, the plastic packaging layer covers the load bearing component and described to be packaged Unit;
Multiple stress release openings, the stress release opening and the unit to be packaged are formed on the plastic packaging layer Different location on the plastic packaging layer.
Optionally, the stress release opening is formed on the plastic packaging layer using die methods.
Optionally, the stress release opening is formed on the plastic packaging layer using the method for etching.
Optionally, the stress release opening is through-hole or isolation channel.
Optionally, multiple isolation channels along the first direction or/and second direction extension, the first direction with it is described Second direction is vertical.
Optionally, before multiple unit intervals to be packaged are fixed on the load bearing component, the device packaging method It further includes:Cementing layer is formed on the load bearing component.
Optionally, the stress release opening exposes the cementing layer through the plastic packaging layer.
Optionally, it is formed on the plastic packaging layer after multiple stress release openings, the device packaging method also wraps It includes:Stress release opening is filled, and planarized.
Optionally, stress release opening is filled, and after being planarized, the device packaging method It further includes:Remove the load bearing component.
Correspondingly, the present invention also provides a kind of device encapsulation structure, including:
One load bearing component;
Multiple units to be packaged, the unit interval to be packaged are fixed on the load bearing component;
Plastic packaging layer, the plastic packaging layer cover the load bearing component and the unit to be packaged;
Multiple stress releases opening, the stress release opening are located on the plastic packaging layer, and with the unit to be packaged At the different location of the plastic packaging layer.
Optionally, the stress release opening is through-hole or isolation channel.
Optionally, multiple isolation channels along the first direction or/and second direction extension, the first direction with it is described Second direction is vertical.
Optionally, the device encapsulation structure further includes:Cementing layer, the cementing layer are located at the load bearing component and institute It states between unit to be packaged, the plastic packaging layer.
Optionally, the stress release opening exposes the cementing layer through the plastic packaging layer.
Optionally, the device encapsulation structure further includes:Filled layer, the filled layer fill up the stress release opening.
Compared with prior art, in device encapsulation structure provided by the invention and encapsulation process in the method for stress release, Multiple unit intervals to be packaged are fixed on load bearing component, plastic packaging layer is formed on the load bearing component, the plastic packaging layer covers The load bearing component and the unit to be packaged are covered, multiple stress release openings, the stress are then formed on plastic packaging layer Release opening can discharge the stress inside the plastic packaging layer, reduce the angularity after unit plastic packaging to be packaged, follow-up to facilitate Technique makes, so as to be suitble to scale of mass production, and at the same time improving the quality and performance of device encapsulation structure.
Description of the drawings
Fig. 1 a~1c are each step structure diagram of a device packaging method.
The flow chart of the method for stress release in the device encapsulation process that Fig. 2 is provided by one embodiment of the invention.
Each step of the method for stress release in the device encapsulation process that Fig. 3 a~3e are provided by one embodiment of the invention Structure diagram.
Distribution schematic diagrams of the Fig. 4 by the through-hole that one embodiment of the invention provides on the plastic packaging layer.
Distribution schematic diagrams of the Fig. 5 by the isolation channel that one embodiment of the invention provides on the plastic packaging layer.
Fig. 6 is by the through-hole that one embodiment of the invention provides and distribution schematic diagram of the isolation channel on the plastic packaging layer.
Specific embodiment
Fig. 1 a~1c are each step structure diagram of a device packaging method.As shown in Fig. 1 a~Fig. 1 c, the device Packaging method includes the following steps:First:One load bearing component 10 is provided, a cementing layer 20 is formed on the load bearing component 10, Then multiple intervals of unit 30 to be packaged are fixed on the cementing layer 20.Secondly, plastic packaging is formed on the cementing layer 20 Layer 40, the plastic packaging layer 40 covers the cementing layer 20 and the unit 30 to be packaged.Finally, pass through ultraviolet light, heating Or other methods make cementing layer 20 lose viscosity, remove the load bearing component 10 and the cementing layer 20, ultimately form device envelope Assembling structure.However, since each material in device encapsulation structure has characteristic of expanding with heat and contract with cold, it can generating body under temperature action Product variation, generates strain;When the strain of device encapsulation structure is influenced by coefficient of thermal expansion difference between each component part When being unable to Free Development, stress will be generated, thus the buckling deformation of generating device encapsulating structure, as illustrated in figure 1 c.
In view of the above-mentioned problems, the method that present inventor provides stress release in a kind of device encapsulation process, including with Lower step:One load bearing component is provided, multiple unit intervals to be packaged are fixed on the load bearing component;In the supporting part Plastic packaging layer is formed on part, the plastic packaging layer covers the load bearing component and the unit to be packaged;The shape on the plastic packaging layer It is open into multiple stress releases, the stress release opening is located at the different positions on the plastic packaging layer from the unit to be packaged It puts.
In device encapsulation process provided by the invention in the method for stress release, multiple unit intervals to be packaged are fixed In on load bearing component, plastic packaging layer is formed on the load bearing component, the plastic packaging layer covers the load bearing component and described treats Encapsulation unit, then forms multiple stress release openings on plastic packaging layer, and the stress release opening can discharge the plastic packaging Stress inside layer, reduces the angularity after unit plastic packaging to be packaged, extensive so as to be suitble to subsequent technique to be facilitated to make Volume production, and at the same time improving the quality and performance of device encapsulation structure.
To make present disclosure more clear and easy to understand, below in conjunction with Figure of description, present disclosure is done into one Walk explanation.Certainly the invention is not limited to the specific embodiment, and general replacement well known to the skilled artisan in the art is also contained Lid is within the scope of the present invention.
Secondly, the present invention has carried out detailed statement using schematic diagram, when present example is described in detail, for the ease of saying Bright, schematic diagram is not partially enlarged in proportion to the general scale, should not be to this restriction as the present invention.
It please refers to Fig.2, the stream of the method for stress release in the device encapsulation process provided by one embodiment of the invention Cheng Tu.As shown in Fig. 2, the method that the present invention provides stress release in a kind of device encapsulation process, includes the following steps:
Step S100:One load bearing component is provided, multiple unit intervals to be packaged are fixed on the load bearing component;
Step S200:Plastic packaging layer is formed on the load bearing component, the plastic packaging layer covers the load bearing component and institute State unit to be packaged;
Step S300:Multiple stress release openings are formed on the plastic packaging layer, the stress release opening is treated with described Encapsulation unit is located at the different location on the plastic packaging layer.
Each step of the method for stress release in the device encapsulation process that Fig. 3 a~3e are provided by one embodiment of the invention Structure diagram, please refer to Fig.2 shown in, and combine Fig. 3 a~3e, by taking the method for stress release during wafer level packaging as an example, The device packaging method that the present invention will be described in detail proposes:
In the step s 100, a load bearing component 100 is provided, the carrying is fixed at multiple intervals of unit 300 to be packaged On component 100, structure as shown in Figure 3a is formed.
In the present embodiment, the bearing part 100 is plate, and the load bearing component 100 can be full wafer wafer substrate, Optionally, the load bearing component 100 is glass substrate, can provide preferable hardness and flatness, reduce the mistake of packaging Effect ratio, also, since the load bearing component 100 can be removed in subsequent steps, the load bearing component of glass material is easy-peel It is strong from, resistance to corrosion, the change of physically or chemically performance will not occur because of the contact subsequently with cementing layer, therefore can With recycling.Certainly, the load bearing component 100 can also be sapphire substrate or silicon substrate substrate or people in the art Other known substrates of member, the present invention do not limit this.Optionally, the shape of the load bearing component 100 can be it is round, Rectangle, triangle or other shapes, the present invention is not defined the shape of the load bearing component 100 equally, only with circle It is illustrated for load bearing component.
Cementing layer 200 is formed on the load bearing component 100, the cementing layer 200 is used to glue device 300 to be packaged It connects and is fixed on the load bearing component 100.The cementing layer 200 can be organic material or composite material, can pass through rotation The modes such as painting, spraying, rolling, printing, vacuum pressing-combining or pressure fitting are coated on the load bearing component 100.The present invention one In preferred embodiment, the cementing layer 200 uses UV glue.UV glue be it is a kind of the ultraviolet light of special wavelength can be generated it is anti- The glueing material answered, viscosity is very high when being irradiated without ultraviolet light, and its viscosity declines to a great extent or disappears after ultraviolet light It loses.
Then, multiple intervals of unit 300 to be packaged are fixed on the cementing layer 200, the unit 300 to be packaged It can be chip or passive device or can be chip and passive device, need to be selected according to actual conditions It selects.For the passive device including but not limited to capacitance, inductance, resistance etc., the chip can also be the core for having different function Piece.The chip includes front and the back side being correspondingly arranged with front, and the front of chip could be formed with to be connected with external circuit The electrode structure connect, when chip is fixed on the load bearing component 100, the back side of the chip is towards close to the carrying The direction of component 100, front are directed away from the direction of the load bearing component 100, the electricity on the front and front of exposed chip Pole structure.
In step s 200, plastic packaging layer 400 is formed on the load bearing component 100, the plastic packaging layer 400 covers described Load bearing component 100 and the unit to be packaged 300, as shown in Figure 3b.
The load bearing component 100 for being fixed with unit 300 to be packaged is subjected to plastic packaging and is cured, forms plastic packaging layer 400, it is described Plastic packaging layer 400 covers the load bearing component 100 and the unit to be packaged 300.Using pressure plastic package process or Shooting Technique Plastic packaging is carried out, the material of the plastic packaging layer 203 is preferably epoxy resin.
Since the plastic packaging layer 400 is different from the thermal contraction ratio of described 100 two kinds of materials of load bearing component, cause described 400 internal stress of plastic packaging layer is uneven, and then leads to buckling deformation occur, and then influence in the subsequent process of device encapsulation Encapsulate the quality of finished product.Therefore, the present invention then performs step S300.
In step S300, multiple stress release openings 500 are formed on the plastic packaging layer 400, the stress release is opened Mouth 500 is located at the different location on the plastic packaging layer 100 with the unit 300 to be packaged, as shown in Figure 3c.
Die methods may be used and form stress release opening 500 on the plastic packaging layer 400, i.e., manufacture with it is described The identical mold of stress release 500 sizes of opening, by plastic packaging layer 400 described in mold compresses, the shape on the plastic packaging layer 400 Into stress release opening 500, which the plastic packaging layer 400 can carry out after plastic packaging before curing, and can also cure It carries out, can be selected according to physical condition later.
The method of physics or/and chemical etching can also be used to form the stress release on the plastic packaging layer 400 to open Mouth 500.For example, the coating photoresist layer on the plastic packaging layer 400, by exposure and development, forms patterned photoresist Layer exposes the predetermined plastic packaging layer 400 for forming through hole, then carries out ion bombardment to the plastic packaging layer exposed, Stress release opening is formed in the plastic packaging layer 400 by the method for physics or uses and can occur with plastic packaging layer 400 The etching gas or liquid of reaction perform etching, and stress release opening are formed in the plastic packaging layer 400, finally by ashing Technique removes the patterned photoresist layer.
The stress release opening 500 is through-hole or isolation channel, i.e., multiple stress release openings 500 are through-hole, Or multiple stress release openings 500 are that isolation channel or a part of stress release are open 500 as through-hole, it is another The part stress release opening 500 is isolation channel.The stress release opening 500 is located at institute with the unit 300 to be packaged It at the different location for stating plastic packaging layer 400, please refers to shown in Fig. 4, the stress release opening 500 is located at the unit to be packaged Gap location between 300 and positioned at the edge of the plastic packaging layer 400, the unit 300 to be packaged and the stress release Opening 500 is uniformly distributed in the plastic packaging layer 400.The stress release opening 500 can be discharged in the plastic packaging layer 400 The stress in portion reduces the angularity after unit plastic packaging to be packaged, improves the quality and performance of device encapsulation structure.
Please continue to refer to shown in Fig. 4, the stress release opening 500 is through-hole, i.e., described stress release opening 500 is in Poroid, the cross section of the through-hole can be the shapes such as round, triangle or quadrangle, and the longitudinal section of the through-hole can be U The cross section and longitudinal section of the shapes such as type, V-type or the through-hole can be shape well known by persons skilled in the art.It is described Gap location of the through-hole between the unit 300 to be packaged, therefore, the aperture of the through-hole is less than adjacent described to be packaged Spacing between unit 300.For example, it is assumed that spacing between the adjacent unit 300 to be packaged is 100 μm, then the through-hole Aperture be less than 100 μm, such as can be 90 μm, 80 μm or 70 μm.It is understood that in the adjacent list to be packaged Member 300 between can also form multiple through-holes (illustrating only one in Fig. 4), such as can be formed two, three or More through-holes, when two through-holes are formed between the adjacent unit 300 to be packaged, the sum of aperture of two through-holes The spacing being less than between the adjacent unit 300 to be packaged, when the spacing between the adjacent unit 300 to be packaged is 100 μm, the aperture of the through-hole can be 40 μm, 30 μm or 20 μm, and must also have centainly between two through-holes Spacing, such as 10 μm, which is determined by the material of the plastic packaging layer 400 and the forming method of through-hole.It is not influencing subsequently In the case of technique, the quantity of the through-hole is The more the better.The aperture of the through-hole and density are by the unit 300 to be packaged The conditions such as size, the material of the spacing between the unit 300 to be packaged or the plastic packaging layer 400 determine that the present invention is right This is not limited.
It please referring to shown in Fig. 5, the stress release opening 500 is isolation channel, and the isolation channel is in strip, perpendicular to The cross section on direction where the plastic packaging layer surface can be the shapes such as round, triangle or quadrangle.The isolation channel It can extend in same direction, can also extend in different directions.That is, it is formed on the plastic packaging layer 400 more A isolation channel.Gap location of the isolation channel between the unit 300 to be packaged and positioned at the plastic packaging layer 400 Edge, the isolation channel can discharge the stress inside the plastic packaging layer 400, can avoid encapsulating structure that warpage occurs, and improve The quality and performance of device encapsulation structure.
Optionally, as shown in figure 5, in the present embodiment, each isolation channel along the first direction X or second direction Y Extension has phase along the isolation channel that the first direction X extends with the isolation channel extended along the second direction Y At friendship.The first direction X and the second direction Y are perpendicular, and the first direction X and second direction Y is treated to be described The orientation of encapsulation unit 300, i.e., in the present embodiment, the unit 300 to be packaged along the first direction X with it is described Second direction Y is regularly arranged, the first direction X and the second direction Y be respectively horizontal direction shown in fig. 5 with it is vertical Direction.
In the present embodiment, a part of isolation channel extends along the first direction X, isolation channel edge described in another part The second direction Y extensions, the isolation channel is respectively positioned on the gap location between the adjacent unit 300 to be packaged, in adjacent institute An isolation channel or a plurality of isolation channel can be provided with by stating the gap location between unit 300 to be packaged, in Figure 5 adjacent institute It states the gap location between unit 300 to be packaged and is provided only with an isolation channel.The width of the isolation channel is (if the isolation channel X extends along the first direction, then the width is size of the isolation channel on second direction Y) less than waiting to seal described in adjacent Fill the spacing between unit 300.Such as:Assuming that the spacing between the adjacent unit 300 to be packaged is 100 μm, set in it When being equipped with an isolation channel, the width of the isolation channel is less than 100 μm, such as can be 90 μm, 80 μm or 70 μm.At it When being inside provided with the isolation channel of two or more, the width of multiple isolation channels is less than the adjacent unit 300 to be packaged Between spacing, and must also have certain spacing between multiple isolation channels, such as 10 μm, the spacing is by described The material of plastic packaging layer 400 or the forming method of the isolation channel determine.In the case where not influencing subsequent technique, the isolation The quantity of slot is The more the better.The width of the isolation channel and density by the unit 300 to be packaged size, described to be packaged The conditions such as the material of spacing or the plastic packaging layer 400 between unit 300 determine that the present invention does not limit this.
Optionally, the isolation channel can run through the encapsulated layer so that the release of stress is more abundant.In other realities It applies in example, the unit 300 to be packaged can also be arranged along other directions, such as edge and horizontal direction shown in fig. 5 are in 45 degree The direction arrangement at angle, then the orientation of the isolation channel is also in 45 degree of angles with horizontal direction.The present invention does not limit this It is fixed.
In other embodiments, the isolation channel can also only along the first direction X or only in a second direction Y extension or It can also extend along other directions, can be selected according to practical demand.
It please referring to shown in Fig. 6, stress release opening can also be the through-hole 501 of part and part isolation channel 502, Form multiple through-holes 501 and a plurality of isolation channel 502 on the plastic packaging layer 400, the isolation channel 502 can be along identical Direction extends, and can also extend in different directions.The through-hole 501 is formed i.e. on the plastic packaging layer 400, is also formed The isolation channel 502, the through-hole 501 is positioned at the outer of the unit 300 to be packaged not surrounded by the isolation channel 502 It encloses.As described above, the aperture of the through-hole 501, the width of the isolation channel 502 and the through-hole 501, isolation channel 502 Density is by the spacing between the size of the unit 300 to be packaged, the unit 300 to be packaged or the plastic packaging layer The conditions such as 400 material determine that the present invention does not limit this.The through-hole 501 discharges simultaneously with the isolation channel 502 Stress inside the plastic packaging layer 400 can avoid encapsulating structure that warpage occurs, and improve the quality and property of device encapsulation structure Energy.
In the present embodiment, the isolation channel 502 along the first direction X and second direction Y extension, the first direction X with The second direction Y is perpendicular.In other embodiments, the isolation channel 502 can also only along the first direction X or only along Two direction Y extend or can also extend along other directions, can be selected according to practical demand.
According to the above, multiple through-holes can be formed on the plastic packaging layer 400, can also be formed multiple along identical Or the isolation channel of different directions extension, multiple through-holes and multiple isolation extended along identical or different direction can also be formed Slot.The position of the through-hole and/or the isolation channel can encapsulate knot according to practical situation and the device being collected into before The data of buckling deformations occur for structure to determine, the present invention is only illustrated with separate embodiment, and position distribution is not limited It is fixed.
In addition, it is necessary to which explanation, the through-hole or the isolation channel can run through the plastic packaging layer 400, institute is exposed State cementing layer 200, i.e., the depth of described through-hole or the isolation channel is equal to the thickness of the plastic packaging layer 400.It is alternatively, described logical Hole or the isolation channel are located in the plastic packaging layer 400, do not expose the cementing layer 200, i.e., described through-hole or it is described every Depth from slot is less than the thickness of the plastic packaging layer 400.
Then, continue subsequent processing step, if follow-up process has demand, alternatively, the stress release is open 500 presence causes influence to subsequent technique, then stress release opening 500 can be filled again, in institute It states in stress release opening and forms filled layer 600, form structure as shown in Figure 3d, for example, selection is consistent with plastic packaging layer 400 Material refill stress release opening 500 or remaining capsulation material can also be used to carry out second of plastic packaging Technique, optionally, the material of the filled layer 600 and the material of the plastic packaging layer 400 differ, and the filled layer 600 The coefficient of expansion of material is close or identical with the substrate 100.Finally, chemistry or/and physical machine can be carried out as needed Tool grinds to obtain the thickness and flatness of the need.
Then, the load bearing component 100 and the cementing layer 200 are removed, forms device encapsulation knot as shown in Figure 3 e Structure.By way of ultraviolet light or heating, the viscosity reduction or viscosity that make the cementing layer 200 disappear, so as to remove The load bearing component 100 and cementing layer 200.Due to foring stress release opening, the plastic packaging layer 400 on plastic packaging layer 400 Internal stress is discharged, therefore can reduce the angularity of device encapsulation structure, improves the matter of device encapsulation structure Amount and performance.
Correspondingly, the present invention also provides a kind of device encapsulation structure, please refer to Fig.3 shown in c and Fig. 4~Fig. 6, it is described Device encapsulation structure includes:
One load bearing component 100;
Multiple units to be packaged 300, the interval of unit 300 to be packaged are fixed on the load bearing component 100;
Plastic packaging layer 400, the plastic packaging layer 400 cover the load bearing component 100 and the unit to be packaged 300;
Multiple stress releases opening 500, the stress release opening 500 are located on the plastic packaging layer 400, and with it is described Unit 300 to be packaged is located at the different location of the plastic packaging layer 400.
Further, shown in please referring to Fig.4, the stress release opening 500 is through-hole, i.e., described stress release opening 500 be in poroid, and the cross section of the through-hole can be the shapes such as round, triangle or quadrangle, and the longitudinal section of the through-hole can Think that the cross section of the shapes such as U-shaped, V-type or the through-hole and longitudinal section can be shape well known by persons skilled in the art Shape.
Further, it please referring to shown in Fig. 5, the stress release opening 500 is isolation channel, and the isolation channel is in strip, Its cross section on the direction where the plastic packaging layer surface can be the shapes such as round, triangle or quadrangle.Institute Isolation channel is stated in same direction or in different directions to extend.Optionally, isolation channel X or/and along the first direction Two direction Y extend, and the first direction X and the second direction Y are perpendicular.
Further, it please refers to shown in Fig. 6, the stress release opening 600 can also be through-hole 501 and the portion of part Divide isolation channel 502, the isolation channel 502 extends in same direction or in different directions.Optionally, the isolation channel 502 X and second direction Y extensions along the first direction, the first direction X and the second direction Y are perpendicular.I.e. in the modeling Multiple through-holes 501 and a plurality of isolation channel 502 are formed on sealing 400.
Further, cementing layer 200 is also formed on the load bearing component 100, the unit 300 to be packaged is spaced It is fixed on the cementing layer 200, the plastic packaging layer 400 covers the cementing layer 200 and the unit 300 to be packaged.
Optionally, the stress release opening 500 exposes the cementing layer 200 through the plastic packaging layer 400.
The stress release opening 500 can discharge the stress inside the plastic packaging layer 400, thus reduce device encapsulation The angularity of structure improves the quality and performance of device encapsulation structure.It subsequently can also be by filled layer according to the demand of processing procedure It fills the full stress release opening 500 and finally removes the load bearing component 100 and the cementing layer 200, therefore, this The device encapsulation structure that invention provides is a kind of encapsulating structure formed in intermediate steps.
In conclusion in device encapsulation structure provided by the invention and encapsulation process in the method for stress release, it will be multiple Unit interval to be packaged is fixed on load bearing component, the formation plastic packaging layer on the load bearing component, described in the plastic packaging layer covering Load bearing component and the unit to be packaged, then form multiple stress release openings on plastic packaging layer, and the stress release is opened Mouth can discharge the stress inside the plastic packaging layer, reduce the angularity after unit plastic packaging to be packaged, to facilitate subsequent technique system Make, so as to be suitble to scale of mass production, and at the same time improving the quality and performance of device encapsulation structure.
Foregoing description is only the description to present pre-ferred embodiments, not to any restriction of the scope of the invention, this hair Any change, the modification that the those of ordinary skill in bright field does according to the disclosure above content, belong to the protection of claims Range.

Claims (15)

1. a kind of method of stress release in device encapsulation process, which is characterized in that include the following steps:
One load bearing component is provided, multiple unit intervals to be packaged are fixed on the load bearing component;
Plastic packaging layer is formed on the load bearing component, the plastic packaging layer covers the load bearing component and the unit to be packaged;
Multiple stress release openings are formed on the plastic packaging layer, the stress release opening is located at institute with the unit to be packaged State the different location on plastic packaging layer.
2. the method for stress release in device encapsulation process as described in claim 1, which is characterized in that using die methods in institute It states and the stress release opening is formed on plastic packaging layer.
3. the method for stress release in device encapsulation process as described in claim 1, which is characterized in that using the method for etching The stress release opening is formed on the plastic packaging layer.
4. the method for stress release in device encapsulation process as described in claim 1, which is characterized in that the stress release is opened Mouth is through-hole or isolation channel.
5. the method for stress release in device encapsulation process as claimed in claim 4, which is characterized in that multiple isolation channels Along the first direction or/and second direction extension, the first direction are vertical with the second direction.
6. the method for stress release in device encapsulation process as described in claim 1, which is characterized in that by multiple lists to be packaged Before member interval is fixed on the load bearing component, the device packaging method further includes:Glue is formed on the load bearing component Close layer.
7. the method for stress release in device encapsulation process as claimed in claim 6, which is characterized in that the stress release is opened Mouth exposes the cementing layer through the plastic packaging layer.
8. such as the method for stress release in device encapsulation process according to any one of claims 1 to 7, which is characterized in that It is formed on the plastic packaging layer after multiple stress release openings, the device packaging method further includes:The stress release is opened Mouth is filled, and planarized.
9. the method for stress release in device encapsulation process as described in any of claims 8, which is characterized in that described Stress release opening is filled, and after being planarized, and the device packaging method further includes:Remove the supporting part Part.
10. a kind of device encapsulation structure, which is characterized in that including:
One load bearing component;
Multiple units to be packaged, the unit interval to be packaged are fixed on the load bearing component;
Plastic packaging layer, the plastic packaging layer cover the load bearing component and the unit to be packaged;
Multiple stress release openings, the stress release opening are located on the plastic packaging layer, and be located at the unit to be packaged At the different location of the plastic packaging layer.
11. device encapsulation structure as claimed in claim 10, which is characterized in that the stress release opening is through-hole or isolation Slot.
12. device encapsulation structure as claimed in claim 11, which is characterized in that multiple isolation channels along the first direction or/ Extend with second direction, the first direction is vertical with the second direction.
13. device encapsulation structure as claimed in claim 10, which is characterized in that the device encapsulation structure further includes:It is glued Layer, the cementing layer is between the load bearing component and the unit to be packaged, the plastic packaging layer.
14. device encapsulation structure as claimed in claim 13, which is characterized in that the stress release opening is through the plastic packaging Layer, exposes the cementing layer.
15. device encapsulation structure as claimed in claim 14, which is characterized in that the device encapsulation structure further includes:Filling Layer, the filled layer fill up the stress release opening.
CN201810045602.7A 2018-01-17 2018-01-17 The method of stress release in device encapsulation structure and encapsulation process Pending CN108257882A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201810045602.7A CN108257882A (en) 2018-01-17 2018-01-17 The method of stress release in device encapsulation structure and encapsulation process

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201810045602.7A CN108257882A (en) 2018-01-17 2018-01-17 The method of stress release in device encapsulation structure and encapsulation process

Publications (1)

Publication Number Publication Date
CN108257882A true CN108257882A (en) 2018-07-06

Family

ID=62740915

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201810045602.7A Pending CN108257882A (en) 2018-01-17 2018-01-17 The method of stress release in device encapsulation structure and encapsulation process

Country Status (1)

Country Link
CN (1) CN108257882A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110553885A (en) * 2019-10-14 2019-12-10 长江存储科技有限责任公司 Method for preparing test sample by FIB and test sample
CN111128765A (en) * 2019-12-10 2020-05-08 广东佛智芯微电子技术研究有限公司 Method for reducing fan-out type packaging stress and plastic packaging mold applied by same
CN111370431A (en) * 2018-12-26 2020-07-03 中芯集成电路(宁波)有限公司 Packaging method of photoelectric sensing integrated system
CN112117194A (en) * 2019-06-20 2020-12-22 矽磐微电子(重庆)有限公司 Manufacturing method of chip packaging structure
US10957629B2 (en) 2018-07-10 2021-03-23 Samsung Electronics Co., Ltd. Semiconductor package
CN112992670A (en) * 2019-12-16 2021-06-18 山东有研半导体材料有限公司 Method for reducing stress of silicon-based back-sealed polishing sheet
CN113299564A (en) * 2021-05-21 2021-08-24 广东佛智芯微电子技术研究有限公司 Packaging structure of board-level fan-out flexible packaging substrate and preparation method thereof
CN114055711A (en) * 2021-11-18 2022-02-18 江苏芯德半导体科技有限公司 Chip plastic package mold and secondary plastic package process method thereof

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200910471A (en) * 2007-08-17 2009-03-01 Chipmos Technologies Inc A dice rearrangement package method
CN201994277U (en) * 2011-01-30 2011-09-28 南通富士通微电子股份有限公司 Wafer packaging structure
US20120086003A1 (en) * 2010-10-06 2012-04-12 Sung-Kyu Park Semiconductor device and test system for the semiconductor device
CN202394860U (en) * 2011-12-28 2012-08-22 日月光半导体制造股份有限公司 Packaging base plate strip
CN102891118A (en) * 2012-10-08 2013-01-23 日月光半导体制造股份有限公司 Lower package body structure in stacked package and manufacturing method thereof
US20140048960A1 (en) * 2012-08-20 2014-02-20 Samsung Electro-Mechanics Co., Ltd. Package substrate, manufacturing method thereof, and mold therefor
CN105006456A (en) * 2014-04-24 2015-10-28 爱思开海力士有限公司 Semiconductor package and method for manufacturing the same
US9318404B2 (en) * 2013-02-05 2016-04-19 Stats Chippac, Ltd. Semiconductor device and method of forming stress relieving vias for improved fan-out WLCSP package
CN106298683A (en) * 2015-06-24 2017-01-04 华亚科技股份有限公司 Semiconductor device

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200910471A (en) * 2007-08-17 2009-03-01 Chipmos Technologies Inc A dice rearrangement package method
US20120086003A1 (en) * 2010-10-06 2012-04-12 Sung-Kyu Park Semiconductor device and test system for the semiconductor device
CN201994277U (en) * 2011-01-30 2011-09-28 南通富士通微电子股份有限公司 Wafer packaging structure
CN202394860U (en) * 2011-12-28 2012-08-22 日月光半导体制造股份有限公司 Packaging base plate strip
US20140048960A1 (en) * 2012-08-20 2014-02-20 Samsung Electro-Mechanics Co., Ltd. Package substrate, manufacturing method thereof, and mold therefor
CN102891118A (en) * 2012-10-08 2013-01-23 日月光半导体制造股份有限公司 Lower package body structure in stacked package and manufacturing method thereof
US9318404B2 (en) * 2013-02-05 2016-04-19 Stats Chippac, Ltd. Semiconductor device and method of forming stress relieving vias for improved fan-out WLCSP package
CN105006456A (en) * 2014-04-24 2015-10-28 爱思开海力士有限公司 Semiconductor package and method for manufacturing the same
CN106298683A (en) * 2015-06-24 2017-01-04 华亚科技股份有限公司 Semiconductor device

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10957629B2 (en) 2018-07-10 2021-03-23 Samsung Electronics Co., Ltd. Semiconductor package
CN111370431A (en) * 2018-12-26 2020-07-03 中芯集成电路(宁波)有限公司 Packaging method of photoelectric sensing integrated system
CN111370431B (en) * 2018-12-26 2023-04-18 中芯集成电路(宁波)有限公司 Packaging method of photoelectric sensing integrated system
CN112117194A (en) * 2019-06-20 2020-12-22 矽磐微电子(重庆)有限公司 Manufacturing method of chip packaging structure
CN110553885A (en) * 2019-10-14 2019-12-10 长江存储科技有限责任公司 Method for preparing test sample by FIB and test sample
CN111128765A (en) * 2019-12-10 2020-05-08 广东佛智芯微电子技术研究有限公司 Method for reducing fan-out type packaging stress and plastic packaging mold applied by same
CN111128765B (en) * 2019-12-10 2021-10-29 广东佛智芯微电子技术研究有限公司 Method for reducing fan-out type packaging stress and plastic packaging mold applied by same
CN112992670A (en) * 2019-12-16 2021-06-18 山东有研半导体材料有限公司 Method for reducing stress of silicon-based back-sealed polishing sheet
CN112992670B (en) * 2019-12-16 2022-10-28 山东有研半导体材料有限公司 Method for reducing stress of silicon-based back-sealed polishing sheet
CN113299564A (en) * 2021-05-21 2021-08-24 广东佛智芯微电子技术研究有限公司 Packaging structure of board-level fan-out flexible packaging substrate and preparation method thereof
CN114055711A (en) * 2021-11-18 2022-02-18 江苏芯德半导体科技有限公司 Chip plastic package mold and secondary plastic package process method thereof
CN114055711B (en) * 2021-11-18 2024-05-28 江苏芯德半导体科技有限公司 Chip plastic package mold and secondary plastic package process method thereof

Similar Documents

Publication Publication Date Title
CN108257882A (en) The method of stress release in device encapsulation structure and encapsulation process
US10354934B2 (en) Semiconductor packages and methods of packaging semiconductor devices
CN102157400B (en) Method for encapsulating high-integration wafer fan-out
CN104319258B (en) A kind of silicon perforation technique
US7517722B2 (en) Method of producing a universal semiconductor housing with precrosslinked plastic embedding compounds
US20160218020A1 (en) Method of manufacturing fan out wafer level package
EP1043772A2 (en) Method for packaging and mounting semiconductor device and device obtained thereby
US20120256215A1 (en) Package having light-emitting element and fabrication method thereof
CN105990272A (en) Stripping caused through forming groove elimination saw cutting
CN104465418B (en) A kind of fan-out wafer level packaging methods
US20160190028A1 (en) Method and structure for fan-out wafer level packaging
CN209401627U (en) Image sensor package
US7947530B2 (en) Method of manufacturing wafer level package including coating and removing resin over the dicing lines
CN102034721B (en) Method for encapsulating chip
CN109309013A (en) LTHC is used as electric charge barrier layer, packaging part and forming method thereof in forming packaging part
CN102163603A (en) Packaging structure for system level fan-out wafer
CN105374731A (en) Packaging method
CN113594051B (en) Semiconductor packaging method
CN206742235U (en) Chip size packages
US6933179B1 (en) Method of packaging semiconductor device
US20230041760A1 (en) Semiconductor devices with package-level compartmental shielding and associated systems and methods
CN101188204A (en) Semiconductor device and manufacturing method therefor
CN102945840A (en) Semiconductor chip packaging structure and packaging method
CN202977412U (en) Semiconductor chip packaging structure
CN207977306U (en) Semiconductor packages

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication
RJ01 Rejection of invention patent application after publication

Application publication date: 20180706