CN107315440B - A kind of high-speed broadband band frequency-voltage conversion circuit - Google Patents
A kind of high-speed broadband band frequency-voltage conversion circuit Download PDFInfo
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- CN107315440B CN107315440B CN201710758434.1A CN201710758434A CN107315440B CN 107315440 B CN107315440 B CN 107315440B CN 201710758434 A CN201710758434 A CN 201710758434A CN 107315440 B CN107315440 B CN 107315440B
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/561—Voltage to current converters
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- Radar, Positioning & Navigation (AREA)
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Abstract
The present invention discloses a kind of high-speed broadband band frequency-voltage conversion circuit, rising edge twice is carried out using detection input signal to detect, control the conversion of two on off states, when so that two switches being connected jointly, bias current sources are a cycle that capacitor charging time is only input signal, to realize rapid translating of the circuit by frequency signal to voltage signal, output settling time is reduced, improves the working efficiency and response speed of integrated circuit system.In addition, the present invention is while simplifying circuit structure, improve processing speed of the circuit to input signal, power consumption is reduced, resistance is not used, a capacitance is used only, it does not need external apply and controls signal, efficiently reduce parasitic capacitance effect, the thermal noise caused by temperature change influences and reduces chip area, completely compatible with standard CMOS process, reduce production cost.Circuit only needs an input signal cycle, so that it may to complete the conversion from frequency to voltage, reduce output settling time, improve the working efficiency and response speed of integrated circuit system.
Description
Technical field
The present invention relates to technical field of integrated circuits, and in particular to a kind of high-speed broadband band frequency-voltage conversion circuit.
Background technology
With the fast development of wireless communication system, radio frequency is largely occupied so that the restructural system of research and development intelligence
System and wave frequency detection circuit become active demand.For front end system, frequency detection circuit is a key modules, it
Radio frequency must be carried out in complicated, rugged environment quickly to identify, and distribute unappropriated frequency band for equipment.Frequency
Detection circuit is usually used in restructural receiver of frequency locked loop, self-tuning etc., and in this kind of circuit, output settling time is necessary
It is very short, to be suitable for high speed communication equipment.
The method that traditional frequency-voltage conversion circuit majority is integrated based on charge pump, is controlled using multiple switch, one
To a capacitor charging in a period, the capacitance discharges and is another capacitor charging in next cycle.However, this side
Method and circuit structure were needed by multiple periods, and output voltage can just be made to reach stationary value, and output settling time is long, limits frequency
The working performance of the subsequent conditioning circuits module such as rate locked loop, and control switch parasitic capacitance is larger, and detection frequency range is narrow, electricity
Road power consumption is high, and accuracy is not high with sensitivity, occupies excessive chip area, is easily interfered by temperature, noise and extraneous factor,
Reduce the performance indicator of integrated circuit system.
Invention content
To be solved by this invention is traditional the problems of frequency-voltage conversion circuit, provides a kind of high-speed broadband
Band frequency-voltage conversion circuit.
To solve the above problems, the present invention is achieved by the following technical solutions：
A kind of high-speed broadband band frequency-voltage conversion circuit, including phase inverter I2~I11, NAND gate I12, PMOS tube PM1~
PM9, NMOS tube NM1~NM10And capacitance C；Phase inverter I2Input terminal form the input port of this frequency-voltage conversion circuit
Vin；Phase inverter I2Output end connection phase inverter I3Input terminal, phase inverter I3Output end simultaneously connect NMOS tube NM4Grid
Pole, NMOS tube NM1Drain electrode, PMOS tube PM1Drain electrode, NAND gate I12An input terminal and phase inverter I8Input terminal；NMOS
Pipe NM4Drain electrode connection phase inverter I5Input terminal, PMOS tube PM4Drain electrode, PMOS tube PM5Drain electrode, PMOS tube PM8Grid
With phase inverter I6Input terminal；Phase inverter I5Output termination PMOS tube PM4Grid；PMOS tube PM8Source electrode and PMOS tube PM7
Drain electrode be connected；PMOS tube PM7Grid meet bias voltage Vb；Phase inverter I6Output end meet phase inverter I7Input terminal, reverse phase
Device I7Output termination NMOS tube NM6Grid；NMOS tube NM1Source electrode, PMOS tube PM1Source electrode, PMOS tube PM2Drain electrode and
PMOS tube PM3Grid be connected；PMOS tube PM3Drain electrode, NMOS tube NM2Drain electrode, NMOS tube NM3Drain electrode, NMOS tube NM5's
Grid and phase inverter I4Input terminal be connected；Phase inverter I4Output termination NMOS tube NM2Grid；NMOS tube NM5Drain electrode connect
NMOS tube NM4Source electrode；Phase inverter I8The inverted device I of output end9With phase inverter I10Input terminal connection, phase inverter I10It is defeated
Go out to terminate NAND gate I12Another input terminal；NAND gate I12Output termination PMOS tube PM6Grid；PMOS tube PM6Leakage
Pole, NMOS tube NM7Drain electrode, NMOS tube NM8Drain electrode, NMOS tube NM6Drain electrode, PMOS tube PM9Grid and phase inverter I11's
Input terminal is connected；Phase inverter I11Output termination NMOS tube NM7Grid；PMOS tube PM9Source electrode, NMOS tube NM9Drain electrode and
PMOS tube PM8Drain electrode be connected；NMOS tube NM10Drain electrode, PMOS tube PM9Drain electrode be connected with one end of capacitance C after, formed
The output port V of this frequency-voltage conversion circuitout；NMOS tube NM1, PMOS tube PM2With PMOS tube PM5Grid simultaneously connect reset
Signal RST；PMOS tube PM1, NMOS tube NM3, NMOS tube NM8~NMOS tube NM10Grid simultaneously meet reset signal~RST；It is above-mentioned
Reset signal RST and reset signal~RST reverse signal each other；PMOS tube PM2~PMOS tube PM7Source electrode meet power vd D；Electricity
Hold the other end, the NMOS tube NM of C2, NMOS tube NM3And NMOS tube NM5~NMOS tube NM10Source electrode with ground GND be connected.
Above-mentioned high-speed broadband band frequency-voltage conversion circuit, further comprises phase inverter I1, phase inverter I1One end connection
Reset signal RST, phase inverter I1The other end connect reset signal~RST.
Compared with prior art, present invention feature specific as follows：
1, first rising edge of input signal controls a switch and is converted to conducting by shutdown, with second rising edge control
It makes another switch and shutdown is converted to by conducting, frequency-voltage conversion circuit only needs an input signal cycle, so that it may with complete
At the conversion from frequency to voltage, output signal settling time is reduced, improves the working efficiency and response speed of integrated circuit system
Degree；
2, the conversion from frequency to voltage is completed, external control signal need not be applied, effectively reduces control switch
Generated parasitic capacitance, increases frequency detection range, improves sensitivity；
3, capacitor charging time is only a cycle of input signal, significantly reduces the power consumption of integrated circuit.
Description of the drawings
Fig. 1 is a kind of circuit diagram of high-speed broadband with frequency-voltage conversion circuit.
Fig. 2 is the input/output relation figure of the present invention.
Specific implementation mode
To make the objectives, technical solutions, and advantages of the present invention clearer, below in conjunction with specific example, and with reference to attached
Figure, the present invention is described in more detail.
A kind of high-speed broadband band frequency-voltage conversion circuit, as shown in Figure 1, mainly by phase inverter I1~I11, NAND gate I12,
PMOS tube PM1~PM9, NMOS tube NM1~NM10And capacitance C compositions.Phase inverter I1Input terminate circuit input end mouth RST,
Phase inverter I1Output end wiring~RST, phase inverter I2、I3Cascade, I2Input termination circuit input port Vin, I3It is defeated
Outlet and PM1、NM1Drain electrode be connected, PM1Grid connection RST, NM1Grid meet RST, PM1、NM1Source electrode be connected after with
PM2Drain electrode be connected, PM2Source electrode meet power vd D, PM2Grid meet RST, PM3Source electrode meet power vd D, PM3Grid with
PM2Drain electrode be connected, PM3Drain electrode meet phase inverter I4Input terminal, phase inverter I4Output end and NM2Grid be connected, NM2's
Drain electrode and PM3Drain electrode be connected, NM2Source electrode with ground GND be connected.NM3Drain electrode and PM3Drain electrode be connected, NM3Grid and line
~RST is connected, NM3Source electrode with ground GND be connected.PM4Source electrode be connected with power vd D, PM4Grid and phase inverter I5It is defeated
Outlet is connected, PM4Drain electrode and phase inverter I5Input terminal be connected, NM4Drain electrode and PM4Drain electrode be connected, NM4Grid with it is anti-
Phase device I3Output end be connected, NM4Source electrode and NM5Drain electrode be connected, NM5Grid and PM3Drain electrode be connected, NM5Source electrode
It is connected with ground GND.PM5Source electrode be connected with power vd D, PM5Grid be connected with RST, PM5Drain electrode and PM4Drain electrode phase
Even, phase inverter I6Input terminal and PM5Drain electrode be connected, phase inverter I6With phase inverter I7Cascade, phase inverter I7Output end and NM6
Grid be connected, NM6Source electrode with ground GND be connected, NM6Drain electrode and PM6Drain electrode be connected.PM7Source electrode and power vd D phases
Even, PM7Grid and VbIt is connected, PM7Drain electrode and PM8Source electrode be connected.PM8Grid and PM5Drain electrode be connected, PM8Leakage
Pole and NM9Drain electrode be connected, NM9Grid be connected with line~RST, NM9Source electrode with ground GND be connected.Phase inverter I8、I9、I10Phase
Cascade, phase inverter I8Input terminal and phase inverter I3Output end be connected, phase inverter I10Output end with NAND gate I12One
Input terminal is connected, NAND gate I12Another input terminal and phase inverter I3Output end be connected, NAND gate I12Output end and PM6
Grid be connected, PM6Source electrode be connected with power vd D, PM6Drain electrode and phase inverter I11Input terminal be connected, phase inverter I11's
Output end and NM7Grid be connected, NM7Drain electrode and PM6Drain electrode be connected, NM7Source electrode with ground GND be connected, NM8Drain electrode with
PM6Drain electrode be connected, NM8Grid be connected with line~RST, NM8Source electrode with ground GND be connected.PM9Source electrode and NM9Drain electrode
It is connected, PM9Grid and PM6Drain electrode be connected, PM9Drain electrode and NM10Drain electrode be connected, NM10Grid and line~RST phases
Even, NM10Source electrode with ground GND be connected.One end of capacitance C and PM9Drain electrode be connected and be followed by the output end V of circuitout, capacitance C's
The other end is connected with ground GND.
The operation principle of the present invention is that：
Phase inverter I2、I3By input signal amplification, shaping, PM1、NM1Constitute a switch controlled by RST signal, PM2
When RST is low, by PM3Grid voltage is drawn high, PM3It is detected for failing edge, works as PM3After detecting first failing edge, reverse phase
Device I4With NM2By PM3Drain electrode be locked as low level, ensure NM4Conducting, when~RST is high level, NM3For by NM5Grid
Pole tension drags down.Work as NM5After conducting, NM4Rising edge for detecting input signal, works as NM4Detect the rising of input signal
Edge, phase inverter I5With PM4By NM4Drain voltage be locked as high level, NM4Drain electrode be high level when, PM8Become by off state
For conducting state, PM5When for ensuring that reset signal RST is low level, PM8Grid be high level, ensure PM8It is off
State.Phase inverter I8、I9、I10For input signal to be postponed a period of time, the signal after delay passes through with undelayed signal
NAND gate I12Burst pulse, PM are formed later6Failing edge for detecting the pulse, after detecting failing edge, phase inverter I11With
NM7By PM6Drain voltage be locked as low level, PM6Drain electrode be high level when, PM9Shutdown shape is converted to by conducting state
State, NM8For ensure~RST be high level when, PM9Grid be low level, ensure PM9It is in the conduction state.Phase inverter I6、I7
And NM6Ensure PM7PM after conducting9Off state can just be switched to.When~RST is high level, NM10Conducting, will be on capacitance C
The charge of storage discharges.
Integrated circuit first detects first failing edge of input signal, hereafter detects again defeated after reset signal is invalid
Enter the rising edge twice of signal, first rising edge makes PM8Conducting state is converted to by off state, second rising edge makes PM9
Off state is converted to by conducting state, therefore, capacitance C only by bias current sources charge an input signal cycle, it is latter
The straight charge for keeping storage discharges the charge stored on capacitance C until reset signal is effective again.
Because capacitance C is only electrically charged an input signal cycle, output signal only delays input signal a cycle,
The circuit can make quick response to input signal, achieve the effect that high-speed transitions.
After frequency-voltage conversion circuit, final output voltage is：
Wherein, finFor the frequency of input signal,For PMOS tube PM7The electric current of generation.
The present invention carries out rising edge twice using detection input signal and detects, and controls the conversion of two on off states so that
When two switches are connected jointly, bias current sources are a cycle that capacitor charging time is only input signal, to realize electricity
Frequency signal is route to the rapid translating of voltage signal, output settling time is reduced, improves the working efficiency of integrated circuit system
And response speed.In addition, the present invention improves processing speed of the circuit to input signal while simplifying circuit structure, drop
Resistance is not used in low power consumption, and a capacitance is used only, do not need it is external apply control signal, efficiently reduce parasitic electricity
Appearance effect, the thermal noise caused by temperature change influence and reduce chip area, completely compatible with standard CMOS process, reduce
Production cost.Circuit only needs an input signal cycle, so that it may to complete the conversion from frequency to voltage, reduce output and establish
Time improves the working efficiency and response speed of integrated circuit system.Fig. 2 is the input/output relation figure of the present invention.In 0.18-
Under umCMOS technological standards, Cadence Spectre emulation shows detectable frequency range 0.3G~4G, output voltage range
Total power consumption is 1.410mW under 175mV~1.735V, 1.8V condition of power supply, and circuit delay can be at least 260.732pS.The present invention
The output settling time of traditional frequency-voltage conversion circuit can be overcome long, reaction speed is slower, and detection frequency range is narrow, clever
The problems such as sensitivity is relatively low, easily affected by noise, chip area and power consumption are excessive,
The present invention carries out rising edge twice for input signal and detects, after detecting first rising edge, control one
A switch switchs to conducting state by off state, after detecting second rising edge, controls another switch by conducting shape
State switchs to off state, and when two switches are connected jointly, bias current sources are capacitor charging, and two such switch is connected jointly
Time is only a cycle of input signal, and capacitance is electrically charged a cycle for being also only input signal, just can realize circuit
By the rapid translating of frequency signal to voltage signal, and achieve the effect that low latency, quick response.In addition, the present invention also simplifies
Circuit structure, reduces power consumption, and resistance is not used, and capacitance is used only, efficiently reduces parasitic capacitance effect, by temperature
Thermal noise influences and reduces chip area caused by degree variation, completely compatible with the CMOS technology of standard, reduces production cost.
It should be noted that although the above embodiment of the present invention is illustrative, this is not to the present invention
Limitation, therefore the invention is not limited in above-mentioned specific implementation mode.Without departing from the principles of the present invention, every
The other embodiment that those skilled in the art obtain under the inspiration of the present invention is accordingly to be regarded as within the protection of the present invention.
Claims (2)
1. a kind of high-speed broadband band frequency-voltage conversion circuit, it is characterised in that：Including phase inverter I2~I11, NAND gate I12,
PMOS tube PM1~PM9, NMOS tube NM1~NM10And capacitance C；
Phase inverter I2Input terminal form the input port V of this frequency-voltage conversion circuitin；Phase inverter I2Output end connection it is anti-
Phase device I3Input terminal, phase inverter I3Output end simultaneously connect NMOS tube NM4Grid, NMOS tube NM1Drain electrode, PMOS tube
PM1Drain electrode, NAND gate I12An input terminal and phase inverter I8Input terminal；NMOS tube NM4Drain electrode connection phase inverter I5's
Input terminal, PMOS tube PM4Drain electrode, PMOS tube PM5Drain electrode, PMOS tube PM8Grid and phase inverter I6Input terminal；Reverse phase
Device I5Output termination PMOS tube PM4Grid；PMOS tube PM8Source electrode and PMOS tube PM7Drain electrode be connected；PMOS tube PM7's
Grid meets bias voltage Vb；Phase inverter I6Output end meet phase inverter I7Input terminal, phase inverter I7Output termination NMOS tube NM6
Grid；NMOS tube NM1Source electrode, PMOS tube PM1Source electrode, PMOS tube PM2Drain electrode and PMOS tube PM3Grid be connected；
PMOS tube PM3Drain electrode, NMOS tube NM2Drain electrode, NMOS tube NM3Drain electrode, NMOS tube NM5Grid and phase inverter I4Input
End is connected；Phase inverter I4Output termination NMOS tube NM2Grid；NMOS tube NM5Drain electrode meet NMOS tube NM4Source electrode；Reverse phase
Device I8The inverted device I of output end9With phase inverter I10Input terminal connection, phase inverter I10Output termination NAND gate I12It is another
A input terminal；NAND gate I12Output termination PMOS tube PM6Grid；PMOS tube PM6Drain electrode, NMOS tube NM7Drain electrode,
NMOS tube NM8Drain electrode, NMOS tube NM6Drain electrode, PMOS tube PM9Grid and phase inverter I11Input terminal be connected；Phase inverter
I11Output termination NMOS tube NM7Grid；PMOS tube PM9Source electrode, NMOS tube NM9Drain electrode and PMOS tube PM8Drain electrode phase
Even；NMOS tube NM10Drain electrode, PMOS tube PM9Drain electrode be connected with one end of capacitance C after, formed this voltage to frequency conversion electricity
The output port V on roadout；NMOS tube NM1, PMOS tube PM2With PMOS tube PM5Grid simultaneously meet reset signal RST；PMOS tube
PM1, NMOS tube NM3, NMOS tube NM8~NMOS tube NM10Grid simultaneously meet reset signal~RST；Above-mentioned reset signal RST with
Reset signal~RST reverse signals each other；PMOS tube PM2~PMOS tube PM7Source electrode meet power vd D；The other end of capacitance C,
NMOS tube NM2, NMOS tube NM3And NMOS tube NM5~NMOS tube NM10Source electrode with ground GND be connected.
2. a kind of high-speed broadband band frequency-voltage conversion circuit according to claim 1, it is characterised in that：Also further wrap
Include phase inverter I1, phase inverter I1One end connect reset signal RST, phase inverter I1The other end connect reset signal~RST.
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| CN201710758434.1A CN107315440B (en) | 2017-08-29 | 2017-08-29 | A kind of high-speed broadband band frequency-voltage conversion circuit |
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| CN107315440B true CN107315440B (en) | 2018-09-25 |
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| CN108259093B (en) * | 2018-01-19 | 2023-07-14 | 桂林电子科技大学 | High-speed ultra-wideband half-cycle frequency detection circuit applied to frequency hopping communication |
| CN110034753A (en) * | 2019-04-22 | 2019-07-19 | 西安拓尔微电子有限责任公司 | A kind of the high-side high-speed driving circuit and its driving method of p-type VDMOS |
| CN113162620A (en) * | 2021-01-30 | 2021-07-23 | 杭州微伽量子科技有限公司 | High-speed stable broadband frequency-voltage conversion method, system and storage medium |
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| CN202513907U (en) * | 2012-03-31 | 2012-10-31 | 西北师范大学 | Broadband frequency-voltage converting circuit |
| CN103308076A (en) * | 2013-05-24 | 2013-09-18 | 东南大学 | Frequency to voltage (F-V) converting circuit |
| CN104143913A (en) * | 2013-05-10 | 2014-11-12 | 瑞昱半导体股份有限公司 | Frequency detection device |
| CN105811966A (en) * | 2016-02-26 | 2016-07-27 | 上海华虹宏力半导体制造有限公司 | Frequency-to-voltage circuit |
| CN207133682U (en) * | 2017-08-29 | 2018-03-23 | 桂林电子科技大学 | A kind of high-speed broadband band frequency-voltage conversion circuit |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2013051022A2 (en) * | 2011-07-05 | 2013-04-11 | Indian Institute Of Technology, Bombay | Frequency to voltage converter |
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2017
- 2017-08-29 CN CN201710758434.1A patent/CN107315440B/en active Active
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN202513907U (en) * | 2012-03-31 | 2012-10-31 | 西北师范大学 | Broadband frequency-voltage converting circuit |
| CN104143913A (en) * | 2013-05-10 | 2014-11-12 | 瑞昱半导体股份有限公司 | Frequency detection device |
| CN103308076A (en) * | 2013-05-24 | 2013-09-18 | 东南大学 | Frequency to voltage (F-V) converting circuit |
| CN105811966A (en) * | 2016-02-26 | 2016-07-27 | 上海华虹宏力半导体制造有限公司 | Frequency-to-voltage circuit |
| CN207133682U (en) * | 2017-08-29 | 2018-03-23 | 桂林电子科技大学 | A kind of high-speed broadband band frequency-voltage conversion circuit |
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