CN107301444A - A kind of ultrahigh frequency RFID coding circuit - Google Patents
A kind of ultrahigh frequency RFID coding circuit Download PDFInfo
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- CN107301444A CN107301444A CN201710377711.4A CN201710377711A CN107301444A CN 107301444 A CN107301444 A CN 107301444A CN 201710377711 A CN201710377711 A CN 201710377711A CN 107301444 A CN107301444 A CN 107301444A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/0723—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs
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- Computer Networks & Wireless Communication (AREA)
- Computer Hardware Design (AREA)
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- Mobile Radio Communication Systems (AREA)
Abstract
The invention discloses a kind of ultrahigh frequency RFID coding circuit structure, the circuit structure includes asynchronous process circuit and synchronous coding circuit, wherein synchronous coding circuit is made up of asynchronous/synchronous interface, clock generation circuit and coding circuit, asynchronous/synchronous interface is used for position to be encoded and its request signal and coding-control and its request signal for receiving the generation of asynchronous process circuit, and feeds back the answer signal of these requests；Clock generation circuit is used to produce encoded clock；Coding circuit is made up of FM0 coding circuits and Miller coding circuits, according to the position to be encoded of asynchronous process circuit output and coding control signal, under the encoded clock control that clock generation circuit is generated, and is treated bits of coded and is carried out FM0 codings or Miller codings.The present invention treats bits of coded using asynchronous handshake mechanism and is controlled, and instead of the buffer and state machine in pure synchronous coding circuit, the area and power consumption that can effectively save needed for encoding.
Description
Technical field
The present invention relates to a kind of ultrahigh frequency RFID coding circuit, belong to communication technique field.
Background technology
Due to the low-power consumption demand in numerous areas, asynchronous circuit has received more attention.Asynchronous circuit is used
Internal obtains system mode, and uses unclocked handshake as communication mechanism.
RFID is a kind of contactless automatic identification technology, and it utilizes radiofrequency signal and its Space Coupling, the spy of transmission
Property, realize to static or mobile article automatic identification.RFID can be for following the trail of and managing the management object in many fields, tool
There is the features such as accuracy rate is high, reading distance is remote, data storage amount is big, durability is strong, be widely used in production, logistics, pin
Sell etc. in link.The characteristic of RFID non-active operations is allowed to more by external action, and from the energy of unit space electromagnetic wave
It is limited, therefore low-power consumption RFID can improve the operating distance of single-chip and group's reading response efficiency of multi-chip.
RFID Digital Logic has obvious decoding, processing and coding three phases, the characteristic that its each phase sequence is performed
It is especially suitable for realizing based on event driven asynchronous circuit.
If the design of ultrahigh frequency RFID Digital Logic realizes there is problems with by the way of asynchronous completely：Because
RFID coding stage needs to carry out clock division, and asynchronous circuit uses and eliminates tool based on event driven handshake mechanism
There is the global clock of constant cycle, so asynchronous circuit is not suitable for clock division.
The content of the invention
The present invention proposes a kind of ultrahigh frequency RFID coding circuit structure with asynchronous/synchronous interface, utilizes asynchronous handshake
The design methods such as mechanism, gated clock and asynchronous counter, reduce the area and power consumption of ultrahigh frequency RFID coding circuit.
Ultrahigh frequency RFID coding circuit structure proposed by the present invention, including asynchronous process circuit and synchronous coding circuit, it is different
Process circuit is walked, for exporting position to be encoded and coding control signal, and corresponding request signal is sent；Synchronous coding circuit,
For returning to answer signal after completing coding；Synchronous coding circuit is by asynchronous/synchronous interface, clock generation circuit and coding
(FM0/Miller) part of circuit three is constituted.Wherein：Asynchronous/synchronous interface receive the position to be encoded that asynchronous process circuit produces and
Its request signal and coding-control and its request signal, and the answer signal of these requests is fed back, it is defeated according to time synchronisation circuit
The divide ratio gone out, clock generation circuit carries out clock of 2~32 frequency dividing generations for coding to 1.28MHz source clock.It is logical
Cross using asynchronous counter technology, and by using the enable signal gate control encoded clock of asynchronous process circuit output, can
Effectively reduce the power consumption of synchronous coding circuit.(FM0/Miller) circuit is encoded by FM0 coding circuits and Miller coding circuits
Composition.According to the position to be encoded of asynchronous process circuit output and coding control signal, in the coding that clock generation circuit is generated
Under clock system, treat bits of coded and carry out FM0 codings or Miller codings.FM0 encode and Miller codings all by rising edge and
Two signals of trailing edge triggering carry out xor operation realization.
The invention provides a kind of ultrahigh frequency RFID coding circuit with asynchronous/synchronous interface, the asynchronous/synchronous interface
Only after bits of coded progress FM0 codings or Miller codings is treated, the request of ability response position to be encoded；And only need by
Simple delay process, you can the request of response coding control signal.Compared with general asynchronous/synchronous interface is realized, this hair
It is bright to be based on asynchronous handshake mechanism, the output by turn of position to be encoded can be realized by asynchronous/synchronous interface, so as to instead of pure same
The buffer and state machine in coding circuit are walked, response is generated without using complicated finite state machine or SECO part
Signal, can effectively reduce the area and power consumption of asynchronous/synchronous interface circuit.The present invention has simple in construction, area small and work(
The characteristics of consuming low.
Brief description of the drawings
Fig. 1 ultrahigh frequency RFID coding circuit structured flowcharts of the present invention；
Fig. 2 last_dat_ack and tx_dat_ack generation circuits；
Fig. 3 fm0_v_ack, tx_m_ack, tx_trext_ack and tx_en_ack generation circuits；
Fig. 4 asynchronous/synchronous interface circuit timing diagrams；
Fig. 5 clock generation circuit timing diagrams；
Fig. 6 encodes (FM0/Miller) circuit timing diagram.
Embodiment
Using four phase Handshake Protocols, so that FM0 is encoded as an example, ultrahigh frequency RFID agreement is met to proposition below in conjunction with the accompanying drawings
Coding circuit realize structure, provide specific implementation step.
Ultrahigh frequency RFID Digital Logic is realized using asynchronous with the design method being synchronously combined, and is connect with asynchronous/synchronous
The coding circuit structure of mouth is as shown in Figure 1.Asynchronous process circuit output position to be encoded and coding control signal (are uniformly used in figure
Dat is represented), and corresponding request signal (unified in figure to be represented using req) is sent, synchronous coding circuit completes to return after coding
Answer signal (unified in figure to be represented using ack), corresponding interface sequence is as shown in Figure 4.
Last_dat_req and last_dat_ack is a pair synchronous handshake (only request and responses, and no data
Transmission), last position to be encoded for decoding of mark asynchronous process circuit.Last_dat_req is " before DUMMY 1 "
Position to be encoded (tx_dat) effectively after be changed into high from low, the coding that last_dat_ack is exported by coding circuit completes signal
(tx_dat_done) by gating and with its request signal phase with after generate (as shown in Figure 2), last_dat_ack by it is low to
Height promotes its request signal last_dat_req to be changed into low from height, ultimately results in last_dat_ack and is changed into low from height, and completes
Four phase handshake communications.
It is the high stage to enable signal (tx_en) in coding, corresponding request is sent after tx_dat is effective, by coding circuit
Its request is responded after completing FM0 codings or Miller codings, thus controls position to be encoded to export by turn.Because tx_dat needs
Continuous output by turn, so its answer signal (tx_dat_ack) is generated by encoded clock or count completion signal.For FM0
Coding, directly using encoded clock (clk_enc) by gating and the generation (as shown in Figure 2) with after with its request signal phase.
Fm0_v represents the indication signal of v in FM0 coding prefixes, and its request signal (fm0_v_req) is after fm0_v is effective
It is changed into high from low, fm0_v answer signal (fm0_v_ack) need to only pass through simple delay (caching) processing can be (such as Fig. 3 institutes
Show).
Tx_m determines the coding mode used, and tx_trext indicates the form of coding prefix.For tx_m, tx_trext and
Tx_en signals, it is asked and response only change once, can need to directly use these coding control signals afterwards in initialization
Value, its answer signal need to only be handled by simple delay (caching) can (as shown in Figure 3).Tx_m and tx_trext only have
It is just effective in decoding finish time (T1), and tx_en need to carry out assignment in initial phase (initial value is 0).
The sequential of clock generation circuit is as shown in Figure 5.Control of the 1.28MHz sources clock (clk_osc) in outside timing circuit
System is lower to be divided and (is controlled by divide ratio div_fac, it is illustrated that for 16 frequency dividings), is divided using asynchronous counter, and
The clk_enc that frequency dividing is produced is gated by tx_en, so as to effectively reduce the power consumption of synchronous coding circuit.
The sequential of coding circuit is as shown in Figure 6.Fm0_v, tx_m and the tx_trext's decoded in asynchronous process circuit
Under control, the clk_enc after being divided using clock generation circuit is treated bits of coded tx_dat and carries out FM0 codings or Miller volumes
Code (is illustrated as FM0 codings), and coding is output as mo_dat.FM0 is encoded and Miller codings are all triggered by rising edge and trailing edge
Two signals carry out xor operation realization.Under the collective effect of last position to be encoded and count completion signal, produce
Coding completes signal (tx_dat_done).Because synchronous coding circuit make use of asynchronous handshake mechanism for the control of position to be encoded
System, instead of the buffer and state machine in pure synchronous coding circuit, can effectively reduce the area and work(of synchronous coding circuit
Consumption.
Although the present invention is disclosed as above with preferred embodiment, but is not limited to the present invention.It is any to be familiar with ability
The technical staff in domain, without departing from the scope of the technical proposal of the invention, all using in the methods and techniques of the disclosure above
Appearance makes many possible variations and modification to technical solution of the present invention, or is revised as the equivalent embodiment of equivalent variations.Therefore,
Every content without departing from technical solution of the present invention, the technical spirit according to the present invention is to made for any of the above embodiments any simple
Modification, equivalent variations and modification, in the range of still falling within technical solution of the present invention protection.
Claims (4)
1. a kind of ultrahigh frequency RFID coding circuit structure, it is characterised in that different including asynchronous process circuit and synchronous coding circuit
Process circuit is walked, for exporting position to be encoded and coding control signal, and corresponding request signal is sent；Synchronous coding circuit,
For returning to answer signal after completing coding；Synchronous coding circuit is by asynchronous/synchronous interface, clock generation circuit and coding circuit
Composition, wherein, asynchronous/synchronous interface receive the position to be encoded that asynchronous process circuit produces and its request signal and coding-control and
Its request signal, and feed back the answer signal of these requests；Clock generation circuit is used to produce encoded clock；Coding circuit by
FM0 coding circuits and Miller coding circuits composition, according to the position to be encoded of asynchronous process circuit output and coding control signal,
Under the encoded clock control that clock generation circuit is generated, treat bits of coded and carry out FM0 codings or Miller codings.
2. ultrahigh frequency RFID coding circuit structure as claimed in claim 1, it is characterised in that according to time synchronisation circuit output
Divide ratio, clock generation circuit carries out 2~32 frequency dividing generations to 1.28MHz source clock for the clock that encodes.
3. ultrahigh frequency RFID coding circuit structure as claimed in claim 2, it is characterised in that clock generation circuit is using asynchronous
Counter carries out clock division.
4. ultrahigh frequency RFID coding circuit structure as claimed in claim 1, it is characterised in that FM0 is encoded and Miller codings
Two signals all triggered by rising edge and trailing edge carry out xor operation realization.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201710377711.4A CN107301444A (en) | 2017-05-25 | 2017-05-25 | A kind of ultrahigh frequency RFID coding circuit |
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| CN201710377711.4A CN107301444A (en) | 2017-05-25 | 2017-05-25 | A kind of ultrahigh frequency RFID coding circuit |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110246325A (en) * | 2019-06-21 | 2019-09-17 | 广州科技贸易职业学院 | A kind of digital infrared remote-controlled signal modulation circuit and its modulator approach |
| CN111158923A (en) * | 2019-12-30 | 2020-05-15 | 深圳云天励飞技术有限公司 | Interface calling method and device, electronic equipment and storage medium |
| CN112184934A (en) * | 2020-09-30 | 2021-01-05 | 广州市埃特斯通讯设备有限公司 | Method and system for decoding FM0 coded data of ETC |
| CN113869477A (en) * | 2021-12-01 | 2021-12-31 | 杰创智能科技股份有限公司 | RFID (radio frequency identification) tag chip and chip power consumption control method |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1947109A (en) * | 2004-04-28 | 2007-04-11 | 皇家飞利浦电子股份有限公司 | Circuit with asynchronous/synchronous interface |
| EP1670200B1 (en) * | 2004-11-04 | 2007-08-29 | Stmicroelectronics Sa | Method and device for generating a decoding clock from an asynchronous data signal based on the EPC Global standard |
| CN101814921A (en) * | 2010-03-17 | 2010-08-25 | 华东师范大学 | Coding module of digital baseband system of radio-frequency identification reader |
-
2017
- 2017-05-25 CN CN201710377711.4A patent/CN107301444A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1947109A (en) * | 2004-04-28 | 2007-04-11 | 皇家飞利浦电子股份有限公司 | Circuit with asynchronous/synchronous interface |
| EP1670200B1 (en) * | 2004-11-04 | 2007-08-29 | Stmicroelectronics Sa | Method and device for generating a decoding clock from an asynchronous data signal based on the EPC Global standard |
| CN101814921A (en) * | 2010-03-17 | 2010-08-25 | 华东师范大学 | Coding module of digital baseband system of radio-frequency identification reader |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110246325A (en) * | 2019-06-21 | 2019-09-17 | 广州科技贸易职业学院 | A kind of digital infrared remote-controlled signal modulation circuit and its modulator approach |
| CN110246325B (en) * | 2019-06-21 | 2022-03-18 | 广州科技贸易职业学院 | Full-digital infrared remote control signal modulation circuit and modulation method thereof |
| CN111158923A (en) * | 2019-12-30 | 2020-05-15 | 深圳云天励飞技术有限公司 | Interface calling method and device, electronic equipment and storage medium |
| CN111158923B (en) * | 2019-12-30 | 2023-05-12 | 深圳云天励飞技术有限公司 | Interface calling method and device, electronic equipment and storage medium |
| CN112184934A (en) * | 2020-09-30 | 2021-01-05 | 广州市埃特斯通讯设备有限公司 | Method and system for decoding FM0 coded data of ETC |
| CN113869477A (en) * | 2021-12-01 | 2021-12-31 | 杰创智能科技股份有限公司 | RFID (radio frequency identification) tag chip and chip power consumption control method |
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